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Eda Manager Jobs in Arizona (NOW HIRING)

Intel

EDA Tools SW Engineer

Phoenix, AZ · Hybrid

$173K - $330K/yr

Technical management or lead experience mentoring or leading medium sized teams. * Experience with ... EDA tools. * Experience with technology challenges, and process changes that impact the Physical ...

Cirrus Logic

CAD Engineer (TC-64000979)

Chandler, AZ · On-site

Manage design data, revision control, and release processes * Work with IT on infrastructure to enable scalable job execution and resource utilization * Interface with EDA vendors to resolve tool ...

Intel

Physical Verification Engineer

Phoenix, AZ · On-site

$135K/yr

... and EDA vendors on physical and layout design rules and extraction issue resolution * Resolve ... Self-driven and results-oriented with capability to effectively manage multiple complex tasks

PDF Solutions

Director, OEM Software Programs

Phoenix, AZ · On-site

$185K - $215K/yr

Partner with engineering, product management, solutions, and QA to drive requirements, technical ... Extensive knowledge of GEM/SECS/EDA standards and advanced automation architectures. * Proven ...

Intel

Director - PDK Architecture

Phoenix, AZ · On-site

... EDA partners to ensure technology requirements are translated into scalable, high-quality, and ... Partner with Program management for PDK execution. Qualifications: Minimum Qualifications * MS or ...

Alphacore Inc

Manager/Lead Analog Design Engineer

Tempe, AZ · On-site +1

$193K/yr

Experience with Cadence EDA tools is a plus. * IC development & implementation of high-performance RF and Analog Circuits and Systems * Experience with high speed ADC data convertors is a must

Intel

DFT Application Engineer

Phoenix, AZ · On-site

... EDA vendors to resolve complex technical issues * Deliver customer-facing technical support and ... Self-driven and results-oriented with ability to manage multiple complex tasks effectively

Viasat, Inc.

MMIC Design Engineer

Tempe, AZ · On-site

$149K - $224K/yr

Perform circuit simulation and optimization using industry-standard EDA tools. * Conduct ... Ability to manage multiple design activities in a fast-paced environment. #LI-GS1 Salary range $120 ...

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Eda Manager information

What is the difference between Eda Manager vs Eda Engineer?

AspectEda ManagerEda Engineer
CredentialsBachelor's or Master's in Electrical Engineering, Project Management certificationsBachelor's or Master's in Electrical Engineering, relevant technical certifications
Work EnvironmentOversees teams, manages projects, coordinates with clientsDesigns and tests electrical systems, performs simulations
Industry UsageUsed in project planning, team leadership, and client communicationUsed in circuit design, simulation, and technical analysis

The main difference between an Eda Manager and an Eda Engineer lies in their roles. The Eda Manager oversees projects and teams, focusing on management and coordination, while the Eda Engineer handles technical design and analysis. Both roles require electrical engineering credentials, but their responsibilities and daily tasks differ significantly.

What are the key skills and qualifications needed to thrive as an EDA manager, and why are they important?

To thrive as an EDA Manager, you need strong expertise in electronic design automation (EDA) methodologies, semiconductor design processes, and a relevant engineering degree. Familiarity with EDA tools such as Cadence, Synopsys, and Mentor Graphics, as well as project management certifications, is often required. Excellent leadership, problem-solving, and communication skills help manage teams and coordinate complex projects. These qualifications ensure efficient workflow, high-quality chip design, and successful project delivery in the fast-paced semiconductor industry.

What are the main challenges an EDA manager faces when overseeing cross-functional design teams?

An EDA Manager often encounters challenges in aligning the goals and timelines of diverse engineering teams, such as digital, analog, and verification groups, who rely on different EDA tools and methodologies. Ensuring smooth integration of workflows, maintaining up-to-date tool expertise, and resolving toolchain compatibility issues are key aspects of the role. Additionally, EDA Managers must balance project deadlines with the need for continuous process improvement, often acting as a bridge between technical teams and upper management to communicate progress and resource needs effectively.

What is an EDA manager?

EDA Managers are professionals who oversee Electronic Design Automation (EDA) projects within semiconductor or electronics companies. Their primary responsibilities include managing teams that use specialized software tools to design, verify, and test integrated circuits (ICs) and other electronic systems. EDA Managers coordinate between engineering, software, and hardware teams to ensure project deadlines are met and quality standards are maintained. They also keep up-to-date with the latest EDA tools and methodologies to enhance productivity and optimize design flows.
What are popular job titles related to Eda Manager jobs in Arizona? For Eda Manager jobs in Arizona, the most frequently searched job titles are:
What job categories do people searching Eda Manager jobs in Arizona look for? The top searched job categories for Eda Manager jobs in Arizona are:
What cities in Arizona are hiring for Eda Manager jobs? Cities in Arizona with the most Eda Manager job openings:
Eda Manager jobs near you

EDA Tools SW Engineer

Intel

Phoenix, AZ • Hybrid

$173K - $330K/yr

Full-time

Medical, Retirement, PTO

Posted 9 days ago

Intel rating

8.7

Company rating: 8.7 out of 10

Based on 147 frontline employees who took The Breakroom Quiz

19th of 157 rated electronics manufacturers

Job description

Job Details:Job Description: 

At Intel, Design Technology Platforms (DTP) is one of the key pillars enabling Intel to deliver winning products in the marketplace. You will directly drive and work with DTP cross teams to ensure design-kits leadership for customer enablement for cutting edge technologies. You will work with customers to outline critical requirements, collaborate with Intel internal partners to define the scope, plan execution, innovate competitive solutions to meet customer needs.
The Technical Lead position within the Design Enablement (DTP) organization of Intel Foundry is a Design Enablement Applications and Support Technical Lead position chartered to lead a team that drives customer solutions for ASIC tools/flows and Physical verification/runsets, Tape-in Verification and IP sign off for test chips when customers use Intel PDK collaterals in these domains. The job requires partnering and leveraging domain experts across various areas of Technology Development, EDA vendors and product design teams (internal to Intel and external) to deliver quality solutions.
Lead and develop a high-performing engineering team by setting priorities, driving execution across organizational boundaries, and fostering an inclusive and collaborative work environment. Provide technical leadership, mentoring, and coaching while ensuring delivery of engineering objectives aligned with schedule, quality, and cost targets.

Direct and coordinate engineering activities, allocate resources effectively, and drive problem resolution through sound technical judgment. Promote team values, accountability, and continuous improvement while guiding employee development, performance, and productivity. Exercise independent judgment in addressing complex challenges that may require deviation from standard practices.

Required behavior traits

  • Strong customer focus with a commitment to responsive support and issue resolution.

  • Demonstrated analytical problem-solving skills and ability to collaborate across organizations.

  • Proven leadership, influencing, and communication skills, with experience driving results through cross-functional teams.

Qualifications:

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the requirements and are considered a plus factor in identifying top candidates.
Minimum Qualifications:

  • BS degree with 10+ years of experience or MS degree with 8+ years of experience or PhD degree with 6+ years of experience in Electrical Engineer or Computer Engineering or related field.

6+ years of experience in two or more of the following:

  • Technical management or lead experience mentoring or leading medium sized teams.

  • Experience with Test chip physical verification and tape-in

  • Intel and/or external foundry process technology knowledge in advance nodes.

  • Industry direct experience and in-depth knowledge to support customers in ASIC/Physical Design and/or Physical Verification/runsets, in advanced technology nodes, or EDA tools.

  • Experience with technology challenges, and process changes that impact the Physical Design, Physical Verification and other PDK components.

Preferred Qualifications

  • Experience in advanced-node semiconductor design and verification methodologies.

  • Experience with customers and stakeholders to resolve complex design and technology challenges.

Job Type:Experienced HireShift:Shift 1 (United States of America)Primary Location: US, Oregon, HillsboroAdditional Locations:US, Arizona, Phoenix, US, California, Santa Clara, US, Texas, AustinPosting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/ABenefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.

Annual Salary Range for jobs which could be performed in the US: $173,660.00-330,340.00 USDThe range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.

*

ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.

What Intel employees say

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About Intel

Sourced by ZipRecruiter

Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore's Law to bring smart, connected devices to every person on Earth

Industry

Manufacturing

Company size

10,000+ Employees

Headquarters location

Santa Clara, CA, US

Year founded

1968

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