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Dft Manager Jobs in California (NOW HIRING)

Nvidia

Senior DFT Power Methodology Engineer

Santa Clara, CA · On-site

$122K - $168K/yr

Experience in managing DFT Power Methodology for designs * Experience in post-silicon debug for thermal & IR Drop * Good understanding of technology and passionate about what you do * Strong ...

Marvell

IP Release Principal Engineer

Irvine, CA · On-site

  • Life

  • Retirement

... DFT. * Manage IP delivery escalations; track bugs and action items in Jira; provide timely updates to consuming program teams. * Provide integration guidance (RTL guidelines, constraints usage, CDC ...

Marvell

IP Release Principal Engineer

Santa Clara, CA

  • Life

  • Retirement

... DFT. * Manage IP delivery escalations; track bugs and action items in Jira; provide timely updates to consuming program teams. * Provide integration guidance (RTL guidelines, constraints usage, CDC ...

Nvidia

Senior DFT Engineer

Santa Clara, CA · Hybrid

$122K - $168K/yr

... cycle management among others * As a member on our DFX Architecture team, your responsibility will be to craft key DFX architecture and methodologies to meet system level safety diagnostic test ...

Cisco

ASIC DFT CAD Technical Leader

San Jose, CA · On-site

$186K - $267K/yr

  • Medical

  • Dental

  • Vision

  • Life

  • Retirement

  • PTO

As a technical leader, you will own and drive end-to-end DFT flow architecture, building and ... Experience with large-scale regression systems and distributed job management. * Exposure to ATE ...

Etched

ASIC Technical Program Manager

San Jose, CA · On-site

$2.0K/mo

  • Medical

  • Dental

  • Vision

You will own program coordination across Physical Design, DFT, DV, and RTL teams while managing relationships with external vendors including IP providers, implementation partners, and EDA tool ...

Etched

ASIC Technical Program Manager

San Jose, CA · On-site

$2.0K/mo

  • Medical

  • Dental

  • Vision

You will own program coordination across Physical Design, DFT, DV, and RTL teams while managing relationships with external vendors including IP providers, implementation partners, and EDA tool ...

Anthropic

Technical Program Manager, Silicon

San Francisco, CA

$152K - $196K/yr

... DFT, analog/mixed-signal, foundry, and packaging. There is no process to inherit - you'll build the ... Manage the interface between silicon and its consumers: hardware systems for package/board/bring-up ...

Broadcom, Inc.

IC Design Engineer

San Jose, CA · On-site

  • Medical

  • Dental

  • Vision

  • Retirement

  • PTO

DFT Architecture & Integration: Responsible for top-level DFT planning and integration. * ATPG & ATE: Managing the ATPG (Automatic Test Pattern Generation) and ATE (Automated Test Equipment ...

Doist

Hardware Technical Program Manager

San Jose, CA · On-site

$200 - $240/hr

  • Retirement

You'll work daily with architecture, RTL design, DV/emulation, DFT, physical design, package ... Manage Risk & Decisions Surface risk early with mitigation options and schedule impact quantified ...

New

Broadcom

IC Design Engineer

San Jose, CA

  • Medical

  • Dental

  • Vision

  • Retirement

  • PTO

DFT Architecture & Integration: Responsible for top-level DFT planning and integration. * ATPG & ATE: Managing the ATPG (Automatic Test Pattern Generation) and ATE (Automated Test Equipment ...

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Showing results 21-40

All JobsDft JobsDft Manager JobsDft Manager Jobs in California

Dft Manager information

See California salary details

$28.1K

$61.8K

$112K

How much do dft manager jobs pay per year?

As of Aug 20, 2026, the average yearly pay for dft manager in California is $61,840.00, according to ZipRecruiter salary data. Most workers in this role earn between $44,400.00 and $68,100.00 per year, depending on experience, location, and employer.

What is a DFT manager?

DFT Managers are professionals who oversee the Design for Testability (DFT) strategy and implementation within semiconductor design projects. They are responsible for leading teams that develop and integrate test features into integrated circuits (ICs) to ensure efficient manufacturing testing and product quality. DFT Managers coordinate with design, verification, and test engineering teams to optimize test coverage, reduce test costs, and ensure that chips can be effectively tested for defects. Their role is crucial in preventing costly post-production errors and maintaining high product reliability.

What are the key skills and qualifications needed to thrive as a DFT manager?

To excel as a DFT Manager, you need a strong background in digital design, test methodologies, and semiconductor manufacturing, often with a degree in electrical or computer engineering. Familiarity with industry-standard tools like Synopsys Tetramax, Mentor Tessent, and scripting languages, as well as experience with ATPG, BIST, and scan insertion, are typically required. Leadership, problem-solving, and effective communication are crucial soft skills for managing teams and collaborating across departments. These capabilities ensure efficient test strategies, high-quality chip designs, and successful project delivery in complex, fast-paced environments.

What are some common challenges a DFT manager faces when coordinating between design and test teams?

A DFT (Design for Test) Manager often encounters challenges in balancing the needs of the design team, who prioritize performance and area optimization, with the requirements of test engineers, who focus on maximizing test coverage and minimizing test costs. Ensuring clear communication and early involvement of DFT considerations in the design cycle is crucial to avoid costly redesigns or delays. The role also involves staying updated with the latest DFT methodologies and tools, and managing cross-functional collaboration to integrate DFT features efficiently within tight project timelines.

What is the difference between Dft Manager vs Dft Engineer?

AspectDft ManagerDft Engineer
CredentialsBachelor's or Master's in Electrical/Electronic Engineering, certifications in DFT techniquesBachelor's or Master's in Electrical/Electronic Engineering, certifications in DFT tools
Work EnvironmentOversees DFT teams, manages testing strategies, collaborates with design and manufacturingPerforms DFT design, implements test structures, analyzes test data
Industry UsageUsed in semiconductor and integrated circuit industries for testability managementUsed in semiconductor design for implementing testability features

The Dft Manager focuses on leading DFT teams and strategic planning, while the Dft Engineer is responsible for designing and implementing test features. Both roles require similar technical skills and certifications, but differ in scope and responsibilities within the semiconductor industry.

What are the most commonly searched types of Dft jobs in California?

The most popular types of Dft jobs in California are:

What are popular job titles related to Dft Manager jobs in California?

For Dft Manager jobs in California, the most frequently searched job titles are:

What job categories do people searching Dft Manager jobs in California look for?

The top searched job categories for Dft Manager jobs in California are:

What cities in California are hiring for Dft Manager jobs?

Cities in California with the most Dft Manager job openings:

Dft Manager jobs near you
Infographic showing various Dft Manager job openings in California as of August 2026, with employment types broken down into 90% Full Time, 9% Part Time, and 1% Contract. Highlights an 81% Physical, 2% Hybrid, and 17% Remote job distribution, with an average salary of $61,840 per year, or $29.7 per hour.

Senior DFT Power Methodology Engineer

Nvidia

Santa Clara, CA • On-site

$122K - $168K/yr

Full-time

Re-posted 17 days ago

Nvidia rating

9.6

Company rating: 9.6 out of 10

Based on 17 frontline employees who took The Breakroom Quiz

7th of 245 rated software companies

Job description

NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI - the next era of computing. NVIDIA is a "learning machine" that constantly evolves by adapting to new opportunities that are hard to solve, that only we can address, and that matter to the world. This is our life's work, to amplify human creativity and intelligence. Make the choice to join us today.

Design-for-X Engineering at NVIDIA works on groundbreaking innovations involving crafting creative solutions in AI for Chip Design and AI for Predictions in various use cases in manufacturing testing on some of the industry's most complex semiconductor chips.

What you'll be doing:

  • As a senior member in our team, you will work on innovating in the DFT Power, Thermal & Voltage Noise Methodology areas.

  • This will include working on groundbreaking low power & thermal solutions for our manufacturing tests to be enabled at conditions that push the boundaries for our datacenter GPUs.

  • You will work with multi-functional teams including Product Development & Power Architecture, implementing brand-new methodologies on hard-to-solve problems for improving our outgoing quality of chips.

  • You will work on post-silicon data analysis for power to architect the next-gen solutions.

  • In addition, you will help develop and deploy DFT methodologies for our next generation productsusing Applied ML & Gen AI solutions.

  • You will also help mentor junior engineers on test designs and trade-offs including cost and quality.

What we need to see:

  • BSEE (or equivalent experience) with 12+, MSEE with 10+, or PhD with 6+ years of experience in DFT design & power

  • Understanding of fundamental DFT topics and VLSI areas of power, timing & voltage noise

  • Experience in Power Analysis, Thermal Analysis & IR Drop tools is a plus.

  • Experience in application of AI for EDA-related problem-solving is a plus.

  • Excellent knowledge in using statistical tools for data analysis & insights.

  • Good exposure to multi-functional areas including RTL & clocks design, STA, place-n-route and power.

  • Experience in Silicon debug and bring-up on the ATE or SLT platforms.

  • Be able to think like a programmer so that this can be translated into action using AI Coding harnesses

  • Outstanding written and oral communication skills with the curiosity to work on rare challenges.

Ways to stand out from the crowd:

  • Experience in managing DFT Power Methodology for designs

  • Experience in post-silicon debug for thermal & IR Drop

  • Good understanding of technology and passionate about what you do

  • Strong collaborative and interpersonal skills, specifically a proven ability to effectively guide and influence within a dynamic environment

NVIDIA offers highly competitive salaries and a comprehensive benefits package. We have some of the most forward-thinking and talented people in the world working for us and, due to unprecedented growth, our world-class engineering teams are growing fast. If you're a creative and autonomous engineer with real passion for technology, we want to hear from you!

Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 196,000 USD - 310,500 USD for Level 5, and 232,000 USD - 368,000 USD for Level 6.

You will also be eligible for equity and benefits.

Applications for this job will be accepted at least until August 9, 2026.

This posting is for an existing vacancy.

NVIDIA uses AI tools in its recruiting processes.

NVIDIA is committed to fostering an inclusive work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.

What Nvidia employees say

Pay

Benefits

Hours and flexibility

Workplace

Get the full story on Breakroom

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About Nvidia

Sourced by ZipRecruiter

NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. It's a unique legacy of innovation that's fueled by great technology--and amazing people. Today, we're tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. Doing what's never been done before takes vision, innovation, and the world's best talent.

Industry

Computer and electronic product manufacturing

Company size

10,000+ Employees

Headquarters location

Santa Clara, CA, US

Year founded

1993

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