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Design Verification Jobs in Texas (NOW HIRING)

Meta is hiring an ASIC Design Verification Engineer within the Infrastructure Silicon organization. We are looking for individuals with experience in Design Verification to build IP and System on ...

We're hiring experienced Design Verification Engineers to play a key role in developing and verifying the designs that will bring our next-generation AI processors to life. About Us: Mythic is ...

Design Verification Engineer

Austin, TX · On-site

$134K - $164K/yr

... design and communication systems team and participate in system level verification using test benches constructed using UVM Develop a highly automated environment to run regressions that can be used ...

Design Verification Engineer

Austin, TX · On-site

$134K - $164K/yr

... design and communication systems team and participate in system level verification using test benches constructed using UVM Develop a highly automated environment to run regressions that can be used ...

Silicon Design Verification Manager

Austin, TX · On-site

$134K - $164K/yr

Object Oriented design verification coding (System Verilog or C ); Testbench architecture design using agents, stimulus, checkers, and scoreboards; and Simulation-based verification at block and ...

We're hiring experienced Design Verification Engineers to play a key role in developing and verifying the designs that will bring our next-generation AI processors to life. About Us: Mythic is ...

Senior Design Verification Engineer

Austin, TX · On-site

$131K - $160K/yr

  • Medical

  • Retirement

Senior Design Verification Engineer Looking for new challenges? Would you like the variety of a contract position along with long term stability and benefits? Correct Designs can give it all to you.

Senior Design Verification Engineer

Austin, TX · On-site

$134K - $164K/yr

  • Medical

  • Retirement

Senior Design Verification Engineer Looking for new challenges? Would you like the variety of a contract position along with long term stability and benefits? Correct Designs can give it all to you.

Senior Design Verification Engineer

Dallas, TX · On-site

$134K - $164K/yr

Senior Design Verification Engineer About the Role As a Senior Design Verification Engineer at Analog Devices, you will lead verification planning and execution for complex digital and mixed-signal ...

CPU Design Verification Engineer

Austin, TX

$134K - $164K/yr

Description As a CPU Design Verification Engineer owning the verification of a certain area of functionality in a CPU design, you will have the responsibilities as follows: • Work closely with ...

CPU Design Verification Engineer

Austin, TX · On-site

$134K - $164K/yr

Description As a CPU Design Verification Engineer owning the verification of a certain area of functionality in a CPU design, you will have the responsibilities as follows: • Work closely with ...

CPU Design Verification Engineer

Austin, TX · On-site

$134K - $164K/yr

Description As a CPU Design Verification Engineer owning the verification of a certain area of functionality in a CPU design, you will have the responsibilities as follows: • Work closely with ...

CPU Design Verification Engineer

Austin, TX · On-site

$134K - $164K/yr

Description As a CPU Design Verification Engineer owning the verification of a certain area of functionality in a CPU design, you will have the responsibilities as follows: • Work closely with ...

Senior Design Verification Engineer

Dallas, TX · On-site

$134K - $164K/yr

Senior Design Verification Engineer About the Role As a Senior Design Verification Engineer at Analog Devices, you will lead verification planning and execution for complex digital and mixed-signal ...

CPU Design Verification Engineer

Austin, TX

$134K - $164K/yr

Description As a CPU Design Verification Engineer owning the verification of a certain area of functionality in a CPU design, you will have the responsibilities as follows: • Work closely with ...

CPU Design Verification Engineer

Austin, TX

$134K - $164K/yr

Description As a CPU Design Verification Engineer owning the verification of a certain area of functionality in a CPU design, you will have the responsibilities as follows: • Work closely with ...

Showing results 41-60

Design Verification information

See Texas salary details

$98.3K

$139K

$155.6K

How much do design verification jobs pay per year?

As of Aug 13, 2026, the average yearly pay for design verification in Texas is $138,956.00, according to ZipRecruiter salary data. Most workers in this role earn between $126,700.00 and $154,700.00 per year, depending on experience, location, and employer.

What is the difference between Design Verification vs Design Validation?

AspectDesign VerificationDesign Validation
PurposeEnsures the design meets specified requirements through testing and analysisConfirms the final product fulfills user needs and intended use
TimingDuring the development phaseAfter the product is developed and before release
MethodsInspections, reviews, testing, analysisUser testing, field trials, real-world testing
FocusDesign correctness and complianceProduct effectiveness and user satisfaction

While Design Verification checks if the design meets specified requirements during development, Design Validation ensures the final product performs effectively in real-world conditions. Both are essential steps in the product development process to deliver a reliable and user-centered product.

What is a design verification engineer?

Design verification engineers are professionals who ensure that hardware or software designs meet their intended specifications and function correctly before production or release. They develop and execute tests, write verification plans, create simulation environments, and identify design flaws or errors. Their work is critical in industries like semiconductor, electronics, and software development to prevent costly mistakes and ensure high-quality products. Design verification engineers often work closely with design and validation teams throughout the product development lifecycle.

What are the key skills and qualifications needed to thrive as a design verification engineer?

To thrive as a Design Verification Engineer, you need a solid background in digital design, verification methodologies, and programming languages like SystemVerilog, typically supported by a degree in electrical engineering or a related field. Familiarity with verification tools such as UVM, simulation environments, and EDA software is essential, along with knowledge of scripting languages like Python or Perl. Strong analytical thinking, attention to detail, and effective teamwork are standout soft skills in this role. These skills ensure accurate validation of complex hardware designs, reducing errors and supporting reliable product development cycles.

What are some common challenges faced by design verification engineers, and how can they be addressed?

Design Verification engineers often encounter challenges such as managing complex testbenches, debugging intricate corner cases, and ensuring coverage completeness within tight project timelines. To address these, it’s important to have strong scripting skills, collaborate closely with design and validation teams, and make effective use of verification methodologies like UVM. Regular communication and review cycles also help catch issues early and improve overall verification quality.
What are the most commonly searched types of Design Verification jobs in Texas? The most popular types of Design Verification jobs in Texas are:
What cities in Texas are hiring for Design Verification jobs? Cities in Texas with the most Design Verification job openings:
Infographic showing various Design Verification job openings in Texas as of August 2026, with employment types broken down into 87% Full Time, 8% Part Time, and 5% Contract. Highlights an 85% Physical, 4% Hybrid, and 11% Remote job distribution, with an average salary of $138,956 per year, or $66.8 per hour.

ASIC Engineer, Design Verification

Meta

Austin, TX • On-site, Remote

$114K/yr

Full-time

Re-posted 11 days ago


Meta rating

7.8

Company rating: 7.8 out of 10

Based on 45 frontline employees who took The Breakroom Quiz

136th of 244 rated software companies


Job description

Meta is hiring an ASIC Design Verification Engineer within the Infrastructure Silicon organization. We are looking for individuals with experience in Design Verification to build IP and System on Chip (SoC) solutions for data center applications.In this role, you will work alongside experienced engineers focused on developing advanced ASIC solutions that power Meta's data center infrastructure. You will own verification closure for design modules or sub-systems, spanning test planning, UVM-based testbench development, and coverage closure. In addition to simulation-based verification, you will leverage formal verification and emulation methodologies to achieve bug-free silicon. This role offers meaningful opportunities to collaborate with full-stack software, hardware, ASIC design, emulation, and post-silicon validation teams toward first-pass silicon success.
ASIC Engineer, Design Verification Responsibilities:
  • Define and implement block, IP, and SoC-level verification plans to enable comprehensive functional coverage across design hierarchies
  • Develop and maintain UVM-based testbenches and functional test sequences aligned to the verification test plan
  • Drive verification closure using defined metrics including functional coverage, code coverage, and assertion coverage
  • Debug and root-cause functional failures in RTL designs, partnering closely with the ASIC design team to resolve issues
  • Apply formal verification and emulation techniques to complement simulation-based approaches and improve verification efficiency
  • Collaborate with design, architecture, and post-silicon validation teams to align on verification goals and ensure design quality
  • Develop reusable verification infrastructure components including scoreboards, monitors, and coverage models
  • Contribute to scripting and automation flows using Python, TCL, or Shell to improve verification productivity and regression management
  • Participate in design reviews and verification planning discussions to identify potential design risks early in the development cycle

Minimum Qualifications:
  • Currently has, or is in the process of obtaining a Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience. Degree must be completed prior to joining Meta
  • 2+ years of hands-on experience in SystemVerilog and UVM-based verification methodology or C/C++ based hardware verification
  • 2+ years of experience in block, IP, sub-system, or SoC-level verification using SystemVerilog UVM or OVM methodologies
  • Experience with EDA simulation tools and scripting languages such as Python, TCL, Perl, or Shell for building verification environments and flows
  • Experience debugging RTL functional failures and performing root-cause analysis in a simulation or emulation environment

Preferred Qualifications:
  • Experience with Emulation platform usage for Pre-Si verification
  • Experience verifying ARM or RISC-V based sub-systems or SoCs, or data center application designs such as AI/ML accelerators, networking, or video processing ASICs
  • Experience with IP or integration verification of high-speed interfaces such as PCIe, DDR, or Ethernet
  • Experience developing UVM-based verification environments from scratch, including environment architecture, sequencers, and coverage models
  • Experience with Chip Debug Logic, Telemetry and/or RAS

About Meta:
Meta builds technologies that help people connect, find communities, and grow businesses. When Facebook launched in 2004, it changed the way people connect. Apps like Messenger, Instagram and WhatsApp further empowered billions around the world. Now, Meta is moving beyond 2D screens toward immersive experiences like augmented and virtual reality to help build the next evolution in social technology. People who choose to build their careers by building with us at Meta help shape a future that will take us beyond what digital connection makes possible today—beyond the constraints of screens, the limits of distance, and even the rules of physics.
Meta is proud to be an Equal Employment Opportunity and Affirmative Action employer. We do not discriminate based upon race, religion, color, national origin, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender, gender identity, gender expression, transgender status, sexual stereotypes, age, status as a protected veteran, status as an individual with a disability, or other applicable legally protected characteristics. We also consider qualified applicants with criminal histories, consistent with applicable federal, state and local law. Meta participates in the E-Verify program in certain locations, as required by law. Please note that Meta may leverage artificial intelligence and machine learning technologies in connection with applications for employment.
Meta is committed to providing reasonable accommodations for candidates with disabilities in our recruiting process. If you need any assistance or accommodations due to a disability, please let us know at accommodations-ext@meta.com.
$114,000/year to $172,000/year + bonus + equity + benefits
Individual compensation is determined by skills, qualifications, experience, and location. Compensation details listed in this posting reflect the base hourly rate, monthly rate, or annual salary only, and do not include bonus, equity or sales incentives, if applicable. In addition to base compensation, Meta offers benefits. Learn more about benefits at Meta.

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