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Automation Verification Engineer Jobs (NOW HIRING)

Qualcomm

GSoC Design Verification Engineer

San Diego, CA · On-site

$144K - $176K/yr

Contribute to methodology improvements, automation, reusable verification components, and AI-assisted verification flows. * Develop AI agents that automate engineering tasks across domains workflows.

Voltai

Design Verification Engineer

Palo Alto, CA · On-site

$159K - $195K/yr

Contribute to product direction by exploring how automation can reshape verification methodologies. * Work with customers in a forward deployed capacity when needed, translating real design ...

Intel

Design Verification Engineer

Santa Clara, CA · On-site

$141K - $200K/yr

Intel is seeking a Design Verification Engineer for the Silicon Chassis team. In this role, you ... Proven ability to write clean, reusable, and maintainable verification code and automation scripts ...

Apple

Wireless Radio Verification Engineer

San Diego, CA · On-site

$144K/yr

As a Wireless Radio Verification Engineer, you'll ensure first-time-right silicon success through ... Proficiency with Python, Perl, Bash or similar scripting for automation. Great teammate with ...

Voltai, Inc

Design Verification Engineer

Palo Alto, CA · On-site

$159K - $195K/yr

Contribute to product direction by exploring how automation can reshape verification methodologies. * Work with customers in a forward deployed capacity when needed, translating real design ...

Voltai

Design Verification Engineer

Palo Alto, CA · On-site

$160K - $195K/yr

Contribute to product direction by exploring how automation can reshape verification methodologies. * Work with customers in a forward deployed capacity when needed, translating real design ...

Actalent

Software Verification Engineer

Grand Rapids, MI · On-site

$67.31 - $84.13/hr

Software Verification Engineer We are seeking a hands-on Software Verification Engineer with strong ... Strong proficiency in Python for test automation and verification. * Hands-on experience with ...

Apple

Wireless Design Verification Engineer

San Diego, CA · On-site

$144K - $176K/yr

As a Wireless Design Verification Engineer, you'll ensure first-time-right silicon success through ... Proficiency with Python, Perl, or Bash scripting for automation. Experience with Power-Aware / UPF ...

Baidu USA

Design Verification Engineer

Sunnyvale, CA · On-site

$159K - $194K/yr

Your job responsibilities as a Design Verification Engineer will help the team to verify the ... Develop testbench, test cases, reference model, coverage model and automation of regression suite.

Baidu USA

Design Verification Engineer

Sunnyvale, CA · On-site

$159K - $194K/yr

Your job responsibilities as a Design Verification Engineer will help the team to verify the ... Develop testbench, test cases, reference model, coverage model and automation of regression suite.

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Automation Verification Engineer information

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$107.1K

$163K

How much do automation verification engineer jobs pay per year?

As of Sep 13, 2026, the average yearly pay for automation verification engineer in the United States is $107,126.00, according to ZipRecruiter salary data. Most workers in this role earn between $86,500.00 and $123,500.00 per year, depending on experience, location, and employer.

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Infographic showing various Automation Verification Engineer job openings in the United States as of August 2026, with employment types broken down into 94% Full Time, 2% Part Time, and 4% Contract. Highlights an 85% Physical, 5% Hybrid, and 10% Remote job distribution, with an average salary of $107,126 per year, or $51.5 per hour.

Principal Physical Verification Engineer

Irvine, CA • On-site

Celero Communications, Inc.
See more jobs at Celero Communications, Inc.external

$150K - $250K/yr

Other

Posted 26 days ago

Job description

Principal Physical Verification Engineer

  • Irvine, CA


Principal Full-Chip Physical Verification Engineer
Key Responsibilities
Team & Project Leadership

  • Lead full chip Physical Verification effort

  • Own execution plans, schedules for full-chip

  • Drive accountability for quality, milestones, and tapeout readiness.

  • Conduct full chip and blocks PV checks


Physical Verification Ownership

  • Ownership of full chip verification

  • Work with internal analog team to ensure clean IP delivery

  • Responsible for running and analyzing DRC/ERC/LUP/PERC results

  • Experience with using either ICV or Calibre verification tools

  • Understanding advance TSMC DRC rules


Cross-Functional Collaboration

  • Partner with analog, block, chip top owners to ensure clean floorplan

  • Provide early guidance on corner case requirements

  • Influence floorplan constraints, hierarchy, and implementation strategy

  • Participate in tapeout readiness reviews


Required Qualifications

  • Bachelor’s or Master’s degree in Electrical Engineering or related field.

  • 7+ years of experience with full-chip verifications


Proven hands-on experience with:

  • Physical Verification tool (ICV/Calibre)

  • Able to assemble a flow to support block/chip level PV


Strong expertise in:

  • Floorplanning to avoid DRC/LVS issues

  • Provide guidance to analog IP team to allow for clean integration


Preferred Qualifications

  • Experience in advanced technology nodes (7nm, 5nm, 3nm)

  • Automation skills using Tcl, Python, or shell scripting


Annual Base Salary Range: $150,000 - $250,000 (The final offer will be determined based on job-related skills, experience, qualifications, and location)


Javier Leon
Talent Acquisition
619-227-3193 cell/text
javier.leon@celero.inc
www.celero.inc

#J-18808-Ljbffr

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