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Automation Verification Engineer Jobs in Texas (NOW HIRING)

Design Verification Engineer

Austin, TX ยท On-site

$134K - $164K/yr

Design Verification Engineer ID: 1063 Location: Austin, TX More about this job > Description Design ... Powered by ApplicantStack Hiring Automation Software Privacy Policy | Terms of Use

Design Verification Engineer

Austin, TX ยท On-site

$134K - $164K/yr

Design Verification Engineer ID: 1058 Location: Austin, TX More about this job > Description Design ... Powered by ApplicantStack Hiring Automation Software Privacy Policy | Terms of Use

CPU Verification Engineer

Austin, TX ยท On-site

$134K/yr

The Role and Impact As a CPU Design Verification Engineer , you'll play a pivotal role in ensuring ... Develop automation scripts and tools using Python, Perl, C++, or similar languages to optimize ...

CPU Verification Engineer

Austin, TX ยท On-site

$105K - $200K/yr

Develop automation scripts and tools using Python, Perl, C++, or similar languages to optimize ... developers, and physical design teams to verify complex architectural features * Maintain and ...

AMS Verification Engineer

Richardson, TX ยท On-site +1

$122K/yr

You will develop verification plans, build and debug mixed-signal testbenches, run simulations ... Programming or automation experience with Python, Perl, Tcl, or SKILL * Experience with sensor ...

CPU Verification Engineer

Austin, TX ยท On-site

$134K/yr

The Role and Impact As a CPU Design Verification Engineer , you'll play a pivotal role in ensuring ... Develop automation scripts and tools using Python, Perl, C++, or similar languages to optimize ...

CPU Verification Engineer

Austin, TX ยท On-site

$105K - $200K/yr

Join Intel's Silicon Engineering Group as a CPU Design Verification Engineer, where you will play a ... Maintain and improve existing verification infrastructure, methodologies, and flow automation

Join Intel's Silicon Engineering Group as a CPU Design Verification Engineer, where you will play a ... Maintain and improve existing verification infrastructure, methodologies, and flow automation

Design Verification Engineer

Dallas, TX ยท On-site

$123K - $151K/yr

Scripting skills for regression automation and verification flow development (Python, Tcl, or Perl ... Engineer your future. We empower our employees to truly own their career and development. Come ...

Mixed Signal Verification Engineer

Austin, TX ยท On-site

$134K/yr

... verification engineer. Requirements Key Responsibilities: * Develop verification strategies for ... execution automation, and coverage collection. Proven experience in developing scalable and ...

Design Verification Engineer

Dallas, TX ยท On-site

$123K - $151K/yr

As a Design Verification Engineer, you will work across the full verification cycle - from ... Scripting skills for regression automation and verification flow development (Python, Tcl, or Perl)

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Automation Verification Engineer information

What cities in Texas are hiring for Automation Verification Engineer jobs?

Cities in Texas with the most Automation Verification Engineer job openings:

Infographic showing various Automation Verification Engineer job openings in Texas as of August 2026, with employment types broken down into 90% Full Time, 4% Part Time, 5% Contract, and 1% Nights. Highlights an 85% Physical, 5% Hybrid, and 10% Remote job distribution.

Design Verification Engineer

Austin, TX โ€ข On-site

Correct Designs
11 - 50 employees

$134K - $164K/yr

Contractor

Medical, Retirement

Re-posted yesterday


Job description

Current Openings >> Design Verification Engineer
Design Verification Engineer
Summary
Title: Design Verification Engineer ID: 1063 Location: Austin, TX
More about this job >
Description

Design Verification Engineer

Looking for new challenges?ย  Would you like the variety of a contract position along with long term stability and benefits? Correct Designs can give it all to you.

Correct Designs is currently seeking talented Verification Engineers with prior System Verilog UVM experience to work with our major clients both in Austin, TX, and nationwide. Opportunities span from projects in AI and Machine Learning, processor fabric subsystems,ย SOC/ASICย products for vision processing, aerospaceย FPGAs, medical electronics, RISC-V based SoC,ย ARM based peripherals,ย and mixed signalย DSPs. Successful candidates for this role will supportย verification of advanced CPU/GPU based SOCs.ย ย 

Correct Designs is NOT the typical contracting, staff augmentation firm.ย  Our engineers have respected long term roles with generousย hourly rates in excellent team environments.ย  A typical contract may last 3 years, although we have shorter and even longer term work available. We are well respected in the Design Verification community with clients always seeking new CDI engineers. If you need a few months off between contracts you can take that break and know there will be plenty of work available when you return.ย  If you like the stability of always working, simply move to the next contract with little time off. Correct Designs does provide health care and retirement plan benefits.

We are based in Austin, Texas with clients throughout the US.ย  There are opportunities for both in-person and remote work.ย 
Whether you are an experienced veteran looking for new challenges, or a talented engineer seeking to broaden your experience, we can offer exciting options for your career. ย 
Correct Designs uses E-Verify to confirm work status eligibility.
ย 

RESPONSIBILITIES:

  • Verify complex design blocks using equally complex SV/UVM verification environments
  • Develop and execute pre-silicon verification test plans
  • Develop directed and random verification tests to validate block and IP functionality
  • Develop verification components and tools
  • Develop verification functional coverage using industry standard coverage analysis tools/methods
  • Debug regression failsย 
  • Replicate functional issues found in external environments or post-silicon; review/enhance tests to verify bug fixes

ย REQUIRED SKILLS AND EXPERIENCE:

  • 3 or more years of proven verification experience in a hardware development setting
  • Strong background in SystemVerilog and UVM verification methodologies
  • Strong debug skills and experience with debug tools such as DVE/Verdi
  • Proficiency in Object Oriented programming, computer architecture and data structures
  • Strong analytical/problem solving skills and pronounced attention to details
  • Strong interpersonal and communication skills
  • Must be comfortable working across geographies

DESIRED SKILLS:

  • Experience architecting/developing verification environments and infrastructure, including scripting using Perl, Ruby, Make, or similar
  • Experience in other related domainsย such as formal verification, RTL design, or software development

ย EDUCATION:

Bachelor or Master's in Electrical Engineering, Computer Engineering, or Computer Science

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