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Asic Engineer Jobs in New York (NOW HIRING)

Redolent, Inc.

US_West | Network Design Engineer_L3

NJ · On-site

$102K - $140K/yr

Remote Experienced ASIC Packaging Engineer, Signal Integrity, and Power Integrity focus for its ASIC packaging team to support the development of custom ASICs. ASIC Package Engineer SI/PI ...

New

Redolent, Inc.

US_West | Infrastructure Engineer_L3

NJ · On-site

$110K - $144K/yr

Skills: • C/C++ (Preference: 5) • Python (Preference: 5) • ASIC/EDA flow knowledge ... Software Infrastructure Engineer * Local Skills : Julie Skidmore * Languages Required: : English

New

jobr.pro

Hardware Engineer, FPGA

Manhattan, NY · On-site

$100 - $130/hr

As our FPGA Design Engineer, you will own the bridge between RTL and physical silicon: bringing our ... Adapt and implement complex ASIC RTL onto FPGA targets, including multi-clock-domain architectures ...

Normal Computing

Hardware Engineer, FPGA

New York, NY · On-site

$200K - $400K/yr

As our FPGA Design Engineer, you will own the bridge between RTL and physical silicon: bringing our ... Adapt and implement complex ASIC RTL onto FPGA targets, including multi-clock-domain architectures ...

Redolent, Inc.

US_West | Network Design Engineer_L2

NJ · On-site

The diagnostics Software is target to verify ASIC, FPGA, Board and system designs in Engineering as well as Manufacturing. We are looking for motivated individuals, outgoing who enjoy challenging ...

New

BIGDATAAPPTECH LLC

Embedded Software Engineer

Manhattan, NY · On-site

$145K - $190K/yr

Qualifications: * BS/MS in Computer Science, Electrical Engineering, or equivalent experience, with ... and ASIC, is a plus. * Experience with semi-autonomous and autonomous systems is a plus.

Redolent, Inc.

US_West | Infrastructure Engineer_L3

NJ · On-site

$110K - $144K/yr

... ASIC flow Experience in development in Linux based environments (Bash scripting, Makefile) Plus ... CD Infrastructure Python Engineer * Local Skills : Julie Skidmore * Languages Required: : English

New

Normal Computing

Hardware Engineer, RTL

New York, NY · On-site

$200K - $400K/yr

This work sits at the intersection of classical ASIC design, novel computing architectures, and a ... This is a role for an engineer who collaborates effectively across teams, including architecture ...

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Showing results 21-40

All JobsAsic Engineer JobsAsic Engineer Jobs in New York

Asic Engineer information

See New York salary details

$90.3K

$173.1K

$183.3K

How much do asic engineer jobs pay per year?

As of Sep 7, 2026, the average yearly pay for asic engineer in New York is $173,125.00, according to ZipRecruiter salary data. Most workers in this role earn between $181,600.00 and $181,600.00 per year, depending on experience, location, and employer.

What is an ASIC engineer?

An ASIC Engineer works with the design and verification of an Application-Specific Integrated Circuit (ASIC). This type of integrated circuit is designed for a specified purpose, like digital voice recording or cryptocurrency mining. An ASIC engineer has experience and skills that they use to program the integrated circuit based on defined requirements. They are capable of designing and producing ASICs that have over 100 million logic gates.

What are some typical challenges faced by ASIC engineers during the design and verification process?

ASIC Engineers often face challenges such as meeting tight performance, power, and area constraints while ensuring design correctness. Debugging complex issues during simulation and post-silicon validation can be time-consuming and require strong problem-solving skills. Additionally, coordinating with cross-functional teams—such as software, hardware, and verification engineers—is crucial to resolve integration issues and keep projects on schedule. Staying updated with evolving EDA tools and industry standards is also important for success in this role.

What are the key skills and qualifications needed to thrive as an ASIC engineer, and why are they important?

To thrive as an ASIC Engineer, you need a solid background in digital design, hardware description languages (HDLs) like Verilog or VHDL, and a relevant degree in electrical engineering or a related field. Familiarity with electronic design automation (EDA) tools, simulation software, and knowledge of the ASIC design flow are typically required, with certifications in hardware design being advantageous. Strong problem-solving abilities, attention to detail, and effective communication skills help set top performers apart. These skills are essential for delivering reliable, efficient chip designs while collaborating with cross-functional teams and meeting project specifications.

What is the difference between Asic Engineer vs FPGA Engineer?

AspectAsic EngineerFPGA Engineer
CredentialsBachelor's or Master's in Electrical Engineering, VLSI Design, or related fields; certifications like IEEE or VLSI certificationsBachelor's or Master's in Electrical Engineering, Digital Design, or related fields; similar certifications
Work EnvironmentDesigning and developing custom integrated circuits in labs or design centersImplementing and testing FPGA designs in labs or development environments
Industry UsageUsed in semiconductor companies, electronics manufacturers, and high-performance computingCommon in prototyping, testing, and flexible hardware solutions across industries

While both roles involve digital design and hardware development, Asic Engineers focus on creating custom chips for mass production, whereas FPGA Engineers work on programmable hardware for testing and rapid prototyping. The skills and certifications overlap, but their work environments and end goals differ significantly.

Are ASIC engineers in demand?

ASIC engineers are in high demand due to the growing need for custom integrated circuits in industries like telecommunications, consumer electronics, and automotive. Their expertise in hardware design, verification, and FPGA tools makes them valuable in developing efficient, specialized chips, with job growth expected to remain strong as technology advances.

How much does an ASIC engineer make?

An ASIC engineer's salary varies based on experience, location, and industry, but typically ranges from $80,000 to $150,000 annually. Senior roles or those with specialized skills in hardware description languages and verification tools can earn higher salaries, often exceeding $180,000 per year.

What does an ASIC engineer do?

An ASIC engineer designs, develops, and tests application-specific integrated circuits used in electronic devices. They work with hardware description languages like VHDL or Verilog, perform simulations, and collaborate with cross-functional teams to optimize chip performance and power efficiency. Strong knowledge of digital logic, circuit design, and CAD tools is essential for this role.
More about Asic Engineer jobs

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For Asic Engineer jobs in New York, the most frequently searched job titles are:

What job categories do people searching Asic Engineer jobs in New York look for?

The top searched job categories for Asic Engineer jobs in New York are:

What are popular job titles related to Asic Engineer jobs in NY?

For Asic Engineer jobs in NY, the most frequently searched job titles are:

Asic Engineer jobs near you
Infographic showing various Asic Engineer job openings in New York as of August 2026, with employment types broken down into 93% Full Time, and 7% Contract. Highlights an 100% In-person job distribution, with an average salary of $173,125 per year, or $83.2 per hour.

US_West | Network Design Engineer_L3

Redolent, Inc.

NJ • On-site

$102K - $140K/yr

Contractor

Posted 3 days ago

New

Job description

Description:
Possible 3 Month CTH | No Fees | Do Not Re-Post | Confidential
Skype interview is mandatory please provide the candidates skype ID, VIDEO INTERVIEW IS MANDATORY. NO CPT ALLOWED.
Submit candidates under their legal name and use only Capgemini template
Candidate's photo ID IS MANDATORY FOR ALL CANDIDATES EVEN CITIZENS.
In your submission include:
Phone #:
Email address:
Location (City and State):
Relocate:
Availability to start:
Visa type and expiration date:
Hiring Status: C2C/W2/1099QOpen for CTH (y/n):
Timeslots for Skype interview (provide Skype ID)
Due to additional onboarding requirements, a meet and greet is required for all new hires.
Candidates must be willing to go to the closest Capgemini, Client, or offsite location as indicated by project team to meet with a Capgemini team member prior to starting their assignment.
If the candidate is not local, travel will be required at the expense of the Capgemini project team (will receive project code for vendor to submit invoices in SAP Fieldglass for reimbursement). If travel is involved, will send travel policy document for the candidate to adhere to
Vendors: If your candidate is selected for interview, you need to take screenshot of candidate and interviewer once interview is initiated. THIS IS NOW MANDATORY FOR ALL INTERVIEWS to confirm candidate is same as person in CV.
Marie Samayoa
OBO Tactical Procurement | Procurement
Capgemini North America | Guatemala
Email: Marie.samayoa@capgemini.com
Job Description: ASIC Package Engineer SI/PI Engineer
Location: Remote
Experienced ASIC Packaging Engineer, Signal Integrity, and Power Integrity focus for its ASIC packaging team to support the development of custom ASICs.
ASIC Package Engineer SI/PI Responsibilities:
• Drive chip-package-system co-design by driving signal and power integrity requirements analysis and optimization
• Define power tree structure, netlists, etc for High Performance Computing based on 2.5D/3D package technology
• Run pre-layout and post-layout simulation flow with a focus on high-speed interface and PDN, create simulation models and develop simulation methodology for SIPI.
• Develop SIPI validation methodology and develop detailed engineering test plans
• Validate high speed interface and PDN impedance in lab to correlate simulation results and improve design flow
• Work closely with Architecture, ASIC, Mixed Signal, Package, and PCB Design teams to design and ensure package/system SI/PI performance meets expectation before Gerber out, also work closely with Design Validation teams to support SI/PI failure analysis
• Package/Board power delivery network AC+DC simulation for low-voltage/high-current supplies.
• Development of next generation memory interface considering Input/Output Physical Layer (IO PHY), SI/PI and physical design.
• Bachelor or Master degree in Electrical Engineering, Physics, Mathematics, or related field (or equivalent experience)
• 5+ years of experience in SIPI simulation and validation areas
• Experience with high-speed interface protocols such as MIPI, PCIe, memory, HBM and USB.
• Experience using Cadence Sigrity, PowerSI, Ansys SIwave, Keysight ADS, 3D layout and Ansys HFSS
• Experience with consumer hardware design, review and bring-up process, CAD tools, constraint manager etc.
• Solid understanding and experience in computational electromagnetics and transmission line theory.
Named Job Posting? (if Yes - needs to be approved by SCSC)
Additional Details
  • Global Grade : C
  • Named Job Posting? (if Yes - needs to be approved by SCSC) : No
  • Remote work possibility : No
  • Global Role Family : 60239 (P) Cloud Infrastructure
  • Global Technical Skills Family : 6246 (T) Network operate & administration Technologies
  • Local Role Name : ASIC Package Engineer SI/PI Engineer
  • Local Skills : Julie Skidmore
  • Languages Required: : English
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About Redolent

Sourced by ZipRecruiter

Redolent, a dynamic and rapidly expanding company committed to excellence in software solutions, where success is fueled by a combination of technical expertise and efficient management practices. Our solutions create a measurable delta in our clients’ productivity and profitability, contributing to their growth and success.

Industry

It services

Company size

51 - 200 Employees

Headquarters location

San Jose, CA, US

Year founded

2008

Social media

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