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Asic Digital Design Jobs (NOW HIRING)

Ayar Labs

Sr. Staff Engineer, ASIC Design

San Jose, CA · On-site

$180K - $223K/yr

Sr. Staff Engineer, ASIC Design Location: San Jose (on-site) Ayar Labs is shattering AI data ... Develop detailed digital algorithm specifications in collaboration with analog, photonics, and ...

Ayar Labs

Sr. Staff Engineer, ASIC Design

San Jose, CA

$170K - $223K/yr

Sr. Staff Engineer, ASIC Design Location: San Jose (on-site) Ayar Labs is shattering AI data ... Develop detailed digital algorithm specifications in collaboration with analog, photonics, and ...

Apple

ASIC Digital Design Engineer Lead

Cupertino, CA · On-site

$167K/yr

Apple is looking for remarkable applicants for our Display Digital Design lead role to work with multi-functional teams and external vendors to define, develop and productize the next generation of ...

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All JobsAsic Digital Design Jobs

Asic Digital Design information

See salary details

$80.5K

$139.4K

$182.5K

How much do asic digital design jobs pay per year?

As of Jul 16, 2026, the average yearly pay for asic digital design in the United States is $139,368.00, according to ZipRecruiter salary data. Most workers in this role earn between $136,000.00 and $136,000.00 per year, depending on experience, location, and employer.

What is the difference between Asic Digital Design vs FPGA Digital Design?

AspectAsic Digital DesignFPGA Digital Design
Required CredentialsBachelor's or Master's in Electrical Engineering or Computer Engineering; experience with ASIC design toolsBachelor's or Master's in Electrical Engineering or Computer Engineering; familiarity with FPGA development tools
Work EnvironmentDesigning custom chips in semiconductor labs or design housesImplementing and testing designs on FPGA boards in labs or development environments
Industry UsageSemiconductor companies, ASIC design firmsPrototyping, testing, and low-volume production in various industries

Asic Digital Design and FPGA Digital Design share foundational skills in digital logic and hardware description languages. However, Asic Digital Design focuses on creating custom integrated circuits for mass production, requiring detailed knowledge of ASIC fabrication processes. FPGA Digital Design involves programming reconfigurable hardware for testing and prototyping, offering more flexibility and faster deployment. Both roles are essential in hardware development but differ in application, tools, and end-use environments.

More about Asic Digital Design jobs
What cities are hiring for Asic Digital Design jobs? Cities with the most Asic Digital Design job openings:
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Asic Digital Design jobs near you
Infographic showing various Asic Digital Design job openings in the United States as of July 2026, with employment types broken down into 95% Full Time, 1% Part Time, 2% Contract, and 2% Summer. Highlights an 89% Physical, 6% Hybrid, and 5% Remote job distribution, with an average salary of $139,368 per year, or $67 per hour.
ASIC Digital Design, Staff Engineer - 18138

ASIC Digital Design, Staff Engineer - 18138

Synopsys

Boxborough, MA • On-site

$114K/yr

Full-time

Posted 10 days ago

Job description

General Information
Job Title
ASIC Digital Design, Staff Engineer -18138
Job ID
18138
City
Boxborough
State/Province
Massachusetts
Date Posted
07-Jul-2026
Job Category
Engineering
Job Subcategory
ASIC Digital Design
Hire Type
Employee
Remote Eligible
No
Base Salary Range: $114000 - $170000
Descriptions & Requirements
Job Description and Requirements
We Are
Synopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions, and design services. We partner closely with our customers across a wide range of industries to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow.
You Are
You bring extensive ASIC digital design experience with a track record of delivering production RTL for complex semiconductor IP. Your expertise encompasses timing closure, power optimization, and design quality across advanced process nodes.
You work effectively across organizational boundaries, collaborating with architecture, analog, verification, and physical design teams. You manage technical tradeoffs systematically, balancing performance, area, and power requirements while maintaining schedule commitments. When faced with evolving specifications, you provide data-driven analysis and practical solutions. At Synopsys, you will contribute to LPDDR PHY IP that powers mobile and AI applications in production silicon worldwide.
What You'll Be Doing
  • Design RTL modules for LPDDR PHY IP from microarchitecture through synthesis-ready implementation
  • Optimize designs to meet timing, power, and area targets across multiple process nodes
  • Develop automation for design generation and flow integration
  • Collaborate with cross-functional teams to resolve timing and power challenges
  • Contribute to design reviews and methodology development

The Impact You Will Have
  • Your designs will enable LPDDR PHY IP deployed in high-volume mobile, automotive, and AI products
  • You will contribute to a major revenue-generating product line for Synopsys
  • Your work will define performance characteristics for customer systems-on-chip
  • Your automation will improve design efficiency across the engineering team
  • Your expertise will influence architectural decisions for future products

What You'll Need
  • Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or related field
  • 5+ years of ASIC digital design experience with RTL ownership in production silicon
  • Expert Verilog proficiency for timing-critical designs
  • Strong Perl scripting skills for design automation
  • Deep knowledge of synthesis, timing analysis, and power optimization
  • Experience with PHY IP or high-speed interfaces is preferred

Who You Are
  • You understand how RTL structure affects timing and power outcomes
  • You communicate effectively across technical disciplines
  • You produce maintainable code that supports collaboration
  • You identify process improvements proactively
  • You resolve technical issues through systematic analysis

The Team You'll Be Part Of
You will join the team responsible for microarchitecture and front-end design of LPDDR PHY IP. This core product generates significant revenue and enables critical functionality in customer designs across mobile, automotive, and AI markets.
Rewards and Benefits
We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.
At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.
In addition to the base salary, this role may be eligible for an annual bonus, equity, and other discretionary bonuses. Synopsys offers comprehensive health, wellness, and financial benefits as part of a competitive total rewards package. The actual compensation offered will be based on a number of job-related factors, including location, skills, experience, and education. Your recruiter can share more specific details on the total rewards package upon request. The base salary range for this role is across the U.S.
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About Synopsys

Sourced by ZipRecruiter

Synopsys, Inc. (Nasdaq:SNPS) is the Silicon to Software partner for creative companies developing the electronic products and software applications we rely on every single day. As the world's 15th largest software company, Synopsys has a long history of being a global leader in electronic design automation (EDA) and semiconductor IP and is also growing its leadership in software quality and security solutions. Whether you're a system-on-chip (SoC) designer building advanced semiconductors, or a software developer writing applications that require the highest quality and security, Synopsys has the solutions needed to deliver exceptional, secure products for the era of connected everything. The company is headquartered in Mountain View, California, and has approximately 113 offices located throughout North America, South America, Europe, Japan, Asia and India. Since 1986, Synopsys has been at the heart of accelerating electronics innovation with engineers around the world having used Synopsys technology to successfully design and create billions of chips and systems that are found in the electronics that people rely on every single day.

Industry

Computer and computer peripheral equipment and software wholesalers

Company size

10,000+ Employees

Headquarters location

Mountain View, CA, US

Year founded

1986

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