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Asic Design Engineer Jobs in Ontario (NOW HIRING)

Responsibilities About the Department Central DFX (CDFX) is a centralized ASIC design group within AMD's Technology and Engineering organization. CDFX has a global footprint with design teams located ...

This team is a group of highly experienced ASIC design engineers working on High speed (>2G) designs with very complex clocking infrastructures. The team owns implementation activities including ...

Proven experience with ASIC design tools: synthesis, linting, simulation, debugging, power aware simulation, etc. * Relevant design domain specific knowledge and technical leadership capability ...

Our engineering team lives at the intersection of high-performance DSP design, system modeling, and ... Collaborate with cross-functional teams (analog design, ASIC design, electro-optical hardware ...

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Asic Design Engineer information

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$76K

$155K

$246.5K

How much do asic design engineer jobs pay per year?

As of Aug 21, 2026, the average yearly pay for asic design engineer in Ontario is $155,045.00, according to ZipRecruiter salary data. Most workers in this role earn between $128,500.00 and $176,500.00 per year, depending on experience, location, and employer.

What is an ASIC design engineer?

ASIC Design Engineers are professionals who design and develop Application-Specific Integrated Circuits (ASICs), which are custom-built semiconductor chips tailored for specific applications or products. They are responsible for the entire design process, including architecture definition, logic design, verification, synthesis, and sometimes physical layout. Their work is crucial in industries like consumer electronics, telecommunications, automotive, and more, ensuring that devices have optimized performance, power efficiency, and functionality for their intended uses.

What does an ASIC design engineer do?

An application specific integrated circuit (ASIC) is an electronic circuit created for a specific purpose, rather than for general use. ASIC design engineers create product design specification (PDS) statements for ASIC, optimize logic design, and create architectural design models. ASIC design engineers often work on a team to deliver ASIC design solutions for standard and complex computing. Knowledge of computer-aided design (CAD) tools, logic simulation, Verilog, and other hardware description languages (HDLs) is integral to career success.

What are the key skills and qualifications needed to thrive as an ASIC design engineer, and why are they important?

To thrive as an ASIC Design Engineer, you need a solid background in electrical engineering, digital logic design, and proficiency with hardware description languages like Verilog or VHDL, usually backed by a relevant degree. Familiarity with EDA tools such as Synopsys or Cadence and knowledge of simulation and verification methodologies are typically required. Strong problem-solving abilities, attention to detail, and effective teamwork set outstanding engineers apart in this role. These skills and qualities are vital for delivering complex, high-performance integrated circuits that meet strict specifications and project deadlines.

What are some common challenges faced by ASIC design engineers during the design and verification phases?

ASIC Design Engineers often encounter challenges such as meeting strict performance and power constraints while ensuring that the design remains within budget and time limits. Debugging complex logic errors during simulation and verification can be particularly demanding, as small mistakes can have significant downstream effects. Additionally, effective communication with cross-functional teams—including software, hardware, and validation engineers—is essential to resolve integration issues and meet project milestones. Adapting to rapidly evolving tools and technologies is also a key part of the role.

What is the difference between Asic Design Engineer vs FPGA Design Engineer?

AspectAsic Design EngineerFPGA Design Engineer
CredentialsBachelor's/Master's in Electrical Engineering or Computer EngineeringBachelor's/Master's in Electrical Engineering or Computer Engineering
Work EnvironmentDesigning custom chips for manufacturingDeveloping programmable logic designs for prototyping and deployment
Industry UsageSemiconductor companies, consumer electronics, automotivePrototyping, testing, and specialized hardware applications

Both roles require similar educational backgrounds and often overlap in skills like HDL programming. However, Asic Design Engineers focus on creating chips for mass production, while FPGA Design Engineers work on flexible, reprogrammable hardware for testing and specific applications.

Are ASIC design engineers in demand?

ASIC design engineers are in high demand due to the growth of semiconductor technology, consumer electronics, and data centers. Skills in hardware description languages like VHDL or Verilog, along with experience in FPGA and ASIC development, increase employability in this field.

How much does an ASIC design engineer make?

The average salary for an ASIC design engineer typically ranges from $80,000 to $150,000 annually, depending on experience, location, and company size. Senior engineers with specialized skills in hardware description languages and verification tools can earn higher salaries, often exceeding $180,000.

What are the most commonly searched types of Asic Design Engineer jobs in Ontario?

The most popular types of Asic Design Engineer jobs in Ontario are:

What are popular job titles related to Asic Design Engineer jobs in Ontario?

For Asic Design Engineer jobs in Ontario, the most frequently searched job titles are:

What job categories do people searching Asic Design Engineer jobs in Ontario look for?

The top searched job categories for Asic Design Engineer jobs in Ontario are:

Infographic showing various Asic Design Engineer job openings in Ontario as of August 2026, with employment types broken down into 81% Full Time, 16% Part Time, and 3% Contract. Highlights an 82% Physical, 5% Hybrid, and 13% Remote job distribution, with an average salary of $155,045 per year, or $74.5 per hour.

DFT Design Engineer

Amd

Thornhill, ON • On-site

Full-time

Posted 24 days ago


Advanced Micro Devices rating

8.6

Company rating: 8.6 out of 10

Based on 13 frontline employees who took The Breakroom Quiz

27th of 159 rated electronics manufacturers


Job description

ADVANCE YOUR CAREER. ADVANCE THE WORLD.

At AMD, we believe technology can change lives for the better. It can heal us, entertain us, and make us more connected, productive, and understanding of the world around us. And we're looking for talent who feel the same: people who want to leave the planet better than they found it, those who don't shy away from humanity's challenges but are determined to help solve them.

AMD is powering the next generation of supercomputing, high-performance computing, cloud, and AI. Whether you're designing next-gen processors, enabling AI breakthroughs, or creating go-to-market plans, every role at AMD contributes to something bigger - technology that moves the world forward.

Responsibilities

About the Department

Central DFX (CDFX) is a centralized ASIC design group within AMD's Technology and Engineering organization.  CDFX has a global footprint with design teams located in several AMD offices in North America and Asia.  Our mandate is to optimize and standardize design methodology, design and implementation of critical Design-for-Test (DFT) and Design-for-Debug (DFD) features for complex state-of-the-art APU computing, game console and GPU graphics products.  It is also responsible for DFX design methodology and CAD automation tools development to support the global DFX engineering teams across AMD.

THE PERSON:

You have a passion for modern, complex processor architecture, digital design, and verification in general. You are a team player who has excellent communication skills. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems. 

KEY RESPONSIBILITIES:

  • Lead a team of DFT engineers, providing technical direction, mentorship, and performance feedback.
  • Understand Design-for-Test (DFT)  architecture
  • Implement and deploy automated design flows to implement DFT features in a complex SOC ASIC design or IP subsystem
  • Setup and execute design checks using both industry standard and in-house tools
  • Deliver Perl, python, TCL scripts that provide scalable solutions key to DFT implementation
  • Monitor CAD and/or IP regression results, debug failures and analyze coverage
  • Develop in-house automation, utilities, intranet web portal, AI/ML applications

PREFERRED EXPERIENCE:

  • Experience with Perl/Python/Shell scripting, C++, SQL
  • Experience with AI/ML application 
  • Good object oriented programming skills
  • Digital circuits and VLSI knowledge
  • Strong problem solving skills
  • Good written and oral communication skills
  • Team player with strong interpersonal skills

ACADEMIC CREDENTIALS:

  • Bachelors or Masters degree in computer engineering/Electrical Engineering

LOCATION: Markham, ON

#LI-MR1

Qualifications

Benefits offered are described:  AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process.

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position.  AMD's "Responsible AI Policy" is available here.

 

This posting is for an existing vacancy.

Employment Type: FULL_TIME

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