ZipRecruiter

Log In

1

Asic Design Engineer Jobs in Massachusetts (NOW HIRING)

Prattwhitney

$86.80 - $165.20/hr

As a Senior FPGA Design Engineer you will develop FPGA designs for all major vendors and device ... FPGA/ASIC design (VHDL and/or Verilog coding) or FPGA/ASIC verification (SystemVerilog coding)

previous pagenext page

Showing results 21-40

All JobsAsic Design Engineer JobsAsic Design Engineer Jobs in Massachusetts

Asic Design Engineer information

See Massachusetts salary details

$102.7K

$164K

$220.6K

How much do asic design engineer jobs pay per year?

As of Aug 17, 2026, the average yearly pay for asic design engineer in Massachusetts is $164,032.00, according to ZipRecruiter salary data. Most workers in this role earn between $143,600.00 and $196,600.00 per year, depending on experience, location, and employer.

What is an ASIC design engineer?

ASIC Design Engineers are professionals who design and develop Application-Specific Integrated Circuits (ASICs), which are custom-built semiconductor chips tailored for specific applications or products. They are responsible for the entire design process, including architecture definition, logic design, verification, synthesis, and sometimes physical layout. Their work is crucial in industries like consumer electronics, telecommunications, automotive, and more, ensuring that devices have optimized performance, power efficiency, and functionality for their intended uses.

What does an ASIC design engineer do?

An application specific integrated circuit (ASIC) is an electronic circuit created for a specific purpose, rather than for general use. ASIC design engineers create product design specification (PDS) statements for ASIC, optimize logic design, and create architectural design models. ASIC design engineers often work on a team to deliver ASIC design solutions for standard and complex computing. Knowledge of computer-aided design (CAD) tools, logic simulation, Verilog, and other hardware description languages (HDLs) is integral to career success.

What are the key skills and qualifications needed to thrive as an ASIC design engineer, and why are they important?

To thrive as an ASIC Design Engineer, you need a solid background in electrical engineering, digital logic design, and proficiency with hardware description languages like Verilog or VHDL, usually backed by a relevant degree. Familiarity with EDA tools such as Synopsys or Cadence and knowledge of simulation and verification methodologies are typically required. Strong problem-solving abilities, attention to detail, and effective teamwork set outstanding engineers apart in this role. These skills and qualities are vital for delivering complex, high-performance integrated circuits that meet strict specifications and project deadlines.

What are some common challenges faced by ASIC design engineers during the design and verification phases?

ASIC Design Engineers often encounter challenges such as meeting strict performance and power constraints while ensuring that the design remains within budget and time limits. Debugging complex logic errors during simulation and verification can be particularly demanding, as small mistakes can have significant downstream effects. Additionally, effective communication with cross-functional teams—including software, hardware, and validation engineers—is essential to resolve integration issues and meet project milestones. Adapting to rapidly evolving tools and technologies is also a key part of the role.

What is the difference between Asic Design Engineer vs FPGA Design Engineer?

AspectAsic Design EngineerFPGA Design Engineer
CredentialsBachelor's/Master's in Electrical Engineering or Computer EngineeringBachelor's/Master's in Electrical Engineering or Computer Engineering
Work EnvironmentDesigning custom chips for manufacturingDeveloping programmable logic designs for prototyping and deployment
Industry UsageSemiconductor companies, consumer electronics, automotivePrototyping, testing, and specialized hardware applications

Both roles require similar educational backgrounds and often overlap in skills like HDL programming. However, Asic Design Engineers focus on creating chips for mass production, while FPGA Design Engineers work on flexible, reprogrammable hardware for testing and specific applications.

Are ASIC design engineers in demand?

ASIC design engineers are in high demand due to the growth of semiconductor technology, consumer electronics, and data centers. Skills in hardware description languages like VHDL or Verilog, along with experience in FPGA and ASIC development, increase employability in this field.

How much does an ASIC design engineer make?

The average salary for an ASIC design engineer typically ranges from $80,000 to $150,000 annually, depending on experience, location, and company size. Senior engineers with specialized skills in hardware description languages and verification tools can earn higher salaries, often exceeding $180,000.
More about Asic Design Engineer jobs

What are the most commonly searched types of Asic Design Engineer jobs in Massachusetts?

The most popular types of Asic Design Engineer jobs in Massachusetts are:

What are popular job titles related to Asic Design Engineer jobs in Massachusetts?

For Asic Design Engineer jobs in Massachusetts, the most frequently searched job titles are:

What job categories do people searching Asic Design Engineer jobs in Massachusetts look for?

The top searched job categories for Asic Design Engineer jobs in Massachusetts are:

What cities in Massachusetts are hiring for Asic Design Engineer jobs?

Cities in Massachusetts with the most Asic Design Engineer job openings:

What are popular job titles related to Asic Design Engineer jobs in MA?

For Asic Design Engineer jobs in MA, the most frequently searched job titles are:

Asic Design Engineer jobs near you
Infographic showing various Asic Design Engineer job openings in Massachusetts as of August 2026, with employment types broken down into 91% Full Time, 6% Part Time, and 3% Contract. Highlights an 82% Physical, 5% Hybrid, and 13% Remote job distribution, with an average salary of $164,032 per year, or $78.9 per hour.

Principal ASIC Test Development Engineer

Hewlett Packard Enterprise Development LP

Westford, MA • Hybrid

Full-time

Re-posted 10 days ago

Job description

Principal ASIC Test Development EngineerThis role has been designed as 'Hybrid' with an expectation that you will work on average 2 days per week from an HPE office.

Who We Are:

Hewlett Packard Enterprise is the global edge-to-cloud company advancing the way people live and work. We help companies connect, protect, analyze, and act on their data and applications wherever they live, from edge to cloud, so they can turn insights into outcomes at the speed required to thrive in today's complex world.Our culture thrives onfinding new and better ways to accelerate what's next.We know varied backgrounds are valued and succeed here. We have the flexibility to manage our work and personal needs.We make bold moves, together, and are a force for good. If you are looking to stretch and grow your career our culture will embrace you.Open up opportunities with HPE.

Job Description:

Individual contributor role responsible for testability solutions of ASICs, memory, and 2.5D SiPs for Juniper's product development and manufacturing. Includes both structured ATE-level test as well as system-level/mission-mode (functional) environments.

Roles

  • Responsible for developing test strategy and DFT (Design-for-Test) solutions for ASICs and 2.5D SiP (System-in-Package) that supports high test coverage requirements of components and systems.

  • This role concentrates on Pre-P0 development and works between HW Eng development teams and Supplier Development Teams

  • Works closely with design teams to enable the DFT features in ASICs, validate on ATE, integrate in diagnostics, and implement in manufacturing tests

  • Development of innovative DFT IP in collaboration with cross-functional teams inside and outside the company

  • Work closely with component engineers to resolve high DPPM ASIC issues at EMS partner sites

  • Engage in test standard working groups, such as IEEE 1149, 1687, P1838, JC-42 Solid State Memories

  • Trusted advisor on ASIC testability to Juniper teams including ASIC frontend, physical design, DFT, system software, diagnostics, hardware and manufacturing test teams. The influence occurs from the beginning (ASIC kick-off) to production release.

  • Key advocate recognizing and solving structural vs functional test coverage gaps, as well as weaving in new fault models for advanced semiconductor technology nodes

  • Demonstrated innovation via patents, published technical papers and conference presentations

  • Ownership of ASIC test requirements for ASIC MRDs, phase exit validation, advanced test mode development, fault coverage attainment, achievement of manufacturability objectives and continuous improvement

  • Voice of test authority with ASIC suppliers -- working closely with their product/test teams, quality, design engineering and technologists to correlate and eradicate ASIC failures in our systems with their wafer test, package test and BLCT-1. Able to independently solve NTF (No-Trouble-Found) supplier issues, via creating unique ATE-level tests to solve such issues, per strong knowledge of a chip's design.

  • Responsible for influencing supplier testing to implement Juniper-favorable manufacturability modes at their production test

Qualifications

  • Demonstrated Principal or Distinguished Engineer expertise

  • A minimum of 15+ years of experience in testability and DFT area for ASICs, memories, and 2.5D SiPs

  • Excellent knowledge of state-of-the-art DFT techniques in MBIST, IOBIST, LBIST, JTAG, scan/ATPG, and 1687

  • Strong working level experiences on ASIC DFT implementation, post-silicon validation, debug, and diagnostic integration

  • Exposure to various semiconductor test challenges and solutions for high-performance ASICs, TSV, HBM (High Bandwidth Memory) DRAM, 2.5D, and 3D ICs

  • Broad experiences with ASIC suppliers, IP/EDA vendors, 2.5D SiP ecosystems partners, and contract manufacturers

  • Excellent communication, collaboration and program management skill set. Able to independently influence others.

Education: BS, MS or PhD Electrical Engineering

What We Can Offer You:

Health & Wellbeing

We strive to provide our team members and their loved ones with a comprehensive suite of benefits that supports their physical, financial and emotional wellbeing.

Personal & Professional Development

We also invest in your career because the better you are, the better we all are. We have specific programs catered to helping you reach any career goals you have - whether you want to become a knowledge expert in your field or apply your skills to another division.

Unconditional Inclusion

We are unconditionally inclusive in the way we work and celebrate individual uniqueness. We know varied backgrounds are valued and succeed here. We have the flexibility to manage our work and personal needs. We make bold moves, together, and are a force for good.

Let's Stay Connected:

Follow @HPECareers on Instagram to see the latest on people, culture and tech at HPE.

Job:

Engineering

Job Level:

TCP_05"The expected salary/wage range for this position is provided below. Actual offer may vary from this range based upon geographic location, work experience, education/training, and/or skill level.
- United States of America: Annual Salary USD 153,500 - 291,500 in Massachusetts // 153,500 - 310,500 in California // 135,000 - 310,500 in Texas
The listed salary range reflects base salary. Variable incentives may also be offered."

Information about employee benefits offered in the US can be found at https://myhperewards.com/main/new-hire-enrollment.html

HPE is an Equal Employment Opportunity/ Veterans/Disabled/LGBT employer. We do not discriminate on the basis of race, gender, or any other protected category, and all decisions we make are made on the basis of qualifications, merit, and business need. Our goal is to be one global team that is representative of our customers, in an inclusive environment where we can continue to innovate and grow together. Please click here: Equal Employment Opportunity.

Hewlett Packard Enterprise is EEO Protected Veteran/ Individual with Disabilities.

HPE will comply with all applicable laws related to employer use of arrest and conviction records, including laws requiring employers to consider for employment qualified applicants with criminal histories.

No Fees Notice & Recruitment Fraud Disclaimer

It has come to HPE's attention that there has been an increase in recruitment fraud whereby scammer impersonate HPE or HPE-authorized recruiting agencies and offer fake employment opportunities to candidates. These scammers often seek to obtain personal information or money from candidates.

Please note that Hewlett Packard Enterprise (HPE), its direct and indirect subsidiaries and affiliated companies, and its authorized recruitment agencies/vendorswill never charge any candidate a registration fee, hiring fee, or any other fee in connection with its recruitment and hiring process.The credentials of any hiring agency that claims to be working with HPE for recruitment of talent should be verified by candidates and candidates shall be solely responsible to conduct such verification. Any candidate/individual who relies on the erroneous representations made by fraudulent employment agencies does so at their own risk, and HPE disclaims liability for any damages or claims that may result from any such communication.

Apply