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Analog Ic Design Engineer Jobs (NOW HIRING)

Lightmatter

Analog IC Design Engineer, AMS

Boston, MA · On-site

$190K - $230K/yr

Collaborate with members of our design engineering teams (system, digital, analog, photonics/laser ... Experience interfacing with Silicon photonics (MZM, Ring) or laser IC is a plus * Experience in ...

Apple

RF/Analog Mixed Signal Design Engineer

Cupertino, CA · On-site

$249K/yr

Description RF/Analog Mixed Signal Design Engineer will work on transistor level IC design implementation for Apple Silicon in different technology nodes. Minimum Qualifications BS and a minimum of ...

OMNIVISION

Analog Design Engineer

Santa Clara, CA

$156K - $160K/yr

Analog Design Engineer Job Duties: Conduct design and development of image sensor technologies ... Testing and troubleshooting power IC. * Using lab equipment testing specific IC. * Photonic device ...

OMNIVISION

Analog Design Engineer

Santa Clara, CA · On-site

$156K - $160K/yr

Analog Design Engineer Job Duties: Conduct design and development of image sensor technologies ... Testing and troubleshooting power IC. * Using lab equipment testing specific IC. * Photonic device ...

OMNIVISION

Analog Design Engineer

Santa Clara, CA · On-site

Analog Design Engineer Job Duties: Conduct design and development of image sensor technologies ... Testing and troubleshooting power IC. * Using lab equipment testing specific IC. * Photonic device ...

Biotronik

Staff IC Design Engineer, Analog

Lake Oswego, OR · On-site

$207K/yr

Staff IC Design Engineer, Analog The Staff IC Design Engineer provides advanced technical expertise and individual contributions across the innovation, design, and development of low-power, mixed ...

Nokia

Senior Analog EDA/CAD ASIC Engineer

Sunnyvale, CA · On-site

$237K/yr

The engineer will be hands-on with all phases of tool flow including foundry interface, PDK ... Expert in high-speed analog and mixed-signal IC design concepts and must demonstrate superior ...

Elevate Semiconductor

Analog Design Engineer

San Diego, CA · On-site

$214K/yr

As an Analog Design Engineer, you will be part of a collaborative team developing leading edge ATE ... Support IC characterization and test development to qualify for ATE specific parameters and use ...

Elevate Semiconductor

Analog Design Engineer

San Diego, CA · On-site

$214K/yr

As an Analog Design Engineer, you will be part of a collaborative team developing leading edge ATE ... Support IC characterization and test development to qualify for ATE specific parameters and use ...

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Analog Ic Design Engineer information

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How much do analog ic design engineer jobs pay per year?

As of Aug 7, 2026, the average yearly pay for analog ic design engineer in the United States is $142,396.00, according to ZipRecruiter salary data. Most workers in this role earn between $117,500.00 and $139,000.00 per year, depending on experience, location, and employer.

What is an analog IC design engineer?

An Analog IC Design Engineer is responsible for designing, simulating, and testing analog integrated circuits used in various applications like power management, communication systems, and sensor interfaces. They work with technologies such as CMOS and BiCMOS to develop circuits like amplifiers, oscillators, and voltage regulators. Their role includes schematic design, layout supervision, performance optimization, and ensuring the circuit meets specifications for power, speed, and reliability. Typically, they use simulation tools like SPICE and collaborate with layout engineers and verification teams to bring designs to production.

What are the key skills and qualifications needed to thrive in the analog IC design engineer position, and why are they important?

To thrive as an Analog IC Design Engineer, you need a deep understanding of analog circuit theory, semiconductor physics, and hands-on experience with IC design tools such as Cadence or Mentor Graphics, typically supported by a degree in electrical engineering. Proficiency with simulation and layout tools, as well as knowledge of design verification methodologies, is essential, and certifications like Professional Engineer (PE) can be beneficial. Strong problem-solving skills, attention to detail, and effective communication are valuable soft skills in this field. These capabilities are critical for developing reliable, high-performance integrated circuits and collaborating efficiently within multidisciplinary engineering teams.

What are the typical daily responsibilities of an analog IC design engineer?

As an Analog IC Design Engineer, your daily tasks typically involve designing, simulating, and verifying analog and mixed-signal integrated circuit blocks using specialized EDA tools. You may collaborate closely with layout engineers, digital design teams, and test engineers to ensure successful integration and functionality of the overall chip. Responsibilities also include reviewing design specifications, conducting design reviews, and debugging silicon prototypes. Balancing technical tasks with cross-team communication is key to achieving project milestones and delivering robust, high-quality ICs.

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Analog Ic Design Engineer jobs near you
Infographic showing various Analog Ic Design Engineer job openings in the United States as of August 2026, with employment types broken down into 88% Full Time, 7% Part Time, and 5% Contract. Highlights an 85% Physical, 4% Hybrid, and 11% Remote job distribution, with an average salary of $142,396 per year, or $68.5 per hour.

Senior Analog Design Engineer

Elevate Semiconductor

San Diego, CA • On-site

$115K - $145K/yr

Full-time

Medical, Dental, Vision, Retirement, PTO

Re-posted 15 days ago

Job description

At Elevate Semiconductor, we empower semiconductor and system test customers by creating world class ICs that tackle the industry's most complex automated test equipment challenges. Our innovative team designs the lowest power, highest density solutions to reduce cost of test while pushing performance forward.
As a Senior Analog Design Engineer, you will contribute to the design and optimization of analog circuits used in high performance ATE products. You will work closely with cross functional teams and take ownership of circuit blocks from concept through silicon validation.
This role is based in San Diego, CA and requires the individual to be onsite five days per week.
Responsibilities
  • Design and simulate schematics for a variety of high speed and precision CMOS ATE circuits
  • Perform layout, verification, and post layout simulation including Monte Carlo, SOAC, and corner analysis
  • Participate in mixed signal simulation at the channel and chip levels
  • Develop circuit architectures with a focus on power, performance, and density optimization
  • Support IC characterization, test development, and qualification activities
  • Collaborate with internal teams including digital design, layout, test, and applications

Requirements
  • Bachelor's degree in electrical engineering; Master's degree preferred
  • 5-8 years of professional experience in analog IC design
  • Strong foundation in analog CMOS circuit design
  • Experience designing and analyzing feedback loops including stability and compensation
  • Solid understanding of the full IC design, qualification, and manufacturing cycle
  • Hands on experience with analog and mixed signal EDA tools such as Cadence, Mentor Graphics, or Tanner
  • Experience with LVS and DRC using Cadence or Mentor tools

Benefits
  • 100% Employer Paid Health Insurance (Medical, Dental, Vision)
  • Unlimited Paid Time Off
  • Performance Bonuses
  • Free Lunch Catered in by Local Restaurants
  • Private Equity Options
  • Retirement Plans
  • Sabbatical Program
  • Tuition Reimbursement
  • Volunteer Days
  • Relocation Assistance
  • Conference Attendance Support
  • Biweekly Phone Stipend
  • Employee Assistance Program

The salary range for this role is $115,000.00-$145,000.00. Starting salary will be aligned with your relevant experience and demonstrated capabilities during the interview process. Typically, candidates begin at the initial tier of our compensation range, with placement adjusted for candidates presenting extensive directly applicable experience.

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