Our work in pushing forward fields like AI, analytics, and cloud-to-edge technology is at the heart ... chip designs. Participates actively in the definition of architecture and microarchitecture ...
Our work in pushing forward fields like AI, analytics, and cloud-to-edge technology is at the heart ... chip designs. Participates actively in the definition of architecture and microarchitecture ...
Design Verifciation Principal Engineer
Hillsboro, OR · On-site
$127K - $236K/yr
Overview Rambus, a premier chip and silicon IP provider, is seeking to hire an exceptional Senior ... The successful candidate will participate in pre-silicon RTL Verification activities related to ...
Design Verifciation Principal Engineer
Hillsboro, OR · On-site
$127K - $236K/yr
Overview Rambus, a premier chip and silicon IP provider, is seeking to hire an exceptional Senior ... The successful candidate will participate in pre-silicon RTL Verification activities related to ...
... integration in full chip designs. Participates in the definition of architecture and ... Develop logic design, RTL coding, and simulation for mixed-signal IPs including cell libraries ...
... integration in full chip designs. Participates in the definition of architecture and ... Develop logic design, RTL coding, and simulation for mixed-signal IPs including cell libraries ...
Design Verifciation Principal Engineer
Hillsboro, OR · Hybrid
$127K - $236K/yr
Rambus, a premier chip and silicon IP provider, is seeking to hire an exceptional Senior/Principal ... The successful candidate will participate in pre-silicon RTL Verification activities related to ...
New
Design Verifciation Principal Engineer
Hillsboro, OR · Hybrid
$127K - $236K/yr
Rambus, a premier chip and silicon IP provider, is seeking to hire an exceptional Senior/Principal ... The successful candidate will participate in pre-silicon RTL Verification activities related to ...
New
Design Verifciation Principal Engineer
Hillsboro, OR · Hybrid
$127K - $236K/yr
Overview Rambus, a premier chip and silicon IP provider, is seeking to hire an exceptional Senior ... The successful candidate will participate in pre-silicon RTL Verification activities related to ...
Design Verifciation Principal Engineer
Hillsboro, OR · Hybrid
$127K - $236K/yr
Overview Rambus, a premier chip and silicon IP provider, is seeking to hire an exceptional Senior ... The successful candidate will participate in pre-silicon RTL Verification activities related to ...
RTL Design Engineer
$141K/yr
You will be responsible for RTL coding of blocks specified by you or others, including ... Using AI tools for SystemVerilog design, validation, optimization, and understanding GenAI ...
RTL Design Engineer
$141K/yr
You will be responsible for RTL coding of blocks specified by you or others, including ... Using AI tools for SystemVerilog design, validation, optimization, and understanding GenAI ...
RTL Design Engineer
$141K/yr
You will be responsible for RTL coding of blocks specified by you or others, including ... Using AI tools for SystemVerilog design, validation, optimization, and understanding GenAI ...
RTL Design Engineer
$141K/yr
You will be responsible for RTL coding of blocks specified by you or others, including ... Using AI tools for SystemVerilog design, validation, optimization, and understanding GenAI ...
SoC Physical Design Verification Engineer
$129K - $194K/yr
We work directly with the implementation team during the entire chip design cycle to drive signoff ... RTL to GDS physical design flow Scripting skills to debug flow related issues and make enhancements ...
SoC Physical Design Verification Engineer
$129K - $194K/yr
We work directly with the implementation team during the entire chip design cycle to drive signoff ... RTL to GDS physical design flow Scripting skills to debug flow related issues and make enhancements ...
RTL Design Engineer
Beaverton, OR · On-site
You will be responsible for RTL coding of blocks specified by you or others, including ... Using AI tools for SystemVerilog design, validation, optimization, and understanding GenAI ...
RTL Design Engineer
Beaverton, OR · On-site
You will be responsible for RTL coding of blocks specified by you or others, including ... Using AI tools for SystemVerilog design, validation, optimization, and understanding GenAI ...
SoC Physical Design Verification Engineer
$129K - $194K/yr
We work directly with the implementation team during the entire chip design cycle to drive signoff ... RTL to GDS physical design flow Scripting skills to debug flow related issues and make enhancements ...
SoC Physical Design Verification Engineer
$129K - $194K/yr
We work directly with the implementation team during the entire chip design cycle to drive signoff ... RTL to GDS physical design flow Scripting skills to debug flow related issues and make enhancements ...
RTL Design Engineer
Beaverton, OR · On-site
You will be responsible for RTL coding of blocks specified by you or others, including ... Using AI tools for SystemVerilog design, validation, optimization, and understanding GenAI ...
RTL Design Engineer
Beaverton, OR · On-site
You will be responsible for RTL coding of blocks specified by you or others, including ... Using AI tools for SystemVerilog design, validation, optimization, and understanding GenAI ...
FPGA/RTL Design Engineer - III (W2 Only)
Hillsboro, OR · On-site
$134K - $184K/yr
... a test chip Implementing the above mentioned spec/design in RTL Working with pre-silicon ... verification team to develop test-plans and verification collaterals Working with the physical ...
FPGA/RTL Design Engineer - III (W2 Only)
Hillsboro, OR · On-site
$134K - $184K/yr
... a test chip Implementing the above mentioned spec/design in RTL Working with pre-silicon ... verification team to develop test-plans and verification collaterals Working with the physical ...
Overview Rambus, a premier chip and silicon IP provider, is seeking to hire a motivated full-time ... AI and other data-intensive workloads. Our world-class team is the foundation of our company, and ...
Overview Rambus, a premier chip and silicon IP provider, is seeking to hire a motivated full-time ... AI and other data-intensive workloads. Our world-class team is the foundation of our company, and ...
SMTS Verification Engineering
Hillsboro, OR · Hybrid
$108K - $201K/yr
System Verilog testbench, Verilog/System Verilog logic design/RTL fluency a must * Pre-existing ... AI and other data-intensive workloads. Our world-class team is the foundation of our company, and ...
SMTS Verification Engineering
Hillsboro, OR · Hybrid
$108K - $201K/yr
System Verilog testbench, Verilog/System Verilog logic design/RTL fluency a must * Pre-existing ... AI and other data-intensive workloads. Our world-class team is the foundation of our company, and ...
SMTS Verification Engineering
Hillsboro, OR · Hybrid
$108K - $201K/yr
System Verilog testbench, Verilog/System Verilog logic design/RTL fluency a must * Pre-existing ... AI and other data-intensive workloads. Our world-class team is the foundation of our company, and ...
SMTS Verification Engineering
Hillsboro, OR · Hybrid
$108K - $201K/yr
System Verilog testbench, Verilog/System Verilog logic design/RTL fluency a must * Pre-existing ... AI and other data-intensive workloads. Our world-class team is the foundation of our company, and ...
SMTS Verification Engineering
Hillsboro, OR · On-site
$108K - $201K/yr
System Verilog testbench, Verilog/System Verilog logic design/RTL fluency a must * Pre-existing ... AI and other data-intensive workloads. Our world-class team is the foundation of our company, and ...
SMTS Verification Engineering
Hillsboro, OR · On-site
$108K - $201K/yr
System Verilog testbench, Verilog/System Verilog logic design/RTL fluency a must * Pre-existing ... AI and other data-intensive workloads. Our world-class team is the foundation of our company, and ...
... the chip. * Day to day tasks include: writing readable high performance and low power RTL ... NVIDIA uses AI tools in its recruiting processes. NVIDIA is committed to fostering a diverse work ...
... the chip. * Day to day tasks include: writing readable high performance and low power RTL ... NVIDIA uses AI tools in its recruiting processes. NVIDIA is committed to fostering a diverse work ...
Emulation Verification Engineer
$141K - $172K/yr
In this highly transparent role, you will be at the center of a chip design effort collaborating ... RTL to Emulation is a huge plus Good understanding of any Standard Emulator (Palladium, Veloce ...
Emulation Verification Engineer
$141K - $172K/yr
In this highly transparent role, you will be at the center of a chip design effort collaborating ... RTL to Emulation is a huge plus Good understanding of any Standard Emulator (Palladium, Veloce ...
Emulation Verification Engineer
$141K - $172K/yr
In this highly transparent role, you will be at the center of a chip design effort collaborating ... RTL to Emulation is a huge plus Good understanding of any Standard Emulator (Palladium, Veloce ...
Emulation Verification Engineer
$141K - $172K/yr
In this highly transparent role, you will be at the center of a chip design effort collaborating ... RTL to Emulation is a huge plus Good understanding of any Standard Emulator (Palladium, Veloce ...
Emulation Verification Engineer
Beaverton, OR · On-site
$141K - $172K/yr
In this highly transparent role, you will be at the center of a chip design effort collaborating ... Preferred Qualifications Understanding of the tool flow from RTL to Emulation is a huge plus Good ...
Emulation Verification Engineer
Beaverton, OR · On-site
$141K - $172K/yr
In this highly transparent role, you will be at the center of a chip design effort collaborating ... Preferred Qualifications Understanding of the tool flow from RTL to Emulation is a huge plus Good ...
Ai Chip Design Rtl information
See Portland, OR salary details
$85.4K - $95.2K
0% of jobs
$95.2K - $105K
0% of jobs
$105K - $114.9K
1% of jobs
$114.9K - $124.7K
0% of jobs
$124.7K - $134.5K
0% of jobs
$138.6K is the 25th percentile. Wages below this are outliers.
$134.5K - $144.4K
57% of jobs
$148.6K is the 75th percentile. Wages above this are outliers.
$144.4K - $154.2K
38% of jobs
$154.2K - $164K
0% of jobs
$164K - $173.9K
1% of jobs
$173.9K - $183.7K
1% of jobs
$183.7K - $193.5K
1% of jobs
$85.4K
$147.8K
$193.5K
How much do ai chip design rtl jobs pay per year?
What is the difference between Ai Chip Design Rtl vs Ai Chip Verification Engineer?
| Aspect | Ai Chip Design Rtl | Ai Chip Verification Engineer |
|---|---|---|
| Primary Focus | Developing and implementing Register Transfer Level (RTL) code for AI chips | Verifying and validating RTL designs to ensure functionality |
| Skills Required | HDL languages (Verilog/VHDL), digital design, FPGA/ASIC knowledge | Simulation, testbench creation, debugging, scripting skills |
| Work Environment | Design teams, hardware development labs, EDA tools | Verification teams, simulation environments, test setups |
| Certifications | Hardware design certifications, FPGA/ASIC training | Verification methodologies, UVM, SystemVerilog certifications |
While Ai Chip Design Rtl focuses on creating the hardware description code for AI chips, Ai Chip Verification Engineer ensures that the RTL design functions correctly through rigorous testing. Both roles require knowledge of HDL languages and work closely within hardware development teams, but their core responsibilities differ—design versus verification.
What are common challenges faced by AI Chip Design RTL engineers during the verification process?
What is an AI Chip Design RTL engineer?
What skills and qualifications are needed to thrive as an AI Chip Design RTL engineer?

Full-time
Medical, Retirement, PTO
Re-posted 3 days ago
Intel rating
8.7
Based on 147 frontline employees who took The Breakroom Quiz
19th of 156 rated electronics manufacturers
Job description
Intel is shaping the future of technology to help create a better future for the entire world. Our work in pushing forward fields like AI, analytics, and cloud-to-edge technology is at the heart of countless innovations. With a career at Intel, you'll have the opportunity to use technology to power major breakthroughs and create enhancements that improve our everyday quality of life. Join us and help make the future more wonderful for everyone.
Life at Intel
We developed the Intel microprocessors, a foundational technology that powers a diverse range of devices-from entry-level PCs to high-end gaming desktops and laptops, as well as data center solutions and many other applications. As part of our team, you will help design the next generation of high-performance microprocessors. We are looking for a skilled individual who is hands-on with RTL implementation for integer, floating point and reservation station logic and can provide technical leadership to deliver world-class products.
As a CPU RTL Logic Design Engineer your responsibilities will include but are not limited to:
Collaborates, drives and develops logic design, register transfer level (RTL) coding, and simulation for a CPU required to generate cell libraries, functional units, and the CPU IP block for integration in full chip designs.
Participates actively in the definition of architecture and microarchitecture features of the CPU being designed.
Applies various strategies, tools, and methods to write RTL and optimize logic to qualify the design to meet power, performance, area, and timing goals as well as design integrity for physical implementation.
Reviews the verification plan and implementation to ensure design features are verified correctly and resolves and implements corrective measures for failing RTL tests to ensure correctness of features.
Technical Guidance: Provide technical leadership and support to the design team leadership including proposing creative, innovative methodology and process initiatives to consistently improve efficiency and quality.
Cross team collaboration: Work closely with architecture and backend teams and with other design teams towards achieving best-in-class products.
Build a strong and technically vital organization. Cultivate and reinforce appropriate group values, norms and behaviors.
Behavioral traits that we are looking for:
Excellent in problem-solving, analytical
Excellent written and verbal communication skills
Ability to work effectively in a fast-paced environment and collaborative environment
You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.
Minimum Qualifications:
Education Requirement
Bachelor's degree in Computer Science, Electrical, Electronics, Engineering, or related field with 12+ years of work experience OR
Master's degree in Computer Science, Electrical, Electronics, Engineering, or related field with 10+ years of work experience OR
PhD in Computer Science, Electrical, Electronics, Engineering, or related field with 6+ years of work experience.
Minimum Required Qualifications:
6+ years of experience in silicon development in CPU microarchitecture and logic design.
5+ years of experience in technical leadership including delivering successful IP Projects.
6+ years of experience with Timing Closure, Power Convergence; integer and/or floating point, OOO execution, reservation station design
Additional Preferred Qualifications:
Experience on x86 CPU microarchitecture
. Experience with driving front end methodologies and championing the use of automation / AI tools to realize tangible benefits visible at the product level.
Experience would be obtained through a combination of prior education level classes, and current level school classes, projects, research, and relevant previous job and/or internship experience.
Benefits at Intel
Our total rewards package goes above and beyond just a paycheck. Whether you're looking to build your career, improve your health, or protect your wealth, we offer generous benefits to help you achieve your goals. Go to Intel Benefits ' Intel Careers for details of benefits available to you. Intel reserves the right to modify, change or discontinue benefit plans at any time in its sole discretion.
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.
Annual Salary Range for jobs which could be performed in the US: $164,470.00-311,890.00 USDThe range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.Work Model for this Role
This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.*
ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.About Intel
Sourced by ZipRecruiter
Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore's Law to bring smart, connected devices to every person on Earth
Industry
Manufacturing
Company size
10,000+ Employees
Headquarters location
Santa Clara, CA, US
Year founded
1968