ZipRecruiter

Log In

1

Ai Chip Design Rtl Jobs in Portland, OR (NOW HIRING)

Rambus

Design Verifciation Principal Engineer

Hillsboro, OR · Hybrid

$127K - $236K/yr

Rambus, a premier chip and silicon IP provider, is seeking to hire an exceptional Senior/Principal ... The successful candidate will participate in pre-silicon RTL Verification activities related to ...

Apple

RTL Design Engineer

Beaverton, OR

$141K/yr

You will be responsible for RTL coding of blocks specified by you or others, including ... Using AI tools for SystemVerilog design, validation, optimization, and understanding GenAI ...

Apple

RTL Design Engineer

Beaverton, OR

$141K/yr

You will be responsible for RTL coding of blocks specified by you or others, including ... Using AI tools for SystemVerilog design, validation, optimization, and understanding GenAI ...

Apple

RTL Design Engineer

Beaverton, OR · On-site

You will be responsible for RTL coding of blocks specified by you or others, including ... Using AI tools for SystemVerilog design, validation, optimization, and understanding GenAI ...

Apple Inc.

CPU Design Verification Engineer

Beaverton, OR · On-site

$140 - $190/hr

In this highly visible role, you will be at the center of a chip design effort collaborating with ... RTL designers on verifying the functional correctness of the design • Develop test plans and test ...

Apple

RTL Design Engineer

Beaverton, OR · On-site

You will be responsible for RTL coding of blocks specified by you or others, including ... Using AI tools for SystemVerilog design, validation, optimization, and understanding GenAI ...

Intel

Mid-level Physical Design Engineer CPU

Hillsboro, OR

$148K - $152K/yr

... IoT, and AI platforms. As a Mid-level Physical Design Engineer CPU, you will contribute to ... Collaborate with RTL design, verification, clocking, and full-chip teams * Support improvements to ...

Rambus

SMTS Verification Engineering

Hillsboro, OR · Hybrid

$108K - $201K/yr

System Verilog testbench, Verilog/System Verilog logic design/RTL fluency a must * Pre-existing ... AI and other data-intensive workloads. Our world-class team is the foundation of our company, and ...

Apple

Emulation Verification Engineer

Beaverton, OR

$141K - $172K/yr

In this highly transparent role, you will be at the center of a chip design effort collaborating ... RTL to Emulation is a huge plus Good understanding of any Standard Emulator (Palladium, Veloce ...

Apple

Emulation Verification Engineer

Beaverton, OR

$141K - $172K/yr

In this highly transparent role, you will be at the center of a chip design effort collaborating ... RTL to Emulation is a huge plus Good understanding of any Standard Emulator (Palladium, Veloce ...

Apple

Emulation Verification Engineer

Beaverton, OR · On-site

$141K - $172K/yr

In this highly transparent role, you will be at the center of a chip design effort collaborating ... Preferred Qualifications Understanding of the tool flow from RTL to Emulation is a huge plus Good ...

previous pagenext page

Showing results 21-40

All JobsAi Chip Design Rtl JobsAi Chip Design Rtl Jobs in Portland, OR

Ai Chip Design Rtl information

See Portland, OR salary details

$85.4K

$147.8K

$193.5K

How much do ai chip design rtl jobs pay per year?

As of Aug 10, 2026, the average yearly pay for ai chip design rtl in Portland, OR is $147,800.00, according to ZipRecruiter salary data. Most workers in this role earn between $144,200.00 and $144,200.00 per year, depending on experience, location, and employer.

What is the difference between Ai Chip Design Rtl vs Ai Chip Verification Engineer?

AspectAi Chip Design RtlAi Chip Verification Engineer
Primary FocusDeveloping and implementing Register Transfer Level (RTL) code for AI chipsVerifying and validating RTL designs to ensure functionality
Skills RequiredHDL languages (Verilog/VHDL), digital design, FPGA/ASIC knowledgeSimulation, testbench creation, debugging, scripting skills
Work EnvironmentDesign teams, hardware development labs, EDA toolsVerification teams, simulation environments, test setups
CertificationsHardware design certifications, FPGA/ASIC trainingVerification methodologies, UVM, SystemVerilog certifications

While Ai Chip Design Rtl focuses on creating the hardware description code for AI chips, Ai Chip Verification Engineer ensures that the RTL design functions correctly through rigorous testing. Both roles require knowledge of HDL languages and work closely within hardware development teams, but their core responsibilities differ—design versus verification.

What are common challenges faced by AI Chip Design RTL engineers during the verification process?

AI Chip Design RTL engineers often encounter challenges in ensuring their designs meet complex functional and performance requirements, especially given the rapid pace of AI hardware advancements. Verification can be particularly demanding due to the need to simulate and test intricate AI workloads, manage large datasets, and debug subtle timing or logic errors. Collaboration with verification teams, system architects, and software engineers is essential to address these issues efficiently and to ensure seamless integration of the RTL code into the broader chip design. Staying up-to-date with the latest verification tools and methodologies is also crucial for success in this role.

What is an AI Chip Design RTL engineer?

AI Chip Design RTL (Register Transfer Level) engineers are specialists who design the digital logic for chips used in artificial intelligence applications. They use hardware description languages like Verilog or VHDL to create and validate the architecture and functionality of these chips before they are manufactured. Their work ensures that AI processors are efficient, high-performing, and meet the requirements of modern AI workloads. RTL engineers collaborate closely with verification, software, and hardware teams to optimize chip performance and power consumption.

What skills and qualifications are needed to thrive as an AI Chip Design RTL engineer?

To thrive as an AI Chip Design RTL Engineer, you need a solid background in digital design, computer architecture, and proficiency in Hardware Description Languages (HDLs) like Verilog or VHDL, often supported by a degree in electrical or computer engineering. Experience with simulation tools (e.g., ModelSim, Synopsys), ASIC/FPGA design flows, and relevant certifications are highly valued. Strong problem-solving abilities, attention to detail, and effective teamwork and communication skills help you excel in collaborative and complex design environments. These competencies are crucial for creating efficient, reliable AI hardware that meets performance and power requirements in a fast-evolving field.
What are popular job titles related to Ai Chip Design Rtl jobs in Portland, OR? For Ai Chip Design Rtl jobs in Portland, OR, the most frequently searched job titles are:
What job categories do people searching Ai Chip Design Rtl jobs in Portland, OR look for? The top searched job categories for Ai Chip Design Rtl jobs in Portland, OR are:
Ai Chip Design Rtl jobs near you
Infographic showing various Ai Chip Design Rtl job openings in Portland, OR as of August 2026, with employment types broken down into 87% Full Time, 8% Part Time, and 5% Contract. Highlights an 85% Physical, 4% Hybrid, and 11% Remote job distribution, with an average salary of $147,800 per year, or $71.1 per hour.

Mixed Signal Logic Design Engineer

Intel Corporation

Hillsboro, OR • On-site

Full-time

Medical, Retirement, PTO

Re-posted 7 days ago

Intel rating

8.7

Company rating: 8.7 out of 10

Based on 147 frontline employees who took The Breakroom Quiz

19th of 156 rated electronics manufacturers

Job description

Job Details:
Job Description:
Position Overview
Develops the logic design, register transfer level (RTL) coding, and simulation for mixed-signal IPs required to generate cell libraries, functional units, IP blocks, and subsystems for integration in full chip designs. Participates in the definition of architecture and microarchitecture features of the block being designed.
Applies various strategies, tools, and methods for mixed-signal designs including analog behavior modeling and circuit simulation to write RTL and optimize mixed-signal logic to qualify the design to meet power, performance, area, and timing goals as well as design integrity for physical implementation.
Reviews the verification plan and implementation to ensure design features are verified correctly, and resolves and implements corrective measures for failing RTL tests to ensure correctness of features. Supports SoC customers to ensure high quality integration of the IP block.
Key Responsibilities
  • Develop logic design, RTL coding, and simulation for mixed-signal IPs including cell libraries, functional units, IP blocks, and subsystems
  • Participate in the definition of architecture and microarchitecture features of the block being designed
  • Apply strategies, tools, and methods for mixed-signal designs including analog behavior modeling and circuit simulation
  • Write and optimize mixed-signal logic to meet power, performance, area, and timing goals
  • Ensure design integrity for physical implementation
  • Review verification plans and implementation to confirm design features are verified correctly
  • Resolve and implement corrective measures for failing RTL tests to ensure feature correctness
  • Support SoC customers to ensure high-quality integration of the IP block

What We're Looking For
To be successful in this role, you should demonstrate the following professional traits:
  • Cross-functional collaboration - ability to work effectively with analog, digital, and physical design teams throughout the design cycle
  • Ownership mentality - capable of independently designing and owning mixed-signal subsystems and IP blocks end-to-end
  • Strong debugging instincts - skilled at identifying and resolving issues across both analog and digital domains with precision and efficiency

Qualifications:
Minimum Qualifications
You must possess one of the following education and experience combinations to be initially considered for this position:
  • Bachelor's Degree in Electrical Engineering, Computer Science, Electronics and Communications Engineering, or related field with 7+ years of industry experience, OR
  • Master's Degree in Electrical Engineering, Computer Science, Electronics and Communications Engineering, or related field with 4+ years of industry experience

In addition, all candidates must have:
  • Expert-level proficiency in Verilog / SystemVerilog (RTL design)
  • Digital logic fundamentals
  • Experience integrating analog IP with digital logic
  • Deep knowledge of RTL-to-GDSII flow, STA, and CDC
  • Familiarity with EDA tools
  • Understanding of timing, power, and performance trade-offs

Preferred Qualifications
  • Knowledge of Power Delivery and Power Management systems
  • Solid understanding of analog/mixed-signal blocks such as ADCs, DACs, PLLs, and regulators
  • DFT as it relates to mixed-signal HIP
  • Scripting language experience, including Perl, TCL/Tk, or Python
  • Experience with mixed-signal simulation
  • Strong debugging skills across analog and digital domains

Job Type:
Experienced Hire
Shift:
Shift 1 (United States of America)
Primary Location:
US, Oregon, Hillsboro
Additional Locations:
US, California, Santa Clara, US, Massachusetts, Beaver Brook, US, Texas, Austin
Business group:
The Central Engineering Group (CEG) is Intel's data-driven organization that builds scalable engineering solutions across three pillars: Product Enablement (IP, tools, and methodologies), Custom ASIC (leveraging existing IP for custom silicon), and Foundry Enablement (supporting top customers and validating technologies). The team focuses on customer-driven, end-to-end solutions with short development cycles to deliver measurable business impact across Intel's product and foundry businesses.
Posting Statement:
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
Position of Trust
N/A
Benefits
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.
Annual Salary Range for jobs which could be performed in the US: $164,470.00-232,190.00 USD
The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.
Work Model for this Role
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.
ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.

What Intel employees say

Pay

Benefits

Hours and flexibility

Workplace

Get the full story on Breakroom

Intel logo

About Intel

Sourced by ZipRecruiter

Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore's Law to bring smart, connected devices to every person on Earth

Industry

Manufacturing

Company size

10,000+ Employees

Headquarters location

Santa Clara, CA, US

Year founded

1968

View All Intel Jobs

Apply