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Pcie Verification Engineer Jobs in Portland, OR (NOW HIRING)

Apple

Design Verification Engineer

Beaverton, OR · On-site

$141K - $172K/yr

We have an opportunity for an outstandingly hardworking design verification engineer! As a member ... PCIe or USB, parallel protocol such as DDR is a plus but not required Knowledge of formal ...

Apple

Design Verification Engineer

Beaverton, OR · On-site

$141K - $172K/yr

We have an opportunity for an outstandingly hardworking design verification engineer! As a member ... PCIe or USB, parallel protocol such as DDR is a plus but not required Knowledge of formal ...

Apple

Design Verification Engineer

Beaverton, OR · On-site

$141K - $172K/yr

We have an opportunity for an outstandingly hardworking design verification engineer! As a member ... PCIe or USB, parallel protocol such as DDR is a plus but not required Knowledge of formal ...

Apple

Design Verification Engineer

Beaverton, OR

$141K - $172K/yr

We have an opportunity for an outstandingly hardworking design verification engineer! As a member ... PCIe or USB, parallel protocol such as DDR is a plus but not required Knowledge of formal ...

Intel

Director, SoC Design Engineering

Hillsboro, OR · On-site

$148K - $180K/yr

... as PCIe Gen6/7, DDR5/6, and Ethernet into the SoC environment, driving verification success ... Qualifications: Minimum Qualifications - Bachelor's or BS degree in Electrical Engineering ...

Sonsoft Inc

SoC Design and Verification

Hillsboro, OR · On-site

$148K - $180K/yr

At least 2 years of experience in PCIe Logical Phy and PIPE interface pre-silicon verification. * Creating System Verilog / OVM test benches at the IP & SOC level and validating. * At least 1-year ...

Sonsoft Inc

SoC Design and Verification

Hillsboro, OR · On-site

$148K - $180K/yr

At least 2 years of experience in PCIe Logical Phy and PIPE interface pre-silicon verification. * Creating System Verilog / OVM test benches at the IP & SOC level and validating * At least 1 year ...

Rambus

Principal PCIe Logic Design

Hillsboro, OR · On-site

$108K - $201K/yr

Candidates will be joining some of the brightest inventors and engineers in the world to develop ... Collaborate with the verification team to verify the IPs * Participate in prototyping of the IPs in ...

Rambus

Principal PCIe Logic Design

Hillsboro, OR · Hybrid

$108K - $201K/yr

Candidates will be joining some of the brightest inventors and engineers in the world to develop ... Collaborate with the verification team to verify the IPs * Participate in prototyping of the IPs in ...

Rambus

Principal PCIe Logic Design

Hillsboro, OR · Hybrid

$108K - $201K/yr

Candidates will be joining some of the brightest inventors and engineers in the world to develop ... Collaborate with the verification team to verify the IPs * Participate in prototyping of the IPs in ...

Rambus.com

Principal PCIe Logic Design

Hillsboro, OR · On-site

$150 - $200/hr

Candidates will be joining some of the brightest inventors and engineers in the world to develop ... Collaborate with the verification team to verify the IPs * Participate in prototyping of the IPs in ...

Rambus

Lead MTS Logic Design

Hillsboro, OR · Hybrid

$111K - $147K/yr

... Design engineer to join our PCIe, CXL IP design team. Candidates will be joining some of the ... Collaborate with the verification team to verify the IPs * Participate in prototyping of the IPs in ...

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All JobsPcie Verification Engineer JobsPcie Verification Engineer Jobs in Portland, OR

Pcie Verification Engineer information

See Portland, OR salary details

$84.8K

$151.2K

$215.8K

How much do pcie verification engineer jobs pay per year?

As of Sep 8, 2026, the average yearly pay for pcie verification engineer in Portland, OR is $151,249.00, according to ZipRecruiter salary data. Most workers in this role earn between $144,200.00 and $144,200.00 per year, depending on experience, location, and employer.

What does a PCIe verification engineer do?

A PCIe Verification Engineer is responsible for ensuring that PCI Express (PCIe) hardware and systems function correctly and comply with industry standards. They develop and execute test plans, create verification environments, and use simulation tools to find and resolve design issues. Their work is crucial for validating the performance, reliability, and interoperability of PCIe-based products such as computer motherboards, servers, and storage devices. This role typically requires a strong background in digital design, hardware description languages (HDL), and PCIe protocol knowledge.

What are the key skills and qualifications needed to thrive as a PCIe verification engineer, and why are they important?

To thrive as a PCIe Verification Engineer, you need a strong background in digital design, computer architecture, and verification methodologies, typically backed by a degree in electrical or computer engineering. Proficiency with hardware description languages (HDL) like Verilog/SystemVerilog, UVM methodology, simulation tools, and familiarity with PCIe protocol analyzers is essential. Analytical thinking, attention to detail, and effective communication are crucial soft skills for debugging complex issues and collaborating with cross-functional teams. These competencies ensure reliable product validation, compliance with industry standards, and efficient project delivery in high-speed interface development.

What are some common challenges faced by PCIe verification engineers during the verification process?

PCIe Verification Engineers often encounter challenges such as handling the complexity of the PCIe protocol, ensuring compliance with evolving standards, and debugging intricate issues that arise during simulation. The verification process may involve working with large-scale testbenches, managing interoperability testing with different vendors’ devices, and identifying corner-case bugs. Collaboration with both design and software teams is crucial to resolve issues effectively and ensure robust system-level functionality.

What is the difference between Pcie Verification Engineer vs Hardware Verification Engineer?

AspectPcie Verification EngineerHardware Verification Engineer
Required CredentialsBachelor's in Electrical Engineering or Computer Engineering; knowledge of PCIe protocolsBachelor's in Electrical Engineering or Computer Engineering; knowledge of hardware protocols
Work EnvironmentDesign teams, FPGA/ASIC verification labsHardware design and testing labs, FPGA/ASIC environments
Industry UsageSemiconductor, computer hardware, embedded systemsSemiconductor, consumer electronics, aerospace
Common Search/ComparisonYesYes

The Pcie Verification Engineer focuses specifically on verifying PCIe interfaces and protocols within hardware designs, while the Hardware Verification Engineer has a broader scope, testing various hardware components and systems. Both roles require similar technical skills and often work in overlapping environments, but their focus areas differ significantly.

What are popular job titles related to Pcie Verification Engineer jobs in Portland, OR?

For Pcie Verification Engineer jobs in Portland, OR, the most frequently searched job titles are:

What job categories do people searching Pcie Verification Engineer jobs in Portland, OR look for?

The top searched job categories for Pcie Verification Engineer jobs in Portland, OR are:

Pcie Verification Engineer jobs near you

Design Verification Engineer

Beaverton, OR • On-site

Apple
Computer and Electronic Product Manufacturing • 10K+ employees
Learn more about Appleexternal

$141K - $172K/yr

Full-time

Re-posted 16 days ago

Apple rating

8.1

Company rating: 8.1 out of 10

Based on 684 frontline employees who took The Breakroom Quiz

6th of 30 rated technology retailers

Job description

At Apple, we work every single day to craft products that enrich people's lives. Do you love working on challenges that no one has solved yet and changing the game? We have an opportunity for an outstandingly hardworking design verification engineer! As a member of our wide-ranging group, you will have the rare and extraordinary opportunity to craft upcoming products that will delight and encourage millions of Apple's customers daily.
This role is for a DV engineer who will enable us to produce fully functional first silicon for IP designs. The responsibilities include all phases of pre-silicon verification including but not limited to: establishing DV methodology, test-plan development, verification environment development including stimulus and checkers, test-writing, debug, coverage, sign-off for RTL freeze and tape-out.
Description
In this role, you will be responsible for ensuring bug-free first silicon for part of the SoC / IP and are encouraged to develop detailed test and coverage plans based on the micro-architecture You are responsible for developing verification methodology suitable for the IP, ensuring a scalable and portable environment. You will get to develop verification environment, including all the respective components such as stimulus, checkers, assertions, trackers, coverage. A mindset to break the design is highly desirable.
Furthermore, you will learn to develop verification plans for all features under your care, implement verification plans, including design bring-up, DV environment bring- up, regression enabling all features under your care, and debug of the test failures. You will also learn to develop block, IP and SoC level test-benches track and report DV progress using a variety of metrics, including bugs and coverage. You will also be expected to make use of LLM and related technologies to achieve efficient execution and improved quality.
Minimum Qualifications
Minimum requirement of a bachelors degree
Preferred Qualifications
BS degree in technical subject area with minimum 3 years of proven experience or equivalent strongly preferred
Strong knowledge of OOP, SystemVerilog and UVM
Strong knowledge in developing scalable and portable test-benches
Proven experience with verification methodologies and tools such as simulators, waveform viewer, build and run automation, coverage collection, gate level simulations
Some working experience using LLMs for efficiency and quality
Experience with power-aware (UPF) or similar verification methodology
Knowledge of one of the scripting languages such as Python, Perl, TCL
Some experience with serial protocols such as PCIe or USB, parallel protocol such as DDR is a plus but not required
Knowledge of formal verification methodology is a plus but not required
Knowledge of emulation for verification technologies is a plus but not required

What Apple employees say

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About Apple

Sourced by ZipRecruiter

Imagine what you could do here! At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, intelligent people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same real passion for innovation that goes into our products also applies to our practices strengthening our dedication to leave the world better than we found it.

Industry

Computer and electronic product manufacturing

Company size

10,000+ Employees

Headquarters location

Cupertino, CA, US

Year founded

1976

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