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Ai Chip Design Rtl Jobs in Washington (NOW HIRING)

Sparton Corporation

FPGA Developer

Fairfax, VA · On-site

$94K - $156K/yr

  • Medical

  • Dental

  • Vision

  • Life

  • Retirement

  • PTO

... of RTL design for FPGAs in VHDL or Verilog, or System Verilog - knowledge of all 3 strongly ... Implementing AI/ML inference algorithms using Vitis AI * Linux device driver development * Bit ...

Lynk Global, Inc.

Senior FPGA_AIE Engineer

Chantilly, VA · On-site

$110 - $150/hr

Design and test high‑speed FPGA systems for satellite communication systems. * Build with AMD ... Model and implement DSP algorithms in RTL or AMD AIE/AIE‑ML processors. * Implement device driver ...

Lynk

Senior FPGA_AIE Engineer

Chantilly, VA · On-site

$100 - $140/hr

Design and test high‑speed FPGA systems for satellite communication systems. * Build with AMD ... Model and implement DSP algorithms in RTL or AMD AIE/AIE‑ML processors. * Implement device driver ...

One Way Ventures

Senior FPGA_AIE Engineer

Chantilly, VA · On-site

$100 - $130/hr

Design and test high-speed FPGA systems for satellite communication systems. * Build with AMD ... Model and implement DSP algorithms in RTL or AMD AIE/AIE-ML processors. * Implement device driver ...

Lynk

Senior FPGA_AIE Engineer

Chantilly, VA · On-site

$107K - $146K/yr

Design and test high-speed FPGA systems for satellite communication systems. * Build with AMD ... Model and implement DSP algorithms in RTL or AMD AIE/AIE-ML processors. * Implement device driver ...

Logos Technologies, Inc.

Engineer

Fairfax, VA · On-site

... of RTL design for FPGAs in VHDL or Verilog, or System Verilog - knowledge of all 3 strongly ... Implementing AI/ML inference algorithms using Vitis AI * Linux device driver development * Bit ...

Logos Technologies, Inc.

Engineer

Fairfax, VA

... of RTL design for FPGAs in VHDL or Verilog, or System Verilog - knowledge of all 3 strongly ... Implementing AI/ML inference algorithms using Vitis AI * Linux device driver development * Bit ...

Booz Allen Hamilton, Inc.

Embedded FPGA Engineer

Mclean, VA · On-site +1

  • Medical

  • Life

  • Retirement

  • PTO

Experience with porting and adapting vendor RF transceiver reference designs, such as RTL, IP cores ... AI-driven automation for FPGA design, simulation, synthesis, or testing * Master's degree in ...

Logos Technologies, Inc.

Engineer

Fairfax, VA · On-site

... of RTL design for FPGAs in VHDL or Verilog, or System Verilog - knowledge of all 3 strongly ... Implementing AI/ML inference algorithms using Vitis AI * Linux device driver development * Bit ...

Marriott

FLEX Director, Solution Architect

Bethesda, MD · Remote

$67.25 - $88.50/hr

  • Medical

  • Dental

  • Vision

  • Life

  • Retirement

  • PTO

End to end infrastructure lifecycle experience from "chip to chiller" inclusive of servers, storage ... Evaluate emerging AI/GenAI technologies and define adoption strategies Solution Design ...

Accenture Federal Services

Data Architect

Washington, DC · On-site

$72.25 - $92.75/hr

The Chip and Joanna Gaines at developing data pipelines. Like turning a fixer-upper house into the ... Use your expertise to drive data and AI architecture and technology decisions * Provide insights ...

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Ai Chip Design Rtl information

What is the difference between Ai Chip Design Rtl vs Ai Chip Verification Engineer?

AspectAi Chip Design RtlAi Chip Verification Engineer
Primary FocusDeveloping and implementing Register Transfer Level (RTL) code for AI chipsVerifying and validating RTL designs to ensure functionality
Skills RequiredHDL languages (Verilog/VHDL), digital design, FPGA/ASIC knowledgeSimulation, testbench creation, debugging, scripting skills
Work EnvironmentDesign teams, hardware development labs, EDA toolsVerification teams, simulation environments, test setups
CertificationsHardware design certifications, FPGA/ASIC trainingVerification methodologies, UVM, SystemVerilog certifications

While Ai Chip Design Rtl focuses on creating the hardware description code for AI chips, Ai Chip Verification Engineer ensures that the RTL design functions correctly through rigorous testing. Both roles require knowledge of HDL languages and work closely within hardware development teams, but their core responsibilities differ—design versus verification.

What are common challenges faced by AI Chip Design RTL engineers during the verification process?

AI Chip Design RTL engineers often encounter challenges in ensuring their designs meet complex functional and performance requirements, especially given the rapid pace of AI hardware advancements. Verification can be particularly demanding due to the need to simulate and test intricate AI workloads, manage large datasets, and debug subtle timing or logic errors. Collaboration with verification teams, system architects, and software engineers is essential to address these issues efficiently and to ensure seamless integration of the RTL code into the broader chip design. Staying up-to-date with the latest verification tools and methodologies is also crucial for success in this role.

What is an AI Chip Design RTL engineer?

AI Chip Design RTL (Register Transfer Level) engineers are specialists who design the digital logic for chips used in artificial intelligence applications. They use hardware description languages like Verilog or VHDL to create and validate the architecture and functionality of these chips before they are manufactured. Their work ensures that AI processors are efficient, high-performing, and meet the requirements of modern AI workloads. RTL engineers collaborate closely with verification, software, and hardware teams to optimize chip performance and power consumption.

What skills and qualifications are needed to thrive as an AI Chip Design RTL engineer?

To thrive as an AI Chip Design RTL Engineer, you need a solid background in digital design, computer architecture, and proficiency in Hardware Description Languages (HDLs) like Verilog or VHDL, often supported by a degree in electrical or computer engineering. Experience with simulation tools (e.g., ModelSim, Synopsys), ASIC/FPGA design flows, and relevant certifications are highly valued. Strong problem-solving abilities, attention to detail, and effective teamwork and communication skills help you excel in collaborative and complex design environments. These competencies are crucial for creating efficient, reliable AI hardware that meets performance and power requirements in a fast-evolving field.
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Infographic showing various Ai Chip Design Rtl job openings in Washington as of June 2026, with employment types broken down into 83% Full Time, 13% Part Time, and 4% Contract. Highlights an 95% Physical, 2% Hybrid, and 3% Remote job distribution.

Senior FPGA Engineer, Cyber

Anduril Industries

Washington, DC • On-site

$166K - $220K/yr

Other

Posted 8 days ago

Anduril rating

9.1

Company rating: 9.1 out of 10

Anduril

Based on 17 frontline employees who took The Breakroom Quiz

7.4

Company rating compared to similar companies: 7.4 out of 10

Manufacturers average

Based on 75,237 frontline employees who took The Breakroom Quiz

Job description

Anduril Industries is a defense technology company with a mission to transform U.S. and allied military capabilities with advanced technology. By bringing the expertise, technology, and business model of the 21st century's most innovative companies to the defense industry, Anduril is changing how military systems are designed, built and sold. Anduril's family of systems is powered by Lattice OS, an AI-powered operating system that turns thousands of data streams into a realtime, 3D command and control center. As the world enters an era of strategic competition, Anduril is committed to bringing cutting-edge autonomy, AI, computer vision, sensor fusion, and networking technology to the military in months, not years.
ABOUT THE TEAM
Anduril Cyber is focused on positioning Anduril as a lead provider of capabilities to enable offensive cyber missions. Cyber is a new business line at Anduril, and relies upon our fleet of autonomous vehicles, Lattice operating system, mesh networks, and other hardware products to engage in cyber operations at the edge. We design and build novel solutions to deploy cyber capabilities in unconventional or difficult to reach environments Anduril Cyber is hiring a Software Engineer focused on embedded and mission software integration. Strong candidates may lean more heavily toward embedded-platform or mission/backend work, but should be comfortable collaborating across adjacent layers that connect devices, operators, and data products.
ABOUT THE JOB
Anduril Cyber is hiring an FPGA Engineer with deep experience in high-throughput FPGA/SoC digital design, precision timing, and hardware/software integration. The role is defined around the technical depth and execution patterns reflected in the hiring plan and representative resume set without assuming a fixed silicon choice this early.
  • Design and implement high-throughput FPGA datapaths, packetization pipelines, timing-sensitive interfaces, and hardware-near acceleration blocks.
  • Own RTL design, simulation, verification, and lab bring-up across VHDL, Verilog, or SystemVerilog-based workflows.
  • Work closely with DSP, software, hardware, and systems engineers to turn algorithm and interface requirements into robust FPGA implementations.
  • Drive precision timing, synchronization, and throughput closure for the selected FPGA/SoC platform and adjacent high-speed digital interfaces.
  • Document architectures, interfaces, and verification approaches clearly enough for cross-functional integration and long-term maintainability.
  • Support design reviews, technical trade studies, and lab debugging with a hands-on, player-coach engineering mindset.
REQUIRED QUALIFICATIONS
  • Strong experience with FPGA development on Xilinx or comparable platforms, including SoC/MPSoC-based or other high-performance digital devices relevant to SDR systems.
  • Proficiency in VHDL, Verilog, or SystemVerilog, including simulation, timing closure, and resource/performance tradeoffs.
  • Experience building high-speed digital interfaces and datapaths such as Ethernet-based packet movement, DMA-adjacent flows, or streaming signal pipelines.
  • Hands-on familiarity with precision timing, synchronization, sysref/clocking concepts, and deterministic interface behavior.
  • Experience with FPGA verification methodologies and automation, including regression-oriented testbenches and CI-backed validation.
  • Ability to collaborate effectively with software and DSP engineers on register interfaces, control surfaces, and integration boundaries.
  • Comfort debugging in the lab using oscilloscopes, logic analyzers, spectrum analyzers, or related instrumentation.
  • Strong written and verbal communication skills for technical design reviews and cross-functional engineering work
PREFERRED QUALIFICATIONS
  • Experience with cocotb, GitLab CI/CD, or similar automation for FPGA verification and release confidence.
  • Background in FFT/channelization pipelines, PSD generation, AGC-adjacent blocks, or other signal-processing-oriented FPGA implementations.
  • Familiarity with embedded software interfaces to FPGA systems, including Linux-based control planes and hardware/software co-debug.
  • Experience presenting architecture and implementation details in customer-facing or formal design-review settings.
  • Track record of mentoring other engineers and improving design quality across a broader FPGA/DSP team.

US Salary Range
$166,000-$220,000 USD
The salary range for this role is an estimate based on a wide range of compensation factors, inclusive of base salary only. Actual salary offer may vary based on (but not limited to) work experience, education and/or training, critical skills, and/or business considerations. Highly competitive equity grants are included in the majority of full time offers; and are considered part of Anduril's total compensation package. Additionally, Anduril offers top-tier benefits for full-time employees, including:
Benefits
At Anduril, we invest in our people. Our comprehensive, competitive benefits package (available at little to no cost to employees) ensures you're supported in health, recovery, and whatever comes next. For more information, Explore Our Benefits.
Protecting Yourself from Recruitment Scams
Anduril is committed to maintaining the integrity of our Talent acquisition process and the security of our candidates. We've observed a rise in sophisticated phishing and fraudulent schemes where individuals impersonate Anduril representatives, luring job seekers with false interviews or job offers. These scammers often attempt to extract payment or sensitive personal information.
To ensure your safety and help you navigate your job search with confidence, please keep the following critical points in mind:
  • No Financial Requests: Anduril will never solicit payment or demand personal financial details (such as banking information, credit card numbers, or social security numbers) at any stage of our hiring process. Our legitimate recruitment is entirely free for candidates.
  • Please always verify communications:
    • Direct from Anduril: If you receive an email from one of our recruiters, it will only come from an @anduril.com address.
    • Via Agency Partner: If contacted by a recruiting agency for an Anduril role, their email will clearly identify their agency. If you suspect any suspicious activity, please verify the agency's authenticity by reaching out to
  • Exercise Caution with Unsolicited Outreach: If you receive any communication that appears suspicious, contains grammatical errors, or makes unusual requests, do not engage. Always confirm the sender's email domain is @anduril.com before providing any personal information or clicking on links.
  • What to Do If You Suspect Fraud: Should you encounter any questionable or fraudulent outreach claiming to be from Anduril, please report it immediately to Your proactive caution is invaluable in protecting your personal information and upholding the security and trustworthiness of our recruitment efforts.

Data Privacy
To view Anduril's candidate data privacy policy, please visit
By submitting your application, you consent to Anduril Industries using a third-party service provider to conduct pre-employment risk, integrity, and due diligence screening and assessing potential risks as part of your application process. This third-party service provider provides risk-intelligence services that may include analysis of sanctions and watchlists, adverse media, public-record information, and other lawful open-source or commercial data sources. This third-party service provider does not act as a consumer reporting agency. Use of this provider helps to ensure compliance with applicable laws and protect technology, intellectual property, and organizational security.

Working at Anduril

About Anduril, in their own words

From Anduril

As the world enters an era of strategic competition, Anduril delivers cutting-edge autonomy, AI, computer vision, sensor fusion, and networking technology to the warfighter in months, not years.

What Anduril employees say

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Hours and flexibility

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About Anduril Industries

Sourced by ZipRecruiter

Anduril Industries is a trailblazer in the technology industry based in Costa Mesa, CA, US. Founded in 2017 by Palmer Luckey, the creator of Oculus VR, the company focuses on developing innovative technology to equip and empower those in the defense sector. Its primary products include cutting-edge autonomous systems and AI software that assist in combating threats to national and global security. The mission of Anduril Industries is to integrate technology and defense by building transformative, scalable solutions that ensure a safer world.

Industry

Guided missile and space vehicle manufacturing

Company size

501 - 1,000 Employees

Headquarters location

Costa Mesa, CA, US

Year founded

2017

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