$176K - $187K/yr
We need an RTL designer at heart -- someone who thinks in architecture and microarchitecture, and understands the downstream implications of design decisions. The right candidate is a self-starter ...
$176K - $187K/yr
We need an RTL designer at heart -- someone who thinks in architecture and microarchitecture, and understands the downstream implications of design decisions. The right candidate is a self-starter ...
We need an RTL designer who understands that correctness has to be established through rigorous ... What You'll Do - Own RTL design tasks -- Develop RTL with a focus on correctness: bus fabric ...
We need an RTL designer who understands that correctness has to be established through rigorous ... What You'll Do - Own RTL design tasks -- Develop RTL with a focus on correctness: bus fabric ...
Annapolis Junction, MD · On-site +1
$176K - $187K/yr
We need an RTL designer at heart - someone who thinks in architecture and microarchitecture, and understands the downstream implications of design decisions. The right candidate is a self-starter who ...
Annapolis Junction, MD · On-site +1
$176K - $187K/yr
We need an RTL designer at heart - someone who thinks in architecture and microarchitecture, and understands the downstream implications of design decisions. The right candidate is a self-starter who ...
Annapolis Junction, MD · On-site +1
$142K - $150K/yr
We need an RTL designer who understands that correctness has to be established through rigorous ... What You'll Do - Own RTL design tasks - Develop RTL with a focus on correctness: bus fabric ...
Annapolis Junction, MD · On-site +1
$142K - $150K/yr
We need an RTL designer who understands that correctness has to be established through rigorous ... What You'll Do - Own RTL design tasks - Develop RTL with a focus on correctness: bus fabric ...
Germantown, MD · On-site
$193K - $290K/yr
Experience with RTL design for various signal processing blocks, including but not limited to equalizers, correlators, filters, FEC encoders and decoders * Proven track record to design and implement ...
Germantown, MD · On-site
$193K - $290K/yr
Experience with RTL design for various signal processing blocks, including but not limited to equalizers, correlators, filters, FEC encoders and decoders * Proven track record to design and implement ...
Catonsville, MD · On-site
$99K - $225K/yr
Experience with Register Transfer Level (RTL) in circuit design, including RTL design, verification, and timing analysis * Experience with Field Programmable Gate Arrays (FPGAs) * TS/SCI clearance ...
Catonsville, MD · On-site
$99K - $225K/yr
Experience with Register Transfer Level (RTL) in circuit design, including RTL design, verification, and timing analysis * Experience with Field Programmable Gate Arrays (FPGAs) * TS/SCI clearance ...
Annapolis Junction, MD · On-site
$99K - $225K/yr
Experience with Register Transfer Level (RTL) in circuit design, including RTL design, verification, and timing analysis * Experience with Field Programmable Gate Arrays (FPGAs) * TS/SCI clearance ...
Annapolis Junction, MD · On-site
$99K - $225K/yr
Experience with Register Transfer Level (RTL) in circuit design, including RTL design, verification, and timing analysis * Experience with Field Programmable Gate Arrays (FPGAs) * TS/SCI clearance ...
Linthicum, MD · On-site
$141K - $164K/yr
Minimum Qualifications: - Familiarity with FPGA and RTL design including hardware description languages (Verilog, System Verilog, VHDL). - Good knowledge and understanding across various engineering ...
Linthicum, MD · On-site
$141K - $164K/yr
Minimum Qualifications: - Familiarity with FPGA and RTL design including hardware description languages (Verilog, System Verilog, VHDL). - Good knowledge and understanding across various engineering ...
Linthicum, MD · On-site
$141K - $164K/yr
Preferred Qualifications: - Familiarity with FPGA and RTL design including hardware description languages (Verilog, System Verilog, VHDL). - Good knowledge and understanding across various ...
Linthicum, MD · On-site
$141K - $164K/yr
Preferred Qualifications: - Familiarity with FPGA and RTL design including hardware description languages (Verilog, System Verilog, VHDL). - Good knowledge and understanding across various ...
Minimum Qualifications: - Familiarity with FPGA and RTL design including hardware description languages (Verilog, System Verilog, VHDL). - Good knowledge and understanding across various engineering ...
Minimum Qualifications: - Familiarity with FPGA and RTL design including hardware description languages (Verilog, System Verilog, VHDL). - Good knowledge and understanding across various engineering ...
Preferred Qualifications: - Familiarity with FPGA and RTL design including hardware description languages (Verilog, System Verilog, VHDL). - Good knowledge and understanding across various ...
Preferred Qualifications: - Familiarity with FPGA and RTL design including hardware description languages (Verilog, System Verilog, VHDL). - Good knowledge and understanding across various ...
Linthicum, MD · On-site
... design within ASIC/FPGA, create specification documents. - Develop RTL designs using SystemVerilog, with emphasis on DSP and digital communication system blocks (frontend, physical layer, link layer ...
Linthicum, MD · On-site
... design within ASIC/FPGA, create specification documents. - Develop RTL designs using SystemVerilog, with emphasis on DSP and digital communication system blocks (frontend, physical layer, link layer ...
Linthicum, MD · On-site
$102K - $138K/yr
Minimum Qualifications: - 8+ years of experience designing/testing with FPGAs (Xilinx, Altera, etc.). - 8+ years of experience with SystemVerilog, Verilog, or VHDL RTL design. - 3+ years of ...
Linthicum, MD · On-site
$102K - $138K/yr
Minimum Qualifications: - 8+ years of experience designing/testing with FPGAs (Xilinx, Altera, etc.). - 8+ years of experience with SystemVerilog, Verilog, or VHDL RTL design. - 3+ years of ...
Fairfax, VA · On-site
$97K - $181K/yr
The ideal candidate brings deep expertise in RTL design, timing closure, simulation, and system integration, and thrives in a collaborative, multi-disciplinary environment delivering mission-critical ...
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Fairfax, VA · On-site
$97K - $181K/yr
The ideal candidate brings deep expertise in RTL design, timing closure, simulation, and system integration, and thrives in a collaborative, multi-disciplinary environment delivering mission-critical ...
Reston, VA · On-site
$128K - $176K/yr
Execute design (RTL AND/OR HLS (C++ to RTL)) and RTL quality (RDC, CDC, Formal, Lint) * Generate test plans * Perform module level verification, synthesis/STA, Lab debug, SW driven validation on ...
Reston, VA · On-site
$128K - $176K/yr
Execute design (RTL AND/OR HLS (C++ to RTL)) and RTL quality (RDC, CDC, Formal, Lint) * Generate test plans * Perform module level verification, synthesis/STA, Lab debug, SW driven validation on ...
Linthicum, MD · On-site
$128K - $164K/yr
... design within ASIC/FPGA, create specification documents. - Develop RTL designs using SystemVerilog, with emphasis on DSP and digital communication system blocks (frontend, physical layer, link layer ...
Linthicum, MD · On-site
$128K - $164K/yr
... design within ASIC/FPGA, create specification documents. - Develop RTL designs using SystemVerilog, with emphasis on DSP and digital communication system blocks (frontend, physical layer, link layer ...
Herndon, VA · On-site
$115/hr
Derive FPGA design specifications from system requirements Develop detailed FPGA architecture for implementation Implement design in RTL (VHDL) and perform module level simulations Perform Synthesis ...
Herndon, VA · On-site
$115/hr
Derive FPGA design specifications from system requirements Develop detailed FPGA architecture for implementation Implement design in RTL (VHDL) and perform module level simulations Perform Synthesis ...
Linthicum, MD · On-site
$128K - $164K/yr
Minimum Qualifications: - 8+ years of experience designing/testing with FPGAs (Xilinx, Altera, etc.). - 8+ years of experience with SystemVerilog, Verilog, or VHDL RTL design. - 3+ years of ...
Linthicum, MD · On-site
$128K - $164K/yr
Minimum Qualifications: - 8+ years of experience designing/testing with FPGAs (Xilinx, Altera, etc.). - 8+ years of experience with SystemVerilog, Verilog, or VHDL RTL design. - 3+ years of ...
Fairfax, VA · On-site
Bachelor's degree from an accredited university in STEM field OR a combination of education and relevant experience. * 5+ years of RTL design for FPGAs in VHDL or Verilog, or System Verilog ...
Fairfax, VA · On-site
Bachelor's degree from an accredited university in STEM field OR a combination of education and relevant experience. * 5+ years of RTL design for FPGAs in VHDL or Verilog, or System Verilog ...
Bachelor's degree from an accredited university in STEM field OR a combination of education and relevant experience. * 5+ years of RTL design for FPGAs in VHDL or Verilog, or System Verilog ...
Bachelor's degree from an accredited university in STEM field OR a combination of education and relevant experience. * 5+ years of RTL design for FPGAs in VHDL or Verilog, or System Verilog ...
To thrive as an RTL Design engineer, you need a solid background in digital logic design, computer architecture, and proficiency in hardware description languages such as Verilog or VHDL, typically supported by a degree in electrical or computer engineering. Familiarity with EDA tools like Synopsys, Cadence, or Mentor Graphics, and experience with FPGA/ASIC flows, are highly valuable, as are relevant industry certifications. Strong problem-solving skills, attention to detail, and effective communication foster successful collaboration with verification and physical design teams. These skills are crucial for delivering robust, efficient hardware solutions in complex chip development projects.
A typical day for an RTL Design engineer involves writing and optimizing RTL code, running simulations, debugging designs, and reviewing results from verification teams. Collaboration is key, as you will frequently interact with verification engineers, physical design teams, and architects to ensure the design meets both functional and performance requirements. You may also participate in design reviews, resolve issues found during testing, and work with project managers to meet deadlines. This cross-functional teamwork creates a dynamic environment where communication and problem-solving skills are highly valued, helping ensure the successful delivery of silicon products.
An RTL (Register Transfer Level) Design job involves designing and implementing digital circuits using hardware description languages (HDLs) like Verilog or VHDL. RTL engineers translate high-level specifications into synthesizable logic, ensuring functionality, power efficiency, and performance. They collaborate with verification engineers to test and debug designs before fabrication. This role is crucial in developing ASICs, FPGAs, and other digital hardware components.
$176K - $187K/yr
Full-time
Re-posted 2 days ago
7.9
Based on 30 frontline employees who took The Breakroom Quiz
127th of 241 rated software companies
We're looking for a skilled Lead ASIC Digital Design Engineer who has meaningful hands-on experience in RTL design and has contributed to complex digital hardware development. This is a technical role for someone who understands the full ASIC/FPGA design lifecycle and is ready to take on real ownership within a collaborative, high-performing team.
If your career has been primarily running P&R tools, this probably isn't the right fit. We need an RTL designer at heart — someone who thinks in architecture and microarchitecture, and understands the downstream implications of design decisions.
The right candidate is a self-starter who operates with minimal supervision — someone who takes ownership of their work, drives progress independently, and brings solutions rather than waiting to be directed.
What You'll Do
- Own RTL design — Develop and lead RTL with a focus on correctness: bus fabric integrity, clock domain crossings, reset order-of-operations, and design-for-verification
- Drive timing closure — Work through synthesis, place and route, and static timing analysis; understand root causes of timing failures and own fixes through resolution
- Lead verification efforts — Develop and execute test and simulation plans; verify results and drive closure on failures
- Own JIRA triage — Review and prioritize incoming issues; maintain an accurate and actionable backlog
- Lead code reviews — Conduct RTL code reviews, setting technical standards and providing actionable feedback
- Support program planning — Provide input to Integrated Master Schedule (IMS) development and Earned Value (EV) reporting; communicate accurate task status and schedule risk
- Support proposals — Contribute to basis of estimates (BOEs) for proposals, providing accurate technical input on scope, complexity, and level of effort for ASIC/FPGA design tasks
- Evaluate technology — Assess foundry technologies, device libraries, IP cores, and EDA tooling to inform design decisions
- Collaborate broadly — Participate in Integrated Product Teams and working groups across divisions or companies
What We're Looking For
- 8–12+ years of ASIC/FPGA design experience, with meaningful time spent as an RTL designer
- Experience contributing to ASIC tape-out efforts, including timing closure and physical verification
- Familiarity with FinFET process nodes (7nm, 5nm, or similar) is a meaningful differentiator
- Experience with commercial foundry flows (TSMC, GlobalFoundries, Samsung, or equivalent)
- Working knowledge of:
- RTL design and microarchitecture
- Bus fabric design and verification
- Clock domain crossing (CDC) analysis
- Reset sequencing and validation
- Timing closure at advanced nodes
- Power analysis and optimization
Skills & Knowledge
- Strong understanding of ASIC/FPGA engineering concepts, RTL coding practices, and synthesis flows
- Familiarity with industry-standard EDA tools (synthesis, simulation, formal verification, STA)
- Ability to operate independently — identifying problems, driving resolution, and keeping work moving without requiring day-to-day direction
- Ability to evaluate vendor and foundry capabilities
- Proficiency in JIRA for issue tracking and backlog management
- Proficiency in Microsoft Office for documentation and communication
Why This Role
You won't be handed a spec and told to code. You'll take real ownership across the design lifecycle, with technical latitude to shape how problems get solved. This is a role where your work matters, your growth is supported, and the team values engineers who take initiative and see problems through to resolution.
General Dynamics Mission Systems (GDMS) engineers a diverse portfolio of high technology solutions, products and services that enable customers to successfully execute missions across all domains of operation. With a global team of 12,000+ top professionals, we partner with the best in industry to expand the bounds of innovation in the defense and scientific arenas. Given the nature of our work and who we are, we value trust, honesty, alignment and transparency. We offer highly competitive benefits and pride ourselves in being a great place to work with a shared sense of purpose. You will also enjoy a flexible work environment where contributions are recognized and rewarded. If who we are and what we do resonates with you, we invite you to join our high-performance team!
Equal Opportunity Employer / Individuals with Disabilities / Protected Veterans
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Guided missile and space vehicle manufacturing
10,000+ Employees
Fairfax, VA, US
1952
