... AI) / deep learning (DL), high-performance computing (HPC), cloud service providers (CSP), gaming ... Develop Network-on-Chip (NoC)/SoC tooling, working closely with architects, chip leads and ...
... AI) / deep learning (DL), high-performance computing (HPC), cloud service providers (CSP), gaming ... Develop Network-on-Chip (NoC)/SoC tooling, working closely with architects, chip leads and ...
SoC Machine Learning Design Engineer
Austin, TX · On-site
$120 - $160/hr
... AI and machine learning solutions for optimizations in RTL Design, Verification, and Power ... Experience with Chip design and verification front end flows is a plus: Working verification ...
SoC Machine Learning Design Engineer
Austin, TX · On-site
$120 - $160/hr
... AI and machine learning solutions for optimizations in RTL Design, Verification, and Power ... Experience with Chip design and verification front end flows is a plus: Working verification ...
SoC Timing (Static Timing Analysis/STA) Engineer, HBM
Richardson, TX · On-site
$150K/yr
... AI and ML applications. Our modern designs use Through Silicon Via (TSV) technology. We stack ... owning chip-level timing sign-off for next-generation die. You will work closely with RTL design ...
SoC Timing (Static Timing Analysis/STA) Engineer, HBM
Richardson, TX · On-site
$150K/yr
... AI and ML applications. Our modern designs use Through Silicon Via (TSV) technology. We stack ... owning chip-level timing sign-off for next-generation die. You will work closely with RTL design ...
Senior Staff Physical Verification CAD engineer
Austin, TX · On-site
$134K - $138K/yr
Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling ... Define and optimize design methodologies, flows, and best practices for efficient and reliable chip ...
Senior Staff Physical Verification CAD engineer
Austin, TX · On-site
$134K - $138K/yr
Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling ... Define and optimize design methodologies, flows, and best practices for efficient and reliable chip ...
Senior Staff Physical Verification CAD engineer
Austin, TX · On-site
$134K - $138K/yr
Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling ... Define and optimize design methodologies, flows, and best practices for efficient and reliable chip ...
Senior Staff Physical Verification CAD engineer
Austin, TX · On-site
$134K - $138K/yr
Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling ... Define and optimize design methodologies, flows, and best practices for efficient and reliable chip ...
GPU Physical Design Engineer
Austin, TX · On-site
$134K - $138K/yr
This role requires a mix of strategic engineering along with hands-on experience in physical design and large chip integration, being responsible for implementing complete chip design from RTL to ...
GPU Physical Design Engineer
Austin, TX · On-site
$134K - $138K/yr
This role requires a mix of strategic engineering along with hands-on experience in physical design and large chip integration, being responsible for implementing complete chip design from RTL to ...
RTL Design Engineer
$120K - $225K/yr
Mythic is building the future of AI computing with breakthrough analog technology that delivers ... RTL Design at Mythic: At Mythic, our RTL design team is at the heart of transforming our custom ...
Quick apply
RTL Design Engineer
$120K - $225K/yr
Mythic is building the future of AI computing with breakthrough analog technology that delivers ... RTL Design at Mythic: At Mythic, our RTL design team is at the heart of transforming our custom ...
... the development of advanced chip design software tools. Your responsibilities will include ... A good understanding of the RTL-GDSII flow * A good understanding of the PDK and DK collaterals
... the development of advanced chip design software tools. Your responsibilities will include ... A good understanding of the RTL-GDSII flow * A good understanding of the PDK and DK collaterals
RTL Design Engineer
Austin, TX · On-site
$120K - $225K/yr
About Us: Mythic is building the future of AI computing with breakthrough analog technology that ... RTL Design at Mythic: At Mythic, our RTL design team is at the heart of transforming our custom ...
RTL Design Engineer
Austin, TX · On-site
$120K - $225K/yr
About Us: Mythic is building the future of AI computing with breakthrough analog technology that ... RTL Design at Mythic: At Mythic, our RTL design team is at the heart of transforming our custom ...
... the development of advanced chip design software tools. Your responsibilities will include ... A good understanding of the RTL-GDSII flow * A good understanding of the PDK and DK collaterals
... the development of advanced chip design software tools. Your responsibilities will include ... A good understanding of the RTL-GDSII flow * A good understanding of the PDK and DK collaterals
RTL Design Engineer
$120K - $225K/yr
About Us: Mythic is building the future of AI computing with breakthrough analog technology that ... RTL Design at Mythic: At Mythic, our RTL design team is at the heart of transforming our custom ...
RTL Design Engineer
$120K - $225K/yr
About Us: Mythic is building the future of AI computing with breakthrough analog technology that ... RTL Design at Mythic: At Mythic, our RTL design team is at the heart of transforming our custom ...
CAD Engineer - Design Verification Methodology
Austin, TX · On-site
$134K - $164K/yr
... chip (SoC). You'll ensure Apple products and services can seamlessly and efficiently handle the ... RTL Experience debugging vendor tool problems Python programming background is required Preferred ...
CAD Engineer - Design Verification Methodology
Austin, TX · On-site
$134K - $164K/yr
... chip (SoC). You'll ensure Apple products and services can seamlessly and efficiently handle the ... RTL Experience debugging vendor tool problems Python programming background is required Preferred ...
ASIC Design Verification Engineer - New College Grad 2026
Austin, TX · On-site
$134K - $164K/yr
More recently, GPU deep learning ignited modern AI - the next era of computing. NVIDIA is a ... The NVIDIA System-On-Chip (SOC) group is looking for an entry level ASIC Verification Engineer! In ...
ASIC Design Verification Engineer - New College Grad 2026
Austin, TX · On-site
$134K - $164K/yr
More recently, GPU deep learning ignited modern AI - the next era of computing. NVIDIA is a ... The NVIDIA System-On-Chip (SOC) group is looking for an entry level ASIC Verification Engineer! In ...
GPU Physical Design Engineer
Austin, TX · On-site
$134K - $138K/yr
This role requires a mix of strategic engineering along with hands-on experience in physical design and large chip integration, being responsible for implementing complete chip design from RTL to ...
GPU Physical Design Engineer
Austin, TX · On-site
$134K - $138K/yr
This role requires a mix of strategic engineering along with hands-on experience in physical design and large chip integration, being responsible for implementing complete chip design from RTL to ...
Create and integrate AI agents to enhance the efficiency, productivity, and quality of VLSI design flows. * Collaborate on the design and implementation of algorithms and models that can optimize ...
Create and integrate AI agents to enhance the efficiency, productivity, and quality of VLSI design flows. * Collaborate on the design and implementation of algorithms and models that can optimize ...
GPU Physical Design Engineer
Austin, TX · On-site
$134K - $138K/yr
This role requires a mix of strategic engineering along with hands-on experience in physical design and large chip integration, being responsible for implementing complete chip design from RTL to ...
GPU Physical Design Engineer
Austin, TX · On-site
$134K - $138K/yr
This role requires a mix of strategic engineering along with hands-on experience in physical design and large chip integration, being responsible for implementing complete chip design from RTL to ...
More recently, GPU deep learning ignited modern AI - the next era of computing. NVIDIA is a ... The NVIDIA System-On-Chip (SOC) group is looking foran entry levelASIC Verification Engineer! In ...
More recently, GPU deep learning ignited modern AI - the next era of computing. NVIDIA is a ... The NVIDIA System-On-Chip (SOC) group is looking foran entry levelASIC Verification Engineer! In ...
Full-Chip Physical Design Verification Engineer
Austin, TX · On-site
$100K - $500K/yr
With AI redefining the computing paradigm, solutions must evolve to unify innovations in software ... A collaborative team player who works effectively across RTL, PD, CAD, and foundry interfaces. * A ...
Full-Chip Physical Design Verification Engineer
Austin, TX · On-site
$100K - $500K/yr
With AI redefining the computing paradigm, solutions must evolve to unify innovations in software ... A collaborative team player who works effectively across RTL, PD, CAD, and foundry interfaces. * A ...
CPU Design Verification Engineer
$134K - $164K/yr
In this highly visible role, you will be at the center of a chip design effort collaborating with ... RTL designers on verifying the functional correctness of the design • Develop test plans and test ...
CPU Design Verification Engineer
$134K - $164K/yr
In this highly visible role, you will be at the center of a chip design effort collaborating with ... RTL designers on verifying the functional correctness of the design • Develop test plans and test ...
CPU Design Verification Engineer
Austin, TX · On-site
$134K - $164K/yr
In this highly visible role, you will be at the center of a chip design effort collaborating with ... RTL designers on verifying the functional correctness of the design • Develop test plans and test ...
CPU Design Verification Engineer
Austin, TX · On-site
$134K - $164K/yr
In this highly visible role, you will be at the center of a chip design effort collaborating with ... RTL designers on verifying the functional correctness of the design • Develop test plans and test ...
Ai Chip Design Rtl information
What is the difference between Ai Chip Design Rtl vs Ai Chip Verification Engineer?
| Aspect | Ai Chip Design Rtl | Ai Chip Verification Engineer |
|---|---|---|
| Primary Focus | Developing and implementing Register Transfer Level (RTL) code for AI chips | Verifying and validating RTL designs to ensure functionality |
| Skills Required | HDL languages (Verilog/VHDL), digital design, FPGA/ASIC knowledge | Simulation, testbench creation, debugging, scripting skills |
| Work Environment | Design teams, hardware development labs, EDA tools | Verification teams, simulation environments, test setups |
| Certifications | Hardware design certifications, FPGA/ASIC training | Verification methodologies, UVM, SystemVerilog certifications |
While Ai Chip Design Rtl focuses on creating the hardware description code for AI chips, Ai Chip Verification Engineer ensures that the RTL design functions correctly through rigorous testing. Both roles require knowledge of HDL languages and work closely within hardware development teams, but their core responsibilities differ—design versus verification.
What are common challenges faced by AI Chip Design RTL engineers during the verification process?
AI Chip Design RTL engineers often encounter challenges in ensuring their designs meet complex functional and performance requirements, especially given the rapid pace of AI hardware advancements. Verification can be particularly demanding due to the need to simulate and test intricate AI workloads, manage large datasets, and debug subtle timing or logic errors. Collaboration with verification teams, system architects, and software engineers is essential to address these issues efficiently and to ensure seamless integration of the RTL code into the broader chip design. Staying up-to-date with the latest verification tools and methodologies is also crucial for success in this role.
What is an AI Chip Design RTL engineer?
AI Chip Design RTL (Register Transfer Level) engineers are specialists who design the digital logic for chips used in artificial intelligence applications. They use hardware description languages like Verilog or VHDL to create and validate the architecture and functionality of these chips before they are manufactured. Their work ensures that AI processors are efficient, high-performing, and meet the requirements of modern AI workloads. RTL engineers collaborate closely with verification, software, and hardware teams to optimize chip performance and power consumption.
What skills and qualifications are needed to thrive as an AI Chip Design RTL engineer?
To thrive as an AI Chip Design RTL Engineer, you need a solid background in digital design, computer architecture, and proficiency in Hardware Description Languages (HDLs) like Verilog or VHDL, often supported by a degree in electrical or computer engineering. Experience with simulation tools (e.g., ModelSim, Synopsys), ASIC/FPGA design flows, and relevant certifications are highly valued. Strong problem-solving abilities, attention to detail, and effective teamwork and communication skills help you excel in collaborative and complex design environments. These competencies are crucial for creating efficient, reliable AI hardware that meets performance and power requirements in a fast-evolving field.
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Full-time
Posted 4 days ago
Nvidia rating
9.6
Based on 17 frontline employees who took The Breakroom Quiz
8th of 242 rated software companies
Job description
NVIDIA is looking for a Senior CPU Tooling and Design Automation Engineer! Do you want to help drive the development of CPU technology for architectures used for artificial intelligence (AI) / deep learning (DL), high-performance computing (HPC), cloud service providers (CSP), gaming, virtual reality, and autonomous vehicles? Come join the CPU tooling and design automation team and help us push boundaries for all our CPU products!
What you'll be doing:
Work on CAD tools development for the CPU/Fabric teams to improve efficiency
Develop Network-on-Chip (NoC)/SoC tooling, working closely with architects, chip leads and designers
Push the frontiers of NoC/SoC tooling to enable productivity improvements
Understand the chip design flow and distill this knowledge into feature requirements for tooling
Develop complex automation involving advanced graph algorithms leading towards more push-button solutions
Work with teams throughout the company (Architects, RTL, PD etc.) on implementing cross-team solutions to achieve project targets
Drive cross-team methodologies for deployment of this tooling
What We Need To See:
Bachelor's degree in Computer Engineering or Electrical Engineering (or equivalent experience)
5+ years of relevant work experience in EDA tool development and developing flows
Proficiency with EDA style databases and basic graph algorithms
Experience with build flows such as Make and scripting languages
Experience deploying in-house EDA tools across groups, solving flow issues etc.
Strong interpersonal, communication and teamwork skills.
A drive to continuously learn and expand architectural breadth and depth
Ways to stand out from the crowd:
Background with Network-on-Chip tooling is a plus
Experience with netlist level tools is a plus
You will also be eligible for equity and benefits.
This posting is for an existing vacancy.
NVIDIA uses AI tools in its recruiting processes.
NVIDIA is committed to fostering an inclusive work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.
About Nvidia
Sourced by ZipRecruiter
NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. It's a unique legacy of innovation that's fueled by great technology--and amazing people. Today, we're tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. Doing what's never been done before takes vision, innovation, and the world's best talent.
Industry
Computer and electronic product manufacturing
Company size
10,000+ Employees
Headquarters location
Santa Clara, CA, US
Year founded
1993