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Astera Labs

60 Astera Labs System Validation Engineer Jobs Hiring Near You

Astera Labs

Senior Lab Validation Engineer

San Jose, CA · On-site

$160K - $195K/yr

Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity ... Collaborate with design, validation, and system engineering teams as needed. * Modify device ...

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Infographic showing various System Validation Engineer job openings at Astera Labs in the United States as of June 2026, with employment types broken down into 1% Internship, and 99% Full Time. Highlights an 96% Physical, and 4% Remote job distribution.
System Validation Engineer (NCG 2026)

System Validation Engineer (NCG 2026)

Astera Labs

San Jose, CA • On-site

Other

Posted 29 days ago

Job description

About Astera Labs

Astera Labs is a rapidly growing semiconductor company redefining connectivity for AI and cloud infrastructure. Our intelligent connectivity solutions-built on PCIe, CXL, Ethernet, and custom fabrics-enable seamless data movement across compute, memory, and storage. As part of our team, you'll help validate the silicon that powers the world's most advanced AI platforms.

Role Overview

As an Entry-Level System Validation Engineer on the Taurus team, you will validate Astera Labs' Taurus Ethernet Smart Cable Modules and Taurus ASICs. You'll work on chip bring-up, system-level debug, and interoperability testing across real-world AI server and networking platforms, collaborating closely with electrical validation, firmware, and product applications teams.

Key Responsibilities
  • Execute system validation test plans for Taurus Ethernet Smart Cable Modules.
  • Perform chip bring-up and debug for Taurus ASICs in lab environments using oscilloscopes, protocol analyzers, BERTs, and network switches
  • Validate high-speed interconnects and AI fabrics in custom silicon, including signal integrity, link training, FEC stats, and protocol compliance
  • Collaborate with electrical validation, firmware, and product applications teams to root-cause issues and drive resolution
  • Document validation results, debug findings, and contribute to bring-up notes and test reports

Required Qualifications

  • Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or related field
  • Strong academic foundation in circuit analysis, signals and systems, electromagnetics, or highspeed digital design through coursework and labs
  • Familiarity with PCIe, CXL, or Ethernet standards
  • Familiarity with fundamental signalintegrity concepts such as eye diagrams, jitter, noise, impedance, and transmission lines
  • Exposure to electrical lab equipment (e.g., oscilloscopes, logic analyzers, network analyzers)
  • Experience using scripting or programming languages such as Python, MATLAB, TCL, or C/C++
  • Comfortable working with lab tools and debugging hardware
  • Strong analytical and communication skills

Preferred Skills

  • Exposure to post-silicon validation or bring-up of connectivity IP blocks
  • Knowledge of signal integrity analysis and eye diagram interpretation
  • Familiarity with Linux systems, shell scripting, and version control (Git)
  • Understanding of AI workloads and how interconnect bandwidth impacts performance

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