... networking, storage, and Astera Labs' connectivity portfolio - including our PCIe retimers ... This role combines hands-on engineering depth with system-level architectural thinking. You will ...

60 Astera Labs Network Engineer Jobs Hiring Near You
... networking, storage, and Astera Labs' connectivity portfolio - including our PCIe retimers ... This role combines hands-on engineering depth with system-level architectural thinking. You will ...
... networking, storage, and Astera Labs' connectivity portfolio - including our PCIe retimers ... This role combines hands-on engineering depth with system-level architectural thinking. You will ...
... networking, storage, and Astera Labs' connectivity portfolio - including our PCIe retimers ... This role combines hands-on engineering depth with system-level architectural thinking. You will ...
Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity ... Exposure to electrical lab equipment (e.g., oscilloscopes, logic analyzers, network analyzers)
Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity ... Exposure to electrical lab equipment (e.g., oscilloscopes, logic analyzers, network analyzers)
Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity ... Exposure to electrical lab equipment (e.g., oscilloscopes, logic analyzers, network analyzers)
Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity ... Exposure to electrical lab equipment (e.g., oscilloscopes, logic analyzers, network analyzers)
Senior/Staff Physical Design Engineer
San Jose, CA · On-site
$160K - $195K/yr
Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity ... and network OEMs. To accomplish that, you will work closely with designers, verification ...
Senior/Staff Physical Design Engineer
San Jose, CA · On-site
$160K - $195K/yr
Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity ... and network OEMs. To accomplish that, you will work closely with designers, verification ...
Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity ... Architect and optimize high-speed Ethernet networking interfaces (25G/100G/400G+) within platform ...
Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity ... Architect and optimize high-speed Ethernet networking interfaces (25G/100G/400G+) within platform ...
Senior Director System Validation Engineer
San Jose, CA · On-site
$240K - $300K/yr
Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity ... Networking applications and high-performance hardware companies. * ≥5 years hands-on experience ...
Senior Director System Validation Engineer
San Jose, CA · On-site
$240K - $300K/yr
Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity ... Networking applications and high-performance hardware companies. * ≥5 years hands-on experience ...
Senior Director System Validation Engineer
San Jose, CA · On-site
$240K - $300K/yr
Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity ... Networking applications and high-performance hardware companies. * ≥5 years hands-on experience ...
Senior Director System Validation Engineer
San Jose, CA · On-site
$240K - $300K/yr
Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity ... Networking applications and high-performance hardware companies. * ≥5 years hands-on experience ...
Physical Design/CAD Engineer
San Jose, CA · On-site
$160K - $195K/yr
Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity ... network OEMs. This role requires RTL to GDS ownership across design stages (Synthesis/PnR/STA ...
Physical Design/CAD Engineer
San Jose, CA · On-site
$160K - $195K/yr
Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity ... network OEMs. This role requires RTL to GDS ownership across design stages (Synthesis/PnR/STA ...
Senior Firmware Engineer
San Jose, CA · On-site
$160K - $190K/yr
Astera Labs' Intelligent Connectivity Platform integrates CXL ® , Ethernet, NVLink, PCIe ® , and ... Network Switches). * Familiarity with SoC interfaces to common IP blocks such as PCIe Controllers ...
Senior Firmware Engineer
San Jose, CA · On-site
$160K - $190K/yr
Astera Labs' Intelligent Connectivity Platform integrates CXL ® , Ethernet, NVLink, PCIe ® , and ... Network Switches). * Familiarity with SoC interfaces to common IP blocks such as PCIe Controllers ...
Physical Design Engineer (Place & Route)
San Jose, CA · On-site
$159.40K - $164.10K/yr
Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity ... network OEMs. This is a generalist physical design role requiring broad expertise across ...
Physical Design Engineer (Place & Route)
San Jose, CA · On-site
$159.40K - $164.10K/yr
Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity ... network OEMs. This is a generalist physical design role requiring broad expertise across ...
About Astera Labs Astera Labs is a rapidly growing semiconductor company redefining connectivity ... networking platforms, collaborating closely with electrical validation, firmware, and product ...
About Astera Labs Astera Labs is a rapidly growing semiconductor company redefining connectivity ... networking platforms, collaborating closely with electrical validation, firmware, and product ...
.Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity ... As an Astera Labs Hardware Electrical Engineer you will be part of a Hardware Design Group ...
.Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity ... As an Astera Labs Hardware Electrical Engineer you will be part of a Hardware Design Group ...
Distinguished Engineer - Server Firmware & System Architecture United States, Remote Astera Labs ... Astera Labs' Intelligent Connectivity Platform integrates CXL, Ethernet, NVLink, PCIe, and UALinkTM ...
New
Distinguished Engineer - Server Firmware & System Architecture United States, Remote Astera Labs ... Astera Labs' Intelligent Connectivity Platform integrates CXL, Ethernet, NVLink, PCIe, and UALinkTM ...
New
Principal Diagnostic Platform Software Engineer
San Jose, CA · On-site
$203K - $230K/yr
Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity ... networking product * Bring-up newly manufactured boards and develop the first level of software.
Principal Diagnostic Platform Software Engineer
San Jose, CA · On-site
$203K - $230K/yr
Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity ... networking product * Bring-up newly manufactured boards and develop the first level of software.
Senior Firmware Engineer
San Jose, CA · On-site
$160K - $190K/yr
Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity ... Network Switches). * Familiarity with SoC interfaces to common IP blocks such as PCIe Controllers ...
Senior Firmware Engineer
San Jose, CA · On-site
$160K - $190K/yr
Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity ... Network Switches). * Familiarity with SoC interfaces to common IP blocks such as PCIe Controllers ...
Physical Design Engineer (Place & Route)
San Jose, CA · On-site
$165K/yr
Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity ... network OEMs. This is a generalist physical design role requiring broad expertise across ...
Physical Design Engineer (Place & Route)
San Jose, CA · On-site
$165K/yr
Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity ... network OEMs. This is a generalist physical design role requiring broad expertise across ...
Principal Physical Design Engineer, STA
San Jose, CA · On-site
$159.40K - $164.10K/yr
Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity ... network OEMs. This role requires end-to-end STA ownership across design stages, deep technical ...
Principal Physical Design Engineer, STA
San Jose, CA · On-site
$159.40K - $164.10K/yr
Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity ... network OEMs. This role requires end-to-end STA ownership across design stages, deep technical ...
Senior Director System Validation Engineer
San Jose, CA · On-site
$240K - $300K/yr
Astera Labs is seeking an exceptional Senior Director System Validation to lead our AI Fabric ... Storage, Networking applications and highperformance hardware companies. * 5 years hands-on ...
Senior Director System Validation Engineer
San Jose, CA · On-site
$240K - $300K/yr
Astera Labs is seeking an exceptional Senior Director System Validation to lead our AI Fabric ... Storage, Networking applications and highperformance hardware companies. * 5 years hands-on ...
Hardware Lab Engineer
San Jose, CA · On-site
$160K - $230K/yr
Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity ... Install and configure servers, including FW, BIOS, OS, and network * RMA intake/triage: inspection ...
Hardware Lab Engineer
San Jose, CA · On-site
$160K - $230K/yr
Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity ... Install and configure servers, including FW, BIOS, OS, and network * RMA intake/triage: inspection ...
Astera Labs Jobs Information
What are the key skills and qualifications needed to thrive as a Network Engineer, and why are they important?
What are some common challenges Network Engineers face when managing large-scale enterprise networks?
What does a Network Engineer do?
What is the difference between Network Engineer vs Network Administrator?
| Aspect | Network Engineer | Network Administrator |
|---|---|---|
| Certifications | CCNA, CCNP, CompTIA Network+ | CCNA, CompTIA Network+ |
| Work Environment | Designing, implementing, and troubleshooting network infrastructure | Managing and maintaining existing network systems |
| Responsibilities | Network design, configuration, and optimization | Monitoring, maintaining, and supporting network operations |
| Industry Usage | IT, telecommunications, large enterprises | Corporate, small to medium businesses, educational institutions |
While both roles involve working with networks, Network Engineers focus on designing and building network systems, whereas Network Administrators manage and support existing networks. Understanding these differences helps organizations assign the right responsibilities and professionals for their network needs.

Job description
Role Overview
The explosive growth of AI workloads is fundamentally reshaping how server platforms are designed - demanding unprecedented bandwidth, accelerator density, and intelligent connectivity at every layer of the stack. Astera Labs is powering this transformation with purpose-built connectivity solutions that enable the world's most advanced AI and cloud infrastructure, and we need exceptional hardware systems engineers to help architect what comes next.
The AI Platform Solutions Group is seeking a Senior Principal Hardware Systems Engineer to lead the architecture and delivery of high-performance compute platforms with deep focus on PCIe subsystem design, GPU/accelerator integration, high-speed Ethernet networking, and system-level platform development. You will own the end-to-end system design from architecture definition through bring-up and validation, working at the critical intersection of compute, networking, storage, and Astera Labs' connectivity portfolio - including our PCIe retimers, switches, and fabric controllers.
This role combines hands-on engineering depth with system-level architectural thinking. You will drive complex platform development across hardware, firmware, and system management domains while collaborating with silicon vendors, hyperscalers, and cross-functional engineering teams. If you want to architect the AI platforms that are defining the future of data center compute, this is your opportunity.
Key Responsibilities
System Architecture & PCIe Platform Design
- Lead system architecture and design for high-performance compute platforms optimized for AI and accelerator-driven workloads
- Design and integrate PCIe-based subsystems including GPU, accelerator, and high-speed I/O components leveraging PCIe Gen5/6 technologies
- Define and implement GPU-enabled server platforms for AI training, inference, and HPC workloads
- Architect and optimize high-speed Ethernet networking interfaces (25G/100G/400G+) within platform designs
Hardware Development & Validation
- Drive system-level integration across compute, networking, and storage subsystems
- Develop and validate FPGA-based solutions for system control, monitoring, and acceleration
- Lead system bring-up, debug, and validation in lab environments
- Troubleshoot complex hardware and performance issues across high-speed signaling, power, thermal, and interconnect domains
Platform Management & Cross-Functional Leadership
- Define and implement platform management solutions including BMC integration, telemetry, health monitoring, and system-level diagnostics
- Collaborate with cross-functional teams spanning hardware, firmware, BIOS, and OS to ensure seamless platform integration
- Partner with silicon vendors, OEMs, and hyperscalers on custom platform development aligned with Astera Labs' connectivity ecosystem
- Drive performance optimization across PCIe topology, accelerator interconnects, and memory subsystems
Basic Qualifications
- Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field
- 12+ years of experience in hardware engineering, system design, or platform architecture
- Strong expertise in PCIe architecture and subsystem design
- Hands-on experience with GPU integration and accelerator-based system development
- Experience with high-speed Ethernet networking architecture (10G/25G/100G or higher)
- Hands-on experience with FPGA design including architecture, simulation, and validation
- Proven experience with system bring-up, hardware debugging, and platform validation
- Solid understanding of high-speed signaling, interconnects, power, and thermal optimization
- Experience with system management frameworks (BMC, telemetry, monitoring)
Preferred Qualifications
- Master's degree in Electrical Engineering, Computer Engineering, or a related field
- Experience in AI/ML infrastructure, GPU clusters, or hyperscale data center server platforms
- Knowledge of PCIe Gen5/Gen6, RDMA, RoCE, or similar high-performance networking technologies
- Experience with custom platform development or customer-specific hardware designs
- Familiarity with Astera Labs' connectivity solutions (retimers, switches, fabric controllers) or similar high-speed interconnect products
- Experience working with global hardware development teams
- Exposure to platform lifecycle management and fleet-level system diagnostics
We know that creativity and innovation happen more often when teams include diverse ideas, backgrounds, and experiences, and we actively encourage everyone with relevant experience to apply, including people of color, LGBTQ+ and non-binary people, veterans, parents, and individuals with disabilities.
About Astera Labs
Sourced by ZipRecruiter
Industry
Semiconductor and electronic component manufacturing
Company size
11 - 50 Employees
Headquarters location
Santa Clara, CA, US
Year founded
2017