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60 Altera Software Jobs Hiring Near You

Altera

FPGA Compiler (Router) Engineer

Toronto, ON · On-site

CA$115/hr

Altera is a leader in FPGA innovation, delivering programmable solutions that power AI, cloud ... Proficiency in C/C++ and software development best practices EDA / CAD Knowledge: Familiarity with:

Altera Corporation

Technical Program Manager

San Jose, CA · On-site

$113K - $164K/yr

... software, firmware, validation, and manufacturing readiness, ensuring alignment across geographically distributed teams in North America and Asia. As a member of Altera's Execution Alignment Team ...

Altera

DSP Design Engineer

San Jose, CA

$142K - $206K/yr

About Altera Altera is a global leader in programmable logic solutions, delivering cutting-edge FPGA, SoC FPGA, and software technologies that enable innovation across data centers, communications ...

Altera

DevOps CI/CD Software Engineering Manager

San Jose, CA · On-site

$61.75 - $84.75/hr

Job Details: Altera is a global leader in programmable logic solutions, delivering cutting-edge FPGA, SoC, and software technologies that enable innovation across data centers, AI, automotive ...

Altera

Senior MLOps & AI Infrastructure Engineer

San Jose, CA · On-site

$127K - $172K/yr

Altera provides programmable logic devices and design software for various applications. It is a sub-organization of Intel. Founded in 1983, the company is headquartered in San Jose, USA, with a team ...

Altera

ML/AI Timing and Power Flow Expert

San Jose, CA · On-site

$127K - $184K/yr

About Altera At Altera, we are shaping the future of programmable logic by delivering high ... Build and maintain scalable, automated flow infrastructure using strong coding and software ...

Altera Corporation

DSP Design Engineer

San Jose, CA · On-site

$142K - $206K/yr

About Altera Altera is a global leader in programmable logic solutions, delivering cutting-edge FPGA, SoC FPGA, and software technologies that enable innovation across data centers, communications ...

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    Infographic showing various Software job openings at Altera in the United States as of July 2026, with employment types broken down into 99% Full Time, and 1% Part Time. Highlights an 95% Physical, and 5% Remote job distribution.
    Senior FPGA Compiler (Router) Engineer

    Senior FPGA Compiler (Router) Engineer

    Altera Corporation

    San Jose, CA • On-site

    $187K - $270K/yr

    Full-time

    Posted 6 days ago

    Job description

    Job Details:
    Job Description:
    Altera is a leader in FPGA innovation, delivering programmable solutions that power AI, cloud computing, networking, and edge applications. Our compiler and tools teams are at the core of enabling customers to efficiently map complex designs to cutting-edge FPGA architectures.
    Position Overview
    Altera is seeking a Senior FPGA Compiler Engineer (Routing) to join our team! This role focuses on the development and optimization of FPGA routing algorithms within the compiler toolchain, directly impacting performance, power, and usability of next-generation FPGA devices.
    The ideal candidate brings strong expertise in EDA algorithms, graph-based optimization, and FPGA/ASIC design flows, along with a passion for solving complex problems at scale.
    Key Responsibilities
    • Routing Algorithm Development:
      Design, implement, and optimize FPGA routing algorithms to improve performance, routability, and timing closure.
    • Compiler Enhancement:
      Contribute to the FPGA compiler flow, including placement, routing, and timing-driven optimization.
    • Performance Optimization:
      Analyze and improve runtime, memory efficiency, and scalability of routing algorithms for large designs.
    • Cross-Functional Collaboration:
      Work closely with architecture, synthesis, timing (STA), and hardware teams to align routing strategies with device capabilities.
    • Debug & Analysis:
      Investigate routing congestion, timing violations, and design bottlenecks; develop solutions to improve convergence.
    • Toolchain Integration:
      Integrate routing features into existing compiler infrastructure and ensure robustness across diverse customer use cases.

    The pay range below is for Bay Area California only. Actual salary may vary based on a number of factors including job location, job-related knowledge, skills, experiences, trainings, etc. We also offer incentive opportunities that reward employees based on individual and company performance.
    $187.0K - $270.7K USD
    We use artificial intelligence to screen, assess, or select applicants for the position. Applicants must be eligible for any required U.S. export authorizations.
    Qualifications:
    Required Qualifications
    • Experience:
      9+ years of experience in FPGA/ASIC design tools, EDA, or related fields.
    • Technical Expertise:
      • Strong background in algorithms and data structures (graph algorithms, optimization techniques)
      • Experience with FPGA or ASIC design flows (placement, routing, timing closure)
      • Proficiency in C/C++ and software development best practices
    • EDA / CAD Knowledge:
      Familiarity with:
      • Routing algorithms (e.g., maze routing, negotiated congestion)
      • Timing-driven design methodologies
      • Physical design concepts
    • Problem Solving:
      Ability to analyze complex systems and develop scalable, high-performance solutions.
    • Education:
      Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field.
    • Strong communication, teamwork, and interpersonal skills are essential to effectively collaborate across cross-functional teams and drive successful outcomes.

    Preferred Qualifications
    • Experience with commercial FPGA toolchains (e.g., Quartus, Vivado)
    • Knowledge of FPGA architectures and interconnect fabrics
    • Familiarity with parallel/distributed computing for EDA workloads
    • Experience with scripting (Python, Tcl) for tooling and automation
    • Background in timing analysis or placement algorithms

    Why Join Altera
    • Work on core compiler technology that powers next-generation FPGA platforms
    • Solve complex algorithmic challenges at scale
    • Collaborate with world-class teams across architecture, silicon, and software

    Job Type:
    Regular
    Shift:
    Shift 1 (United States of America)
    Primary Location:
    San Jose, California, United States
    Additional Locations:
    Posting Statement:
    All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

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