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Vivado Jobs (NOW HIRING)

IBML

FPGA Development Engineer

Birmingham, AL · On-site

$121K - $156K/yr

Design, implement, and integrate FPGA logic using Xilinx devices and the Vivado Design Suite. * Develop RTL (VHDL/Verilog/SystemVerilog) for high-performance, reliable digital systems. * Perform ...

TiltEdge Solutions LLC

Emulation Engineer

Austin, TX · On-site

Proficiency with FPGA synthesis and partitioning tools (e.g., Synplify, Vivado). * Experience with Synopsys HAPS prototyping platforms. * Solid understanding of SoC bring-up, debug methodologies, and ...

Encode

FPGA Engineer with Security Clearance

Camden, NJ · On-site

$131K - $168K/yr

The role involves FPGA architecture, design, development, and integration using VHDL and Xilinx Vivado toolchain. Responsibilities include algorithm mapping, verification, integration, revision ...

Prolim Global

Engineer Digital 3

Linthicum, MD · On-site

$70 - $80/hr

This is an exciting opportunity for experienced FPGA Design Engineers with expertise in Xilinx FPGA, Microchip RTG4, Vivado, Libero, SERDES, and digital logic design to support the development of ...

Trident Systems LLC

Principal FPGA Engineer

Fairfax, VA · On-site

$116K - $216K/yr

Create and maintain complete FPGA designs using a combination of VHDL and Vivado IP Integrator with a strong emphasis on efficient data path architecture, reliable timing closures, and high ...

New

Talent 101, Inc.

Sr. FPGA Design Engineer

Dallas, TX · On-site

$121K - $167K/yr

Responsible to Synthesize and implement all the logic in Vivado to complete FPGA emulation * After Synthesis and Implementation will be responsible for executing and turn over .bit file * Will also ...

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How much do vivado jobs pay per year?

As of Aug 25, 2026, the average yearly pay for vivado in the United States is $154,823.00, according to ZipRecruiter salary data. Most workers in this role earn between $139,000.00 and $170,000.00 per year, depending on experience, location, and employer.

What is Vivado?

Vivado is a software suite developed by Xilinx (now part of AMD) for the synthesis and analysis of hardware description language (HDL) designs, primarily targeting FPGA and SoC devices. It provides tools for design entry, simulation, synthesis, implementation, and debugging of digital circuits. Vivado offers a modern graphical user interface and advanced features for optimizing and verifying digital designs, making it an essential tool for FPGA developers. It supports both VHDL and Verilog, and is widely used in industries like telecommunications, automotive, and aerospace.

What are the key skills and qualifications needed to thrive as a Vivado FPGA design engineer?

To thrive as a Vivado FPGA Design Engineer, you need a strong background in digital logic design, proficiency in hardware description languages (HDLs) like VHDL or Verilog, and an engineering degree in electrical or computer engineering. Expertise in Xilinx Vivado Design Suite, experience with simulation tools, and familiarity with timing analysis and synthesis are typically required. Attention to detail, problem-solving skills, and effective communication set standout engineers apart in this field. These skills and qualifications are vital for successfully developing, optimizing, and troubleshooting complex FPGA-based systems.

What are some common challenges engineers face when using Vivado for FPGA design projects?

Engineers working with Vivado often encounter challenges such as efficiently managing large, complex designs and optimizing synthesis and implementation times. Debugging timing closure issues and understanding constraint management are also frequent hurdles, especially for those new to the tool. Collaborating with team members requires careful version control and clear documentation, as Vivado projects can quickly become intricate. However, mastering these aspects leads to smoother project workflows and better overall FPGA performance.

What is the difference between Vivado vs FPGA Design Engineer?

AspectVivadoFPGA Design Engineer
Primary RoleDesign and implement FPGA hardware using Xilinx toolsDesign, develop, and test FPGA-based systems and components
Required SkillsHDL (VHDL/Verilog), FPGA toolchains, hardware debuggingHDL, FPGA tools, digital design, verification
Work EnvironmentUse of Xilinx Vivado software, hardware labs, simulation toolsDesign teams, FPGA development projects, hardware labs
CertificationsNone specific, familiarity with FPGA toolsOften requires HDL certifications or FPGA tool proficiency

Vivado is a software suite used by FPGA designers to implement and simulate FPGA designs, while an FPGA Design Engineer is a professional who uses tools like Vivado to develop FPGA hardware solutions. The engineer's role encompasses broader responsibilities including design, testing, and integration, whereas Vivado is a specific tool used within that process.

What cities are hiring for Vivado jobs?

Cities with the most Vivado job openings:

What states have the most Vivado jobs?

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Vivado jobs near you
Infographic showing various Vivado job openings in the United States as of August 2026, with employment types broken down into 94% Full Time, and 6% Contract. Highlights an 96% Physical, 3% Hybrid, and 1% Remote job distribution, with an average salary of $154,823 per year, or $74.4 per hour.

FPGA Development Engineer

Enterprise Document Scanning & Intelligent Document Processing

Birmingham, AL

$121K - $156K/yr

Full-time

Re-posted 14 days ago

Job description

PURPOSE

We are seeking a mid-career FPGA Development Engineer to join our growing hardware development team. The ideal candidate has hands-on experience designing, implementing, and verifying complex digital logic using Xilinx FPGAs and the Vivado tool suite, along with a strong background in simulation and verification methodologies. You will work closely with cross-functional teams to architect, develop, and optimize FPGA-based solutions for high-performance embedded systems.

ROLE AND RESPONSIBILITIES

  • Design, implement, and integrate FPGA logic using Xilinx devices and the Vivado Design Suite.
  • Develop RTL (VHDL/Verilog/SystemVerilog) for high-performance, reliable digital systems.
  • Perform simulation, verification, and debugging using industry-standard tools (e.g., Vivado Simulator, ModelSim/Questa, Xilinx logic analyzers).
  • Optimize designs for timing closure, resource utilization, and power consumption.
  • Collaborate with firmware, hardware, and systems engineering teams to define requirements and ensure seamless system integration.
  • Create comprehensive design documentation, test plans, and verification reports.
  • Support bring-up, validation, and troubleshooting on real hardware platforms

PREFERRED SKILLS, QUALIFICATIONS AND EDUCATION REQUIREMENTS

  • Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or related field.
  • 5 – 7 years of professional FPGA development experience.
  • Strong proficiency with Xilinx FPGA families (e.g., Zynq, Ultrascale/Ultrascale+).
  • Demonstrated experience with the Xilinx Vivado Design Suite, including synthesis, implementation, timing analysis, and IP integration.
  • Experience with RTL design in VHDL or Verilog.
  • Hands-on simulation and verification experience (Vivado Simulator, QuestaSim, ModelSim, etc.).
  • Strong understanding of digital design fundamentals (clocking, resets, CDC, pipelining, state machines).
  • Familiarity with version control systems (Git, SVN).
  • Experience with SystemVerilog or UVM-based verification.
  • Familiarity with embedded systems, processors, and board-level debugging tools.
  • Experience with high-speed interfaces (PCIe, DDR, SERDES, Ethernet).
  • Python, TCL, or shell scripting for automation and tool flows.
  • Experience working in Agile or structured development environments.

ADDITIONAL NOTES

What We Offer

  • Competitive salary and benefits package
  • Opportunities for technical growth and ownership of complex FPGA designs
  • Collaborative team environment with modern tools and development practices

Apply