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Vhdl Verification Engineer Jobs (NOW HIRING)

Anduril Industries

Senior FPGA Verification Engineer

Goleta, CA · On-site

$112K - $151K/yr

Testbench development for the verification of RTL blocks using VHDL or SystemVerilog * Recommend ... Contribute to engineering estimates for new program pursuits. * Provide technical leadership for ...

New

Intel Corporation

CPU Verification Engineer

Austin, TX · On-site

$134K/yr

Hardware modeling languages such as Verilog, VHDL, or SystemVerilog, and industry-standard ... and scalable verification environments. * Programming skills in at least one language such as ...

Intel Corporation

$105K - $200K/yr

Hardware modeling languages such as Verilog, VHDL, or SystemVerilog, and industry-standard ... and scalable verification environments. * Programming skills in at least one language such as ...

Intel Corporation

CPU Verification Engineer

Austin, TX · On-site

$105K - $200K/yr

Hardware modeling languages such as Verilog, VHDL, or SystemVerilog, and industry-standard ... and scalable verification environments. * Programming skills in at least one language such as ...

CesiumAstro

FPGA Verification Engineer

El Segundo, CA · On-site

$138K - $177K/yr

* We are looking to add an FPGA Verification Engineer II to our team. If you enjoy working in a ... VHDL, Verilog, SystemVerilog, C/C++, SystemC, UVM/UVMf, DPI-C, TLM, Formal CDC and functional ...

New

Apple

GPU Design Verification Engineer

Santa Clara, CA · On-site

$159K - $195K/yr

... VHDL/Verilog) to verify complex designs. - Work with other block, subsystem and chip level engineers to ensure seamless verification flow. Minimum Qualifications Previous design verification ...

Apple

GPU Design Verification Engineer

Santa Clara, CA · On-site

$159K - $195K/yr

... VHDL/Verilog) to verify complex designs. - Work with other block, subsystem and chip level engineers to ensure seamless verification flow. Minimum Qualifications Background in CPU or GPU architecture ...

E-Space

ASIC Verification Engineer

Saratoga, CA · On-site

$140K - $200K/yr

We are seeking a highly skilled and experienced Verification Engineer to join our engineering team ... Develop high-quality testbenches using SystemVerilog and support VHDL and mixed-language ...

E-Space

ASIC Verification Engineer

Saratoga, CA · On-site

$140K - $200K/yr

We are seeking a highly skilled and experienced Verification Engineer to join our engineering team ... Develop high-quality testbenches using SystemVerilog and support VHDL and mixed-language ...

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Vhdl Verification Engineer information

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$80K

$142.6K

$203.5K

How much do vhdl verification engineer jobs pay per year?

As of Sep 13, 2026, the average yearly pay for vhdl verification engineer in the United States is $142,619.00, according to ZipRecruiter salary data. Most workers in this role earn between $136,000.00 and $136,000.00 per year, depending on experience, location, and employer.

What is a VHDL verification engineer?

VHDL Verification Engineers are professionals who specialize in testing and validating digital hardware designs using VHDL (VHSIC Hardware Description Language). They develop testbenches, write simulation scripts, and ensure that digital circuits, such as FPGAs and ASICs, function correctly according to specifications. Their role is crucial in detecting design errors early in the development process, improving product reliability, and reducing costly hardware revisions. They often work closely with design engineers and use specialized verification tools to automate and streamline the testing process.

What are the key skills and qualifications needed to thrive as a VHDL verification engineer?

To thrive as a VHDL Verification Engineer, you need a deep understanding of digital design principles, strong VHDL coding skills, and a background in electrical or computer engineering. Familiarity with simulation tools like ModelSim or Questa, experience with verification methodologies such as UVM, and knowledge of scripting languages are typically required. Attention to detail, problem-solving, and strong communication skills help you effectively identify design issues and collaborate with cross-functional teams. These competencies ensure robust verification processes, leading to reliable and efficient hardware designs.

What are some common challenges faced by VHDL verification engineers when collaborating with hardware design teams?

VHDL Verification Engineers often face challenges in ensuring thorough communication with hardware design teams, especially when design specifications change frequently or are not fully documented. Synchronizing testbench development with ongoing design modifications can be demanding, requiring proactive coordination and adaptability. Additionally, aligning on verification methodologies and effectively managing bug tracking and resolution are crucial to prevent delays and ensure high-quality deliverables. Strong collaboration skills and a proactive approach to cross-functional teamwork are key to overcoming these challenges.

What are popular job titles related to Vhdl Verification Engineer jobs?

For Vhdl Verification Engineer jobs, the most frequently searched job titles are:

Infographic showing various Vhdl Verification Engineer job openings in the United States as of September 2026, with employment types broken down into 1% Internship, 89% Full Time, 7% Part Time, and 3% Contract. Highlights an 84% Physical, 5% Hybrid, and 11% Remote job distribution, with an average salary of $142,619 per year, or $68.6 per hour.

Senior FPGA Verification Engineer

Boulder, CO • On-site

Anduril Industries
Guided Missile and Space Vehicle Manufacturing • 501 - 1,000 employees
Learn more about Anduril Industriesexternal

$107K - $145K/yr

Full-time

Posted 2 days ago

New

Anduril rating

9.1

Company rating: 9.1 out of 10

Anduril

Based on 17 frontline employees who took The Breakroom Quiz

Job description

ABOUT THE TEAM  

The Anduril Imaging team develops state-of-the-art imaging systems across both hardware and software, deployed to tackle the most significant security challenges of America and its allies.  The team is heavily involved in utilizing computer vision, perception, electro-optical, infrared, and sensor data to give our war fighters and allies an advantage.    

ABOUT THE JOB  

The Imaging team is seeking a Senior FPGA Verification Engineer to help design a new product lines. In this role, you will work closely with an interdisciplinary technical team to define, complete the design and analysis, build prototypes leading to ground and flight testing, and mature the prototypes into products.  

WHAT YOU'LL DO  
  • Verification environment architecture and design using tools like SystemVerilog or OVM/UVM 
  • Creation of written test plan, testcases, code coverage tracking, and functional coverage tracking 
  • Testbench development for the verification of RTL blocks using VHDL or SystemVerilog 
  • Recommend new tools and practices for continuous improvement in the group's ASIC / FPGA verification flow 
  • Contribute to engineering estimates for new program pursuits. 
  • Provide technical leadership for project verification teams by breaking down work, planning activities, and reporting status 
REQUIRED QUALIFICATIONS  
  • A Bachelor's in Electrical Engineering, Computer Engineering, or a related technical field is typically required.  
  • 8+ years of experience developing HDL firmware for FPGA devices   
  • Demonstrated experience developing and simulating RTL designs using VHDL and/or Verilog in a professional FPGA or ASIC development environment. 
  • experience developing and simulating RTL designs using VHDL and/or Verilog in a professional FPGA or ASIC development environment. 
  • Proven ability to design, implement, and execute verification testbenches for RTL blocks using VHDL and/or SystemVerilog. 
  • experience applying chip-level verification methodologies, including constrained-random testing, functional coverage analysis, and assertion-based verification (SystemVerilog) 
  • Experience using revision control systems such as Git or Subversion to manage source code, collaborate across engineering teams, and maintain configuration integrity. 
  • Eligible to obtain and maintain an active U.S. Secret security clearance  
PREFERRED QUALIFICATIONS   
  • Experience with ASIC/FPGA lab validation and debug using standard lab equipment, along with familiarity with DFT, manufacturability, and production test concepts. 
  • Proficiency with Unix/Linux environments, scripting or software development (C, C++, Python, Perl, or shell), and industry-standard ASIC/FPGA simulation and synthesis tools such as QuestaSim, Synplify, Quartus, or Vivado. 

Working at Anduril

About Anduril, in their own words

From Anduril

As the world enters an era of strategic competition, Anduril delivers cutting-edge autonomy, AI, computer vision, sensor fusion, and networking technology to the warfighter in months, not years.

What Anduril employees say

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Benefits

Hours and flexibility

Workplace

Get the full story on Breakroom

Anduril Industries logo

About Anduril Industries

Sourced by ZipRecruiter

Anduril Industries is a trailblazer in the technology industry based in Costa Mesa, CA, US. Founded in 2017 by Palmer Luckey, the creator of Oculus VR, the company focuses on developing innovative technology to equip and empower those in the defense sector. Its primary products include cutting-edge autonomous systems and AI software that assist in combating threats to national and global security. The mission of Anduril Industries is to integrate technology and defense by building transformative, scalable solutions that ensure a safer world.

Industry

Guided missile and space vehicle manufacturing

Company size

501 - 1,000 Employees

Headquarters location

Costa Mesa, CA, US

Year founded

2017

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