RTL Design and Verification
$139K - $169K/yr
UPF (Unified Power Format) creation using low power techniques and handling multiple power domain design. Knowledge of Clock Domain Crossing, Design for Test, Register Description Language.
RTL Design and Verification
$139K - $169K/yr
UPF (Unified Power Format) creation using low power techniques and handling multiple power domain design. Knowledge of Clock Domain Crossing, Design for Test, Register Description Language.
Design Engineer III
Austin, TX · On-site
Expertise in low-power implementation and signoff, including power gating, multiple voltage rails, and Unified Power Format (UPF) usage. Proven experience in power analysis and reduction utilizing ...
Design Engineer III
Austin, TX · On-site
Expertise in low-power implementation and signoff, including power gating, multiple voltage rails, and Unified Power Format (UPF) usage. Proven experience in power analysis and reduction utilizing ...
Expertise in low-power implementation and signoff, including power gating, multiple voltage rails, and Unified Power Format (UPF) usage. Proven experience in power analysis and reduction utilizing ...
Expertise in low-power implementation and signoff, including power gating, multiple voltage rails, and Unified Power Format (UPF) usage. Proven experience in power analysis and reduction utilizing ...
Design Engineer III
Austin, TX · On-site
$120K/yr
Expertise in low-power implementation and signoff, including power gating, multiple voltage rails, and Unified Power Format (UPF) usage. Proven experience in power analysis and reduction utilizing ...
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Design Engineer III
Austin, TX · On-site
$120K/yr
Expertise in low-power implementation and signoff, including power gating, multiple voltage rails, and Unified Power Format (UPF) usage. Proven experience in power analysis and reduction utilizing ...
SoC UPF Methodology Engineer
Austin, TX · On-site
Description In this role, your main objective will be to enhance our Unified Power Format (UPF) methodologies, refining power intent specification, execution, and validation to support ...
SoC UPF Methodology Engineer
Austin, TX · On-site
Description In this role, your main objective will be to enhance our Unified Power Format (UPF) methodologies, refining power intent specification, execution, and validation to support ...
DDR Design Engineer
Beaverton, OR · On-site
Unified Power Format for simulation, synthesis and electrical rule checking Equivalence checking. Prior experience in DDR PHY design and mixed-signal environment is a plus.
DDR Design Engineer
Beaverton, OR · On-site
Unified Power Format for simulation, synthesis and electrical rule checking Equivalence checking. Prior experience in DDR PHY design and mixed-signal environment is a plus.
DDR Design Engineer
Irvine, CA · On-site
Unified Power Format for simulation, synthesis and electrical rule checking Equivalence checking. Prior experience in DDR PHY design and mixed-signal environment is a plus.
DDR Design Engineer
Irvine, CA · On-site
Unified Power Format for simulation, synthesis and electrical rule checking Equivalence checking. Prior experience in DDR PHY design and mixed-signal environment is a plus.
DDR Design Engineer
San Diego, CA · On-site
Unified Power Format for simulation, synthesis and electrical rule checking Equivalence checking. Prior experience in DDR PHY design and mixed-signal environment is a plus.
DDR Design Engineer
San Diego, CA · On-site
Unified Power Format for simulation, synthesis and electrical rule checking Equivalence checking. Prior experience in DDR PHY design and mixed-signal environment is a plus.
SoC UPF Methodology Engineer
Austin, TX · On-site
$134K - $138K/yr
Description In this role, your main objective will be to enhance our Unified Power Format (UPF) methodologies, refining power intent specification, execution, and validation to support ...
SoC UPF Methodology Engineer
Austin, TX · On-site
$134K - $138K/yr
Description In this role, your main objective will be to enhance our Unified Power Format (UPF) methodologies, refining power intent specification, execution, and validation to support ...
DDR Design Engineer
Waltham, MA · On-site
Unified Power Format for simulation, synthesis and electrical rule checking Equivalence checking. Prior experience in DDR PHY design and mixed-signal environment is a plus.
DDR Design Engineer
Waltham, MA · On-site
Unified Power Format for simulation, synthesis and electrical rule checking Equivalence checking. Prior experience in DDR PHY design and mixed-signal environment is a plus.
DDR Design Engineer
San Diego, CA · On-site
Unified Power Format for simulation, synthesis and electrical rule checking Equivalence checking. Prior experience in DDR PHY design and mixed-signal environment is a plus.
DDR Design Engineer
San Diego, CA · On-site
Unified Power Format for simulation, synthesis and electrical rule checking Equivalence checking. Prior experience in DDR PHY design and mixed-signal environment is a plus.
DDR Design Engineer
Beaverton, OR · On-site
Unified Power Format for simulation, synthesis and electrical rule checking Equivalence checking. Prior experience in DDR PHY design and mixed-signal environment is a plus.
DDR Design Engineer
Beaverton, OR · On-site
Unified Power Format for simulation, synthesis and electrical rule checking Equivalence checking. Prior experience in DDR PHY design and mixed-signal environment is a plus.
Unified Power Format for simulation, synthesis and electrical rule checking Equivalence checking. Prior experience in DDR PHY design and mixed-signal environment is a plus. Minimum Qualifications BS ...
Unified Power Format for simulation, synthesis and electrical rule checking Equivalence checking. Prior experience in DDR PHY design and mixed-signal environment is a plus. Minimum Qualifications BS ...
DDR Design Engineer
Waltham, MA · On-site
Unified Power Format for simulation, synthesis and electrical rule checking Equivalence checking. Prior experience in DDR PHY design and mixed-signal environment is a plus.
DDR Design Engineer
Waltham, MA · On-site
Unified Power Format for simulation, synthesis and electrical rule checking Equivalence checking. Prior experience in DDR PHY design and mixed-signal environment is a plus.
DDR Design Engineer
Irvine, CA · On-site
... Unified Power Format for simulation, synthesis and electrical rule checking Equivalence checking Prior experience in DDR PHY design and mixed-signal environment is a plus
DDR Design Engineer
Irvine, CA · On-site
... Unified Power Format for simulation, synthesis and electrical rule checking Equivalence checking Prior experience in DDR PHY design and mixed-signal environment is a plus
DDR Design Engineer
Austin, TX · On-site
Experience with Unified Power Format for simulation, synthesis and electrical rule checking, and equivalence checking. Prior experience in DDR PHY design and mixed-signal environment is a plus.
DDR Design Engineer
Austin, TX · On-site
Experience with Unified Power Format for simulation, synthesis and electrical rule checking, and equivalence checking. Prior experience in DDR PHY design and mixed-signal environment is a plus.
DDR Design Engineer
Austin, TX · On-site
Unified Power Format for simulation, synthesis and electrical rule checking Equivalence checking. Prior experience in DDR PHY design and mixed-signal environment is a plus.
DDR Design Engineer
Austin, TX · On-site
Unified Power Format for simulation, synthesis and electrical rule checking Equivalence checking. Prior experience in DDR PHY design and mixed-signal environment is a plus.
Physical Low Power Validation Engineer
Sunnyvale, CA · On-site
$159K - $164K/yr
Drive the continuous refinement of power state tables (PST) and Unified Power Format (UPF) scripts to ensure accurate translation from Golden RTL to the final physical netlist. Information collected ...
Physical Low Power Validation Engineer
Sunnyvale, CA · On-site
$159K - $164K/yr
Drive the continuous refinement of power state tables (PST) and Unified Power Format (UPF) scripts to ensure accurate translation from Golden RTL to the final physical netlist. Information collected ...
Experience with Unified Power Format for simulation, synthesis and electrical rule checking, and equivalence checking. Prior experience in DDR PHY design and mixed-signal environment is a plus.
Experience with Unified Power Format for simulation, synthesis and electrical rule checking, and equivalence checking. Prior experience in DDR PHY design and mixed-signal environment is a plus.
DDR Design Engineer
Cupertino, CA · On-site
Unified Power Format for simulation, synthesis and electrical rule checking Equivalence checking. Prior experience in DDR PHY design and mixed-signal environment is a plus.
DDR Design Engineer
Cupertino, CA · On-site
Unified Power Format for simulation, synthesis and electrical rule checking Equivalence checking. Prior experience in DDR PHY design and mixed-signal environment is a plus.
Unified Power information
See salary details
$55.5K - $70.7K
4% of jobs
$70.7K - $86K
10% of jobs
$93.2K is the 25th percentile. Wages below this are outliers.
$86K - $101.2K
22% of jobs
The median wage is $115.3K / yr.
$101.2K - $116.4K
15% of jobs
$129.9K is the 75th percentile. Wages above this are outliers.
$116.4K - $131.6K
27% of jobs
$131.6K - $146.9K
13% of jobs
$146.9K - $162.1K
8% of jobs
$162.1K - $177.3K
0% of jobs
$177.3K - $192.5K
0% of jobs
$192.5K - $207.8K
0% of jobs
$207.8K - $223K
1% of jobs
$55.5K
$119.9K
$223K
How much do unified power jobs pay per year?
As of Aug 4, 2026, the average yearly pay for unified power in the United States is $119,854.00, according to ZipRecruiter salary data. Most workers in this role earn between $92,000.00 and $134,000.00 per year, depending on experience, location, and employer.
What kinds of projects or responsibilities can I expect as part of a unified power team?
Unified Power professionals are typically involved in maintaining, optimizing, and troubleshooting electrical power systems across commercial or industrial settings. On a daily basis, you may be tasked with conducting site assessments, coordinating system upgrades, and ensuring compliance with safety standards. The role often involves collaborating with engineers, field technicians, and project managers to deliver tailored power solutions for clients. This dynamic environment offers valuable hands-on experience with advanced technologies and a clear path for advancement into leadership or specialized technical roles.
What are the key skills and qualifications needed to thrive in the unified power position, and why are they important?
To succeed in a Unified Power role, you typically need a background in electrical engineering, power systems analysis, and energy management, often supported by a relevant bachelor's degree. Familiarity with SCADA systems, power quality analyzers, and industry certifications such as PMP or IEEE Power & Energy Society membership is advantageous. Strong problem-solving, project management, and collaboration skills are essential for addressing complex energy distribution challenges and working with cross-functional teams. These qualifications are important to ensure the safe, efficient, and reliable delivery of integrated power solutions in increasingly complex energy environments.
What is a unified power?
A Unified Power job typically involves working with power systems, backup power solutions, and electrical infrastructure to ensure reliable energy supply. Employees may perform maintenance, installation, and troubleshooting of UPS systems, generators, and other critical power equipment. These roles often require technical expertise in electrical engineering or related fields, as well as knowledge of industry regulations and safety standards.
What cities are hiring for Unified Power jobs? Cities with the most Unified Power job openings:
What are the most commonly searched types of Unified Power jobs? The most popular types of Unified Power jobs are:
What states have the most Unified Power jobs? States with the most job openings for Unified Power jobs include:
What job categories do people searching Unified Power jobs look for? The top searched job categories for Unified Power jobs are:
Job description
Bachelor's degree in electrical engineering with 3+ experience or master's degree in electrical engineering or related field with 2+ year experience.
Experience in Logic design, validation, and testing, including but not limited to:
Micro-architecture definition of design features, test plan creation and functional verification.
Effective behavioural modelling and testing of circuits in Verilog and System Verilog, as well as logical equivalence verification between Schematic and Verilog models.
UPF (Unified Power Format) creation using low power techniques and handling multiple power domain design.
Knowledge of Clock Domain Crossing, Design for Test, Register Description Language.
Experience in test bench creation to generate test patterns and vectors.
Experience with FEV (Formal Equivalence Verification) and GLS (Gate Level Simulations)
Experience in Logic design, validation, and testing, including but not limited to:
Micro-architecture definition of design features, test plan creation and functional verification.
Effective behavioural modelling and testing of circuits in Verilog and System Verilog, as well as logical equivalence verification between Schematic and Verilog models.
UPF (Unified Power Format) creation using low power techniques and handling multiple power domain design.
Knowledge of Clock Domain Crossing, Design for Test, Register Description Language.
Experience in test bench creation to generate test patterns and vectors.
Experience with FEV (Formal Equivalence Verification) and GLS (Gate Level Simulations)
About Apex Informatics
Sourced by ZipRecruiter
Industry
It services
Company size
1 - 10 Employees
Headquarters location
Omaha, NE, US
Year founded
2014