Design Engineer III
Austin, TX · On-site
... Perform comprehensive power analysis at various design stages, spanning from RTL to GDSII ... Unified Power Format (UPF) usage. Proven experience in power analysis and reduction utilizing ...
Design Engineer III
Austin, TX · On-site
... Perform comprehensive power analysis at various design stages, spanning from RTL to GDSII ... Unified Power Format (UPF) usage. Proven experience in power analysis and reduction utilizing ...
Design Engineer III
Austin, TX · On-site
... Perform comprehensive power analysis at various design stages, spanning from RTL to GDSII ... Unified Power Format (UPF) usage. Proven experience in power analysis and reduction utilizing ...
Design Engineer III
Austin, TX · On-site
... Perform comprehensive power analysis at various design stages, spanning from RTL to GDSII ... Unified Power Format (UPF) usage. Proven experience in power analysis and reduction utilizing ...
Design Engineer III
Austin, TX · On-site
$120K/yr
... Perform comprehensive power analysis at various design stages, spanning from RTL to GDSII ... Unified Power Format (UPF) usage. Proven experience in power analysis and reduction utilizing ...
Quick apply
Design Engineer III
Austin, TX · On-site
$120K/yr
... Perform comprehensive power analysis at various design stages, spanning from RTL to GDSII ... Unified Power Format (UPF) usage. Proven experience in power analysis and reduction utilizing ...
DDR Design Engineer
Beaverton, OR · On-site
As a logic design engineer, you will be involved in all phases of the design, from concept study ... Unified Power Format for simulation, synthesis and electrical rule checking Equivalence checking.
DDR Design Engineer
Beaverton, OR · On-site
As a logic design engineer, you will be involved in all phases of the design, from concept study ... Unified Power Format for simulation, synthesis and electrical rule checking Equivalence checking.
DDR Design Engineer
San Diego, CA · On-site
As a logic design engineer, you will be involved in all phases of the design, from concept study ... Unified Power Format for simulation, synthesis and electrical rule checking Equivalence checking.
DDR Design Engineer
San Diego, CA · On-site
As a logic design engineer, you will be involved in all phases of the design, from concept study ... Unified Power Format for simulation, synthesis and electrical rule checking Equivalence checking.
DDR Design Engineer
Irvine, CA · On-site
As a logic design engineer, you will be involved in all phases of the design, from concept study ... Unified Power Format for simulation, synthesis and electrical rule checking Equivalence checking.
DDR Design Engineer
Irvine, CA · On-site
As a logic design engineer, you will be involved in all phases of the design, from concept study ... Unified Power Format for simulation, synthesis and electrical rule checking Equivalence checking.
DDR Design Engineer
Waltham, MA · On-site
As a logic design engineer, you will be involved in all phases of the design, from concept study ... Unified Power Format for simulation, synthesis and electrical rule checking Equivalence checking.
DDR Design Engineer
Waltham, MA · On-site
As a logic design engineer, you will be involved in all phases of the design, from concept study ... Unified Power Format for simulation, synthesis and electrical rule checking Equivalence checking.
DDR Design Engineer
Waltham, MA · On-site
As a logic design engineer, you will be involved in all phases of the design, from concept study ... Unified Power Format for simulation, synthesis and electrical rule checking Equivalence checking.
DDR Design Engineer
Waltham, MA · On-site
As a logic design engineer, you will be involved in all phases of the design, from concept study ... Unified Power Format for simulation, synthesis and electrical rule checking Equivalence checking.
Experience with power grid integrity (electromigration and IR drop) from budgeting to analysis to ... Familiarity with low power design techniques (e.g., unified power format, dynamic voltage frequency ...
Experience with power grid integrity (electromigration and IR drop) from budgeting to analysis to ... Familiarity with low power design techniques (e.g., unified power format, dynamic voltage frequency ...
Physical Low Power Validation Engineer
Sunnyvale, CA · On-site
$159K - $164K/yr
Drive the continuous refinement of power state tables (PST) and Unified Power Format (UPF) scripts to ensure accurate translation from Golden RTL to the final physical netlist. Information collected ...
Physical Low Power Validation Engineer
Sunnyvale, CA · On-site
$159K - $164K/yr
Drive the continuous refinement of power state tables (PST) and Unified Power Format (UPF) scripts to ensure accurate translation from Golden RTL to the final physical netlist. Information collected ...
DDR Design Engineer
San Diego, CA · On-site
As a logic design engineer, you will be involved in all phases of the design, from concept study ... Unified Power Format for simulation, synthesis and electrical rule checking Equivalence checking.
DDR Design Engineer
San Diego, CA · On-site
As a logic design engineer, you will be involved in all phases of the design, from concept study ... Unified Power Format for simulation, synthesis and electrical rule checking Equivalence checking.
As a logic design engineer, you will be involved in all phases of the design, from concept study ... Unified Power Format for simulation, synthesis and electrical rule checking Equivalence checking.
As a logic design engineer, you will be involved in all phases of the design, from concept study ... Unified Power Format for simulation, synthesis and electrical rule checking Equivalence checking.
DDR Design Engineer
Beaverton, OR · On-site
As a logic design engineer, you will be involved in all phases of the design, from concept study ... Unified Power Format for simulation, synthesis and electrical rule checking Equivalence checking.
DDR Design Engineer
Beaverton, OR · On-site
As a logic design engineer, you will be involved in all phases of the design, from concept study ... Unified Power Format for simulation, synthesis and electrical rule checking Equivalence checking.
DDR Design Engineer
Irvine, CA · On-site
As a logic design engineer, you will be involved in all phases of the design, from concept study ... friendly RTL Unified Power Format for simulation, synthesis and electrical rule checking ...
DDR Design Engineer
Irvine, CA · On-site
As a logic design engineer, you will be involved in all phases of the design, from concept study ... friendly RTL Unified Power Format for simulation, synthesis and electrical rule checking ...
DDR Design Engineer
Austin, TX · On-site
As a logic design engineer, you will be involved in all phases of the design, from concept study ... Unified Power Format for simulation, synthesis and electrical rule checking Equivalence checking.
DDR Design Engineer
Austin, TX · On-site
As a logic design engineer, you will be involved in all phases of the design, from concept study ... Unified Power Format for simulation, synthesis and electrical rule checking Equivalence checking.
DDR Design Engineer
Austin, TX · On-site
As a logic design engineer, you will be involved in all phases of the design, from concept study ... Experience with Unified Power Format for simulation, synthesis and electrical rule checking, and ...
DDR Design Engineer
Austin, TX · On-site
As a logic design engineer, you will be involved in all phases of the design, from concept study ... Experience with Unified Power Format for simulation, synthesis and electrical rule checking, and ...
As a logic design engineer, you will be involved in all phases of the design, from concept study ... Experience with Unified Power Format for simulation, synthesis and electrical rule checking, and ...
As a logic design engineer, you will be involved in all phases of the design, from concept study ... Experience with Unified Power Format for simulation, synthesis and electrical rule checking, and ...
DDR Design Engineer
Cupertino, CA · On-site
As a logic design engineer, you will be involved in all phases of the design, from concept study ... Unified Power Format for simulation, synthesis and electrical rule checking Equivalence checking.
DDR Design Engineer
Cupertino, CA · On-site
As a logic design engineer, you will be involved in all phases of the design, from concept study ... Unified Power Format for simulation, synthesis and electrical rule checking Equivalence checking.
As a logic design engineer, you will be involved in all phases of the design, from concept study ... Unified Power Format for simulation, synthesis and electrical rule checking Equivalence checking.
As a logic design engineer, you will be involved in all phases of the design, from concept study ... Unified Power Format for simulation, synthesis and electrical rule checking Equivalence checking.
DDR Design Engineer
Cupertino, CA · On-site
As a logic design engineer, you will be involved in all phases of the design, from concept study ... Unified Power Format for simulation, synthesis and electrical rule checking Equivalence checking.
DDR Design Engineer
Cupertino, CA · On-site
As a logic design engineer, you will be involved in all phases of the design, from concept study ... Unified Power Format for simulation, synthesis and electrical rule checking Equivalence checking.
From Home Unified Power information
See salary details
$16.11 - $20.59
4% of jobs
$20.59 - $25.07
16% of jobs
$26.07 is the 25th percentile. Wages below this are outliers.
$25.07 - $29.55
20% of jobs
The median wage is $31.07 / hr.
$29.55 - $34.03
27% of jobs
$36.19 is the 75th percentile. Wages above this are outliers.
$34.03 - $38.51
15% of jobs
$38.51 - $42.99
8% of jobs
$42.99 - $47.47
5% of jobs
$47.47 - $51.94
1% of jobs
$51.94 - $56.42
1% of jobs
$56.42 - $60.90
1% of jobs
$60.90 - $65.38
1% of jobs
$16
$34
$65
How much do from home unified power jobs pay per hour?
As of Aug 5, 2026, the average hourly pay for from home unified power in the United States is $34.43, according to ZipRecruiter salary data. Most workers in this role earn between $25.96 and $38.22 per hour, depending on experience, location, and employer.
What are the most commonly searched types of Unified Power jobs? The most popular types of Unified Power jobs are:
Job description
Job Title: Core Engineering - Design Engineer III
Duration: 12 months with possible extension
Location: onsite Austin or Sunnyvale
Job Description:
Responsibilities
Perform comprehensive power analysis at various design stages, spanning from RTL to GDSII.
Contribute to the development, improvement, and automation of various power analysis flows. This includes gathering and analyzing large datasets for power modeling via automated processes.
Investigate and address power inefficiencies, providing actionable feedback to the RTL design team.
Minimum Qualifications
Demonstrated experience with RTL-to-GDSII design flow usage and development in advanced technology nodes (7nm and below).
Expertise in low-power implementation and signoff, including power gating, multiple voltage rails, and Unified Power Format (UPF) usage.
Proven experience in power analysis and reduction utilizing industry-standard tools such as PrimeTime PX/PrimePower.
Proficiency in scripting languages, with a strong emphasis on Python and ML/AI frameworks.
Working knowledge of RTL design principles.
Experience in RTL power optimization using specialized tools like Power-Artist.
Ability to learn quickly, explore new ideas, and iterate rapidly to achieve optimal results.
Preferred Qualifications
Experience with synthesis and Place and Route (PnR) flows.
Experience analyzing Intellectual Property (IP) design for power characteristics and building run-time estimation models for use by software/firmware teams.
Skills in data analysis and data modeling, including the application of machine learning approaches.
Education
• Must Have: Bachelor degree in Electrical/Computer Engineering or Computer Science
• Master's Degree preferred but not required
Duration: 12 months with possible extension
Location: onsite Austin or Sunnyvale
Job Description:
Responsibilities
Perform comprehensive power analysis at various design stages, spanning from RTL to GDSII.
Contribute to the development, improvement, and automation of various power analysis flows. This includes gathering and analyzing large datasets for power modeling via automated processes.
Investigate and address power inefficiencies, providing actionable feedback to the RTL design team.
Minimum Qualifications
Demonstrated experience with RTL-to-GDSII design flow usage and development in advanced technology nodes (7nm and below).
Expertise in low-power implementation and signoff, including power gating, multiple voltage rails, and Unified Power Format (UPF) usage.
Proven experience in power analysis and reduction utilizing industry-standard tools such as PrimeTime PX/PrimePower.
Proficiency in scripting languages, with a strong emphasis on Python and ML/AI frameworks.
Working knowledge of RTL design principles.
Experience in RTL power optimization using specialized tools like Power-Artist.
Ability to learn quickly, explore new ideas, and iterate rapidly to achieve optimal results.
Preferred Qualifications
Experience with synthesis and Place and Route (PnR) flows.
Experience analyzing Intellectual Property (IP) design for power characteristics and building run-time estimation models for use by software/firmware teams.
Skills in data analysis and data modeling, including the application of machine learning approaches.
Education
• Must Have: Bachelor degree in Electrical/Computer Engineering or Computer Science
• Master's Degree preferred but not required
About Infotech Sourcing
Sourced by ZipRecruiter
Industry
It services
Company size
11 - 50 Employees
Headquarters location
San Francisco, CA, US
Year founded
2004