... Pro, and Mac. We are looking for an experienced engineer to help drive architecture and RTL for ... C++ programming Experience using an interpretive language such as Perl or Python
... Pro, and Mac. We are looking for an experienced engineer to help drive architecture and RTL for ... C++ programming Experience using an interpretive language such as Perl or Python
... Pro, and Mac. We are looking for an experienced engineer to help drive architecture and RTL for ... C++ programming Experience using an interpretive language such as Perl or Python
... Pro, and Mac. We are looking for an experienced engineer to help drive architecture and RTL for ... C++ programming Experience using an interpretive language such as Perl or Python
... Pro, and Mac. We are looking for an experienced engineer to help drive architecture and RTL for ... C++ programming Experience using an interpretive language such as Perl or Python
... Pro, and Mac. We are looking for an experienced engineer to help drive architecture and RTL for ... C++ programming Experience using an interpretive language such as Perl or Python
OSP Engineer
Beaverton, OR · On-site
Type: Contract/Temporary * Job #97772 Mountain Ltd. has an opening for a OSP Engineer to work ... Must have own tools such as a laptop, microsoft office 365 desktop version and adobe pro PDF Editor ...
OSP Engineer
Beaverton, OR · On-site
Type: Contract/Temporary * Job #97772 Mountain Ltd. has an opening for a OSP Engineer to work ... Must have own tools such as a laptop, microsoft office 365 desktop version and adobe pro PDF Editor ...
... Watch, Vision Pro, and Mac. We are looking for an experienced technical leader to drive ... C++ programming Experience using an interpretive language such as Perl or Python
... Watch, Vision Pro, and Mac. We are looking for an experienced technical leader to drive ... C++ programming Experience using an interpretive language such as Perl or Python
... Watch, Vision Pro, and Mac. We are looking for an experienced technical leader to drive ... C++ programming Experience using an interpretive language such as Perl or Python
... Watch, Vision Pro, and Mac. We are looking for an experienced technical leader to drive ... C++ programming Experience using an interpretive language such as Perl or Python
... Watch, Vision Pro, and Mac. We are looking for an experienced technical leader to drive ... C++ programming Experience using an interpretive language such as Perl or Python
... Watch, Vision Pro, and Mac. We are looking for an experienced technical leader to drive ... C++ programming Experience using an interpretive language such as Perl or Python
FSO - Tech Cons - Platforms - P&C Insurance - Guidewire - Technical Consultant - Senior
Portland, OR · On-site
$102.50 - $187.90/hr
Medical
Dental
Retirement
PTO
... pro-activity in meeting their needs and having truly globally integrated capabilities. * Guidewire ... Demonstrate technical capabilities and engineering skills that support the insurance technology ...
FSO - Tech Cons - Platforms - P&C Insurance - Guidewire - Technical Consultant - Senior
Portland, OR · On-site
$102.50 - $187.90/hr
Medical
Dental
Retirement
PTO
... pro-activity in meeting their needs and having truly globally integrated capabilities. * Guidewire ... Demonstrate technical capabilities and engineering skills that support the insurance technology ...
Lead Timber Engineer
$108K - $143K/yr
Structural Engineering for bracing, lifting and other temporary construction methods for mass ... Work with and coordinate with the Virtual Design and Construction (VD&C) department to provide mass ...
Lead Timber Engineer
$108K - $143K/yr
Structural Engineering for bracing, lifting and other temporary construction methods for mass ... Work with and coordinate with the Virtual Design and Construction (VD&C) department to provide mass ...
Lead Timber Engineer
Portland, OR · On-site
$108K - $143K/yr
Structural Engineering for bracing, lifting and other temporary construction methods for mass ... Work with and coordinate with the Virtual Design and Construction (VD&C) department to provide mass ...
Lead Timber Engineer
Portland, OR · On-site
$108K - $143K/yr
Structural Engineering for bracing, lifting and other temporary construction methods for mass ... Work with and coordinate with the Virtual Design and Construction (VD&C) department to provide mass ...
Lead Forward Deployed Engineer, Palantir
$108K - $143K/yr
Your ability to influence decisions at the C-suite level, while maintaining hands-on technical ... Engineering & Data Foundations * Review and contribute to production-quality code * Guide ...
Lead Forward Deployed Engineer, Palantir
$108K - $143K/yr
Your ability to influence decisions at the C-suite level, while maintaining hands-on technical ... Engineering & Data Foundations * Review and contribute to production-quality code * Guide ...
CPU Cache Microarchitect/RTL Engineer
$184K - $324K/yr
Medical
Dental
Retirement
... Pro, and Mac. We are looking for an experienced engineer who can drive CPU multi-level cache ... C++ programming Experience using an interpretive language such as Perl or Python Minimum ...
CPU Cache Microarchitect/RTL Engineer
$184K - $324K/yr
Medical
Dental
Retirement
... Pro, and Mac. We are looking for an experienced engineer who can drive CPU multi-level cache ... C++ programming Experience using an interpretive language such as Perl or Python Minimum ...
CPU Cache Microarchitect/RTL Engineer
$184K - $324K/yr
Medical
Dental
Retirement
... Pro, and Mac. We are looking for an experienced engineer who can drive CPU multi-level cache ... C++ programming Experience using an interpretive language such as Perl or Python Minimum ...
CPU Cache Microarchitect/RTL Engineer
$184K - $324K/yr
Medical
Dental
Retirement
... Pro, and Mac. We are looking for an experienced engineer who can drive CPU multi-level cache ... C++ programming Experience using an interpretive language such as Perl or Python Minimum ...
CPU Cache Microarchitect/RTL Engineer
$184K - $324K/yr
Medical
Dental
Retirement
... Pro, and Mac. We are looking for an experienced engineer who can drive CPU multi-level cache ... C++ programming Experience using an interpretive language such as Perl or Python Minimum ...
CPU Cache Microarchitect/RTL Engineer
$184K - $324K/yr
Medical
Dental
Retirement
... Pro, and Mac. We are looking for an experienced engineer who can drive CPU multi-level cache ... C++ programming Experience using an interpretive language such as Perl or Python Minimum ...
CPU Cache Microarchitect/RTL Engineer
$184K - $324K/yr
Medical
Dental
Retirement
... Pro, and Mac. We are looking for an experienced engineer who can drive CPU multi-level cache ... C++ programming Experience using an interpretive language such as Perl or Python Minimum ...
CPU Cache Microarchitect/RTL Engineer
$184K - $324K/yr
Medical
Dental
Retirement
... Pro, and Mac. We are looking for an experienced engineer who can drive CPU multi-level cache ... C++ programming Experience using an interpretive language such as Perl or Python Minimum ...
CPU Cache Microarchitect/RTL Engineer
$184K - $324K/yr
Medical
Dental
Retirement
... Pro, and Mac. We are looking for an experienced engineer who can drive CPU multi-level cache ... C++ programming Experience using an interpretive language such as Perl or Python Minimum ...
CPU Cache Microarchitect/RTL Engineer
$184K - $324K/yr
Medical
Dental
Retirement
... Pro, and Mac. We are looking for an experienced engineer who can drive CPU multi-level cache ... C++ programming Experience using an interpretive language such as Perl or Python Minimum ...
CPU Cache Microarchitect/RTL Engineer
$184K - $324K/yr
Medical
Dental
Retirement
... Pro, and Mac. We are looking for an experienced engineer who can drive CPU multi-level cache ... C++ programming Experience using an interpretive language such as Perl or Python Minimum ...
CPU Cache Microarchitect/RTL Engineer
$184K - $324K/yr
Medical
Dental
Retirement
... Pro, and Mac. We are looking for an experienced engineer who can drive CPU multi-level cache ... C++ programming Experience using an interpretive language such as Perl or Python Minimum ...
CPU Power Management Microarchitect/RTL Engineer
$184K - $324K/yr
Medical
Dental
Retirement
... Pro, and Mac. We are looking for an experienced engineer to help drive architecture and RTL for ... C++ programming Experience using an interpretive language such as Perl or Python Minimum ...
CPU Power Management Microarchitect/RTL Engineer
$184K - $324K/yr
Medical
Dental
Retirement
... Pro, and Mac. We are looking for an experienced engineer to help drive architecture and RTL for ... C++ programming Experience using an interpretive language such as Perl or Python Minimum ...
CPU Power Management Microarchitect/RTL Engineer
$184K - $324K/yr
Medical
Dental
Retirement
... Pro, and Mac. We are looking for an experienced engineer to help drive architecture and RTL for ... C++ programming Experience using an interpretive language such as Perl or Python Minimum ...
CPU Power Management Microarchitect/RTL Engineer
$184K - $324K/yr
Medical
Dental
Retirement
... Pro, and Mac. We are looking for an experienced engineer to help drive architecture and RTL for ... C++ programming Experience using an interpretive language such as Perl or Python Minimum ...
CPU Power Management Microarchitect/RTL Engineer
$184K - $324K/yr
Medical
Dental
Retirement
... Pro, and Mac. We are looking for an experienced engineer to help drive architecture and RTL for ... C++ programming Experience using an interpretive language such as Perl or Python Minimum ...
CPU Power Management Microarchitect/RTL Engineer
$184K - $324K/yr
Medical
Dental
Retirement
... Pro, and Mac. We are looking for an experienced engineer to help drive architecture and RTL for ... C++ programming Experience using an interpretive language such as Perl or Python Minimum ...
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Full-time
Re-posted 18 days ago
Apple rating
8.0
Based on 677 frontline employees who took The Breakroom Quiz
7th of 30 rated technology retailers
Job description
Imagine what you could do here. At Apple, new ideas have a way of becoming extraordinary products, services and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, hard-working people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products! The same passion for innovation that goes into our products also applies to our practices strengthening our commitment to leave the world better than we found it. Do you want to join us in these pursuits? Join us to help deliver the next groundbreaking Apple product!
Apple's Silicon Engineering Group (SEG) designs high-performance, low power microprocessors that power our innovative products, including the iPhone, iPad, Watch, Vision Pro, and Mac. We are looking for an experienced engineer to help drive architecture and RTL for world-class CPU power management solutions.
Description
As a CPU RTL Architect, you will own or participate in the following:
• Micro-architecture development and specification - from early high-level architectural exploration, through micro-architectural research and arriving at a detailed specification
• RTL ownership - development, assessment and refinement of RTL design to target power, performance, area and timing goals
• Verification - support the verification team in test bench development, formal methods, and simulation/emulation for functional verification
• Performance exploration and correlation - explore high-performance strategies and work with the performance verification team to verify that the RTL design meets targeted performance
• Design delivery - work with multi-functional engineering team to implement and verify physical design on the aspects of timing, area, reliability, testability and power
Minimum Qualifications
Minimum BS and 10+ years of relevant industry experience
Experience with microprocessor architecture
Experience with logic design principles with timing and power implications
Experience in Verilog or VHDL
Experience with simulators and waveform debugging process
Preferred Qualifications
Expertise in one or more of the following areas: dynamic voltage and frequency scaling (DVFS/DVFM), advanced thermal and energy management, power state definition and management, dynamic clocking solutions, Di/dt mitigation strategies, micro-architecture strategies for improved power integrity, debug solutions, error handling, reset control, clock generation and asynchronous clock crossing strategies
Understanding of low power microarchitecture techniques
Understanding of high-performance techniques and trade-offs in a CPU microarchitecture
Experience in C or C++ programming
Experience using an interpretive language such as Perl or Python
Apple's Silicon Engineering Group (SEG) designs high-performance, low power microprocessors that power our innovative products, including the iPhone, iPad, Watch, Vision Pro, and Mac. We are looking for an experienced engineer to help drive architecture and RTL for world-class CPU power management solutions.
Description
As a CPU RTL Architect, you will own or participate in the following:
• Micro-architecture development and specification - from early high-level architectural exploration, through micro-architectural research and arriving at a detailed specification
• RTL ownership - development, assessment and refinement of RTL design to target power, performance, area and timing goals
• Verification - support the verification team in test bench development, formal methods, and simulation/emulation for functional verification
• Performance exploration and correlation - explore high-performance strategies and work with the performance verification team to verify that the RTL design meets targeted performance
• Design delivery - work with multi-functional engineering team to implement and verify physical design on the aspects of timing, area, reliability, testability and power
Minimum Qualifications
Minimum BS and 10+ years of relevant industry experience
Experience with microprocessor architecture
Experience with logic design principles with timing and power implications
Experience in Verilog or VHDL
Experience with simulators and waveform debugging process
Preferred Qualifications
Expertise in one or more of the following areas: dynamic voltage and frequency scaling (DVFS/DVFM), advanced thermal and energy management, power state definition and management, dynamic clocking solutions, Di/dt mitigation strategies, micro-architecture strategies for improved power integrity, debug solutions, error handling, reset control, clock generation and asynchronous clock crossing strategies
Understanding of low power microarchitecture techniques
Understanding of high-performance techniques and trade-offs in a CPU microarchitecture
Experience in C or C++ programming
Experience using an interpretive language such as Perl or Python
About Apple
Sourced by ZipRecruiter
Imagine what you could do here! At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, intelligent people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same real passion for innovation that goes into our products also applies to our practices strengthening our dedication to leave the world better than we found it.
Industry
Computer and electronic product manufacturing
Company size
10,000+ Employees
Headquarters location
Cupertino, CA, US
Year founded
1976