Dallas, TX · On-site
$123.60 - $175.44/hr
... RTL, Standard cells, and similar approaches as necessary for both mixed signal ASIC and FPGA ... Digital Design Engineer or related occupation performing digital or mixed signal design and ...
Dallas, TX · On-site
$123.60 - $175.44/hr
... RTL, Standard cells, and similar approaches as necessary for both mixed signal ASIC and FPGA ... Digital Design Engineer or related occupation performing digital or mixed signal design and ...
Mckinney, TX · On-site
$86.80 - $165.20/hr
... RTL designs, and perform timing, power, and functional analysis. * They will integrate and verify ... Engineering, Mathematics). * 5+ years experience in FPGA/ASIC design, RTL development, and ...
Mckinney, TX · On-site
$86.80 - $165.20/hr
... RTL designs, and perform timing, power, and functional analysis. * They will integrate and verify ... Engineering, Mathematics). * 5+ years experience in FPGA/ASIC design, RTL development, and ...
... custom ASIC / SOC and electronics development across the Semiconductor, Medical and Defense ... Experience in RTL design and design verification, preferred * Ability to create and present design ...
... custom ASIC / SOC and electronics development across the Semiconductor, Medical and Defense ... Experience in RTL design and design verification, preferred * Ability to create and present design ...
Mckinney, TX · On-site
$114K - $157K/yr
... RTL designs, and perform timing, power, and functional analysis. They will integrate and verify ... Engineering, Mathematics). * 5+ years experience in FPGA/ASIC design, RTL development, and ...
Mckinney, TX · On-site
$114K - $157K/yr
... RTL designs, and perform timing, power, and functional analysis. They will integrate and verify ... Engineering, Mathematics). * 5+ years experience in FPGA/ASIC design, RTL development, and ...
$114K - $157K/yr
... RTL designs, and perform timing, power, and functional analysis. They will integrate and verify ... Engineering, Mathematics). * 5+ years experience in FPGA/ASIC design, RTL development, and ...
$114K - $157K/yr
... RTL designs, and perform timing, power, and functional analysis. They will integrate and verify ... Engineering, Mathematics). * 5+ years experience in FPGA/ASIC design, RTL development, and ...
Plano, TX · Remote
Lead ASIC DFT Engineer Location: Remote, (Onsite) Duration: Contract Year of Exp: 8+ yrs to 15 yrs ... Collaborate with RTL design, verification, physical design, STA, and silicon validation teams to ...
Quick apply
Plano, TX · Remote
Lead ASIC DFT Engineer Location: Remote, (Onsite) Duration: Contract Year of Exp: 8+ yrs to 15 yrs ... Collaborate with RTL design, verification, physical design, STA, and silicon validation teams to ...
Grand Prairie, TX · On-site
$116K - $160K/yr
Senior ASIC & FPGA Design Engineer Location: Grand Prairie, TX, 75051, United States [About the ... RTL code (VHDL, Verilog, SystemVerilog) and manage comprehensive design documentation. - Lead ...
Grand Prairie, TX · On-site
$116K - $160K/yr
Senior ASIC & FPGA Design Engineer Location: Grand Prairie, TX, 75051, United States [About the ... RTL code (VHDL, Verilog, SystemVerilog) and manage comprehensive design documentation. - Lead ...
Dallas, TX · On-site
$123K/yr
As a Digital Design Engineer, you will work across the full digital design cycle - from architecture definition and RTL design through functional verification, synthesis, timing closure, and silicon ...
Dallas, TX · On-site
$123K/yr
As a Digital Design Engineer, you will work across the full digital design cycle - from architecture definition and RTL design through functional verification, synthesis, timing closure, and silicon ...
Dallas, TX · On-site
As a Digital Design Engineer, you will work across the full digital design cycle - from architecture definition and RTL design through functional verification, synthesis, timing closure, and silicon ...
Dallas, TX · On-site
As a Digital Design Engineer, you will work across the full digital design cycle - from architecture definition and RTL design through functional verification, synthesis, timing closure, and silicon ...
Richardson, TX · On-site
$177K - $348K/yr
Lead SoC RTL design and integration for HBM logic die, including subsystem partitioning, IP ... Work closely with Product Engineering, Test, Probe, Process Integration, Assembly, and ...
Richardson, TX · On-site
$177K - $348K/yr
Lead SoC RTL design and integration for HBM logic die, including subsystem partitioning, IP ... Work closely with Product Engineering, Test, Probe, Process Integration, Assembly, and ...
Dallas, TX · On-site
$123K/yr
Responsibilities include RTL design, design verification, and DFT, and being a technical ... Familiarity with FPGA design flow and ASIC emulation. * A good understanding of analog ...
Dallas, TX · On-site
$123K/yr
Responsibilities include RTL design, design verification, and DFT, and being a technical ... Familiarity with FPGA design flow and ASIC emulation. * A good understanding of analog ...
Richardson, TX · On-site
$177K - $348K/yr
Lead SoC RTL design and integration for HBM logic die, including subsystem partitioning, IP ... Work closely with Product Engineering, Test, Probe, Process Integration, Assembly, and ...
Richardson, TX · On-site
$177K - $348K/yr
Lead SoC RTL design and integration for HBM logic die, including subsystem partitioning, IP ... Work closely with Product Engineering, Test, Probe, Process Integration, Assembly, and ...
Dallas, TX · On-site
The RTL Engineer performs detailed block design from system requirements and evolving specifications. Perform RTL coding, Lint checks, CDC tests, creating timing constraint file. Working closely with ...
Dallas, TX · On-site
The RTL Engineer performs detailed block design from system requirements and evolving specifications. Perform RTL coding, Lint checks, CDC tests, creating timing constraint file. Working closely with ...
Grand Prairie, TX · On-site
$88/hr
ASIC & FPGA Design Engineering - HYBRID LOCATION: (HYBRID) Grand Prairie, TX PAY RATE: $88.99/hour ... Writes clean, maintainable RTL using VHDL, Verilog, and SystemVerilog that meets performance, power ...
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Grand Prairie, TX · On-site
$88/hr
ASIC & FPGA Design Engineering - HYBRID LOCATION: (HYBRID) Grand Prairie, TX PAY RATE: $88.99/hour ... Writes clean, maintainable RTL using VHDL, Verilog, and SystemVerilog that meets performance, power ...
Experience with FPGA's (Xilinx/Altera), RTL design (Verilog/VHDL), and simulation tools ... Experience with Digital ASIC Design and Design Process * Experience with Testbench Generation
Experience with FPGA's (Xilinx/Altera), RTL design (Verilog/VHDL), and simulation tools ... Experience with Digital ASIC Design and Design Process * Experience with Testbench Generation
Richardson, TX · On-site
$69K - $202K/yr
... Design Engineer ... Responsible for developing and owning RTL development of our latest AI-enabled RISC-V CPU core. The ...
Richardson, TX · On-site
$69K - $202K/yr
... Design Engineer ... Responsible for developing and owning RTL development of our latest AI-enabled RISC-V CPU core. The ...
Richardson, TX · On-site
$123K/yr
Develop highquality RTL in Verilog/SystemVerilog using scalable, parameterized design techniques ... Master's degree in Electrical/Computer Engineering with 5-10 years of related experience.
Richardson, TX · On-site
$123K/yr
Develop highquality RTL in Verilog/SystemVerilog using scalable, parameterized design techniques ... Master's degree in Electrical/Computer Engineering with 5-10 years of related experience.
Richardson, TX · On-site
$123K/yr
Develop high-quality RTL in Verilog/SystemVerilog using scalable, parameterized design techniques ... Master's degree in Electrical/Computer Engineering with 5-10 years of related experience.
Richardson, TX · On-site
$123K/yr
Develop high-quality RTL in Verilog/SystemVerilog using scalable, parameterized design techniques ... Master's degree in Electrical/Computer Engineering with 5-10 years of related experience.
Experience with RTL design (SystemVerilog/VHDL) and logic integration. * Familiarity with ... * 5+ years DRAM or ASIC DFT Design or Verification experience. Preferred Qualifications:
Experience with RTL design (SystemVerilog/VHDL) and logic integration. * Familiarity with ... * 5+ years DRAM or ASIC DFT Design or Verification experience. Preferred Qualifications:
Experience with RTL design (SystemVerilog/VHDL) and logic integration. * Familiarity with ... * 5+ years DRAM or ASIC DFT Design or Verification experience. Preferred Qualifications:
Experience with RTL design (SystemVerilog/VHDL) and logic integration. * Familiarity with ... * 5+ years DRAM or ASIC DFT Design or Verification experience. Preferred Qualifications:
$86.8K - $95.9K
16% of jobs
$95.9K - $105K
3% of jobs
$105K - $114.1K
4% of jobs
$116.7K is the 25th percentile. Wages below this are outliers.
$114.1K - $123.1K
6% of jobs
The median wage is $128.8K / yr.
$123.1K - $132.2K
33% of jobs
$132.2K - $141.3K
3% of jobs
$141.3K - $150.3K
2% of jobs
$156.3K is the 75th percentile. Wages above this are outliers.
$150.3K - $159.4K
12% of jobs
$159.4K - $168.5K
5% of jobs
$168.5K - $177.6K
4% of jobs
$177.6K - $186.6K
12% of jobs
$86.8K
$138.8K
$186.6K
| Aspect | Temporary Asic Rtl Design Engineer | Temporary FPGA Design Engineer |
|---|---|---|
| Primary Focus | Designing RTL code for ASIC chips | Designing FPGA logic and configurations |
| Skills & Certifications | Verilog/VHDL, ASIC design flow, simulation tools | Verilog/VHDL, FPGA development tools, synthesis |
| Work Environment | Semiconductor companies, ASIC design teams | FPGA development labs, prototyping environments |
| Industry Usage | Used in high-volume chip manufacturing | Used for prototyping, testing, and low-volume products |
Both roles involve RTL design using Verilog or VHDL, but the Temporary Asic Rtl Design Engineer focuses on ASIC chip development, while the Temporary FPGA Design Engineer specializes in FPGA-based prototyping and testing. The choice depends on whether the project aims for mass production or flexible, rapid development.
$123.60 - $175.44/hr
Other
Re-posted 12 days ago
8.5
Based on 17 frontline employees who took The Breakroom Quiz
33rd of 156 rated electronics manufacturers
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Analog Devices (NASDAQ: ADI) designs and manufactures semiconductor products and solutions. We enable our customers to interpret the world around us by intelligently bridging the physical and digital worlds with unmatched technologies that sense, measure and connect.
Electrical equipment, appliance, and component manufacturing
5,001 - 10,000 Employees
Norwood, MA, US
1965
