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Temporary Asic Rtl Design Engineer Jobs in Grapevine, TX

RTL Design Engineer Location: Santa Clara, CA/Remote Minimum 10 years of strong experience in Digital design at RTL level using Verilog/System Verilog Experience in developing micro architectural ...

RTL Design/AMS Verification Engineer

Richardson, TX · On-site +1

$122K - $149K/yr

We specialize in advanced technology development, full-custom ASIC/SoC design, and electronics ... We are seeking an experienced RTL Design / AMS Verification Engineer to support digital and mixed ...

Lead ASIC DFT Engineer Location: Remote, (Onsite) Duration: Contract Year of Exp: 8+ yrs to 15 yrs ... Collaborate with RTL design, verification, physical design, STA, and silicon validation teams to ...

... Lead ASIC DFT Engineer to architect, implement, verify, and debug advanced DFT solutions for ... Collaborate with RTL design, verification, physical design, STA, and silicon validation teams to ...

... Lead ASIC DFT Engineer to architect, implement, verify, and debug advanced DFT solutions for ... Collaborate with RTL design, verification, physical design, STA, and silicon validation teams to ...

Design Verification Engineer

Plano, TX · On-site

$130K - $158K/yr

and other details - We are seeking an ASIC Design Verification Engineer whose role will be to ... RTL design, DFT, firmware, physical design, and silicon validation engineers. This is a hands-on ...

Digital IC Design Engineer

Dallas, TX · On-site

$90 - $120/hr

As a Digital Design Engineer, you will work across the full digital design cycle - from architecture definition and RTL design through functional verification, synthesis, timing closure, and silicon ...

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Temporary Asic Rtl Design Engineer information

See Grapevine, TX salary details

$86.8K

$138.8K

$186.6K

How much do temporary asic rtl design engineer jobs pay per year?

As of Aug 10, 2026, the average yearly pay for temporary asic rtl design engineer in Grapevine, TX is $138,763.00, according to ZipRecruiter salary data. Most workers in this role earn between $121,500.00 and $166,300.00 per year, depending on experience, location, and employer.

What is the difference between Temporary Asic Rtl Design Engineer vs Temporary FPGA Design Engineer?

AspectTemporary Asic Rtl Design EngineerTemporary FPGA Design Engineer
Primary FocusDesigning RTL code for ASIC chipsDesigning FPGA logic and configurations
Skills & CertificationsVerilog/VHDL, ASIC design flow, simulation toolsVerilog/VHDL, FPGA development tools, synthesis
Work EnvironmentSemiconductor companies, ASIC design teamsFPGA development labs, prototyping environments
Industry UsageUsed in high-volume chip manufacturingUsed for prototyping, testing, and low-volume products

Both roles involve RTL design using Verilog or VHDL, but the Temporary Asic Rtl Design Engineer focuses on ASIC chip development, while the Temporary FPGA Design Engineer specializes in FPGA-based prototyping and testing. The choice depends on whether the project aims for mass production or flexible, rapid development.

What cities near Grapevine, TX are hiring for Temporary Asic Rtl Design Engineer jobs? Cities near Grapevine, TX with the most Temporary Asic Rtl Design Engineer job openings:
Infographic showing various Temporary Asic Rtl Design Engineer job openings in Grapevine, TX as of August 2026, with employment types broken down into 87% Full Time, 8% Part Time, and 5% Contract. Highlights an 85% Physical, 4% Hybrid, and 11% Remote job distribution, with an average salary of $138,763 per year, or $66.7 per hour.

RTL Design/AMS Verification Engineer

IC Enable

Richardson, TX • On-site

$120 - $180/hr

Other

Retirement, PTO

Re-posted 9 days ago


Job description

Now is an exciting time to join our team as we continue to change the industry through experience in technology development, full-custom ASIC and electronics development across the Semiconductor, Medical and Defense industries, including some of the most challenging fabrication processes and product applications. We are always looking for talented and dedicated IC Design Professionals to join our organization.

Location

Richardson, TX
Remote considered based on experience and qualifications

Join IC Enable and Help Shape the Future of Semiconductor Innovation

For more than 20 years, IC Enable has delivered world-class design IP, semiconductor products, engineering services, and platform solutions to customers ranging from innovative startups to Fortune 50 companies. Our expertise spans high-reliability mixed-signal and digital IC development, while our platform solutions support leading IDMs, foundries, and IP providers.

This is an exciting opportunity to join a team that is driving innovation across the Semiconductor, Medical, and Defense industries. We specialize in advanced technology development, full-custom ASIC/SoC design, and electronics development for some of the industry's most challenging fabrication processes and product applications.

We are seeking an experienced RTL Design Engineer with a strong background in RTL design, design verification, synthesis, and physical implementation. The ideal candidate will have experience developing complex, high-performance integrated circuits across a variety of process technologies and application areas, including:

  • Read-Out Integrated Circuits (ROICs)
  • Wireless Transceivers
  • Energy Harvesting
  • Sensor Interfaces
  • Other advanced mixed-signal and digital systems
Key Responsibilities
  • Develop and verify RTL designs using industry-standard Verilog methodologies.
  • Execute design verification activities to ensure functionality and performance objectives are achieved.
  • Setup and run AMS simulations using Cadence tools.
  • Perform synthesis and support automatic place-and-route (APR) implementation.
  • Collaborate on IP integration and subsystem development.
  • Create and present design reviews, technical documentation, and test/characterization plans.
  • Work closely with cross-functional engineering teams to support successful silicon development and product delivery.
  • Apply industry best practices throughout the IC development lifecycle.
Required Qualifications
  • Bachelor's or Master's degree in Electrical Engineering or a related field.
  • Minimum of 5 years of experience in integrated circuit design.
  • Strong expertise in Verilog RTL design using Cadence and/or Synopsys design flows.
  • Hands‑on experience with:
    • RTL design
    • Design verification and AMS verification
    • Logic synthesis
    • Automatic place‑and‑route (APR)
  • Thorough understanding of silicon development methodologies, tools, and best practices.
  • Excellent debugging, analytical, and problem‑solving skills.
  • Strong written and verbal communication skills and the ability to present complex technical concepts effectively.
  • Role requires candidate to be approved under ITAR compliance requirements (US citizen or Green card holder).
Preferred Qualifications
  • Experience with IP integration.
  • Programming and automation skills in one or more of the following:
    • Python
    • Perl
    • Tcl
    • SKILL
  • Understanding of both digital and analog/mixed‑signal design methodologies.
  • Experience with digital front‑end design and/or RF systems.
  • Familiarity with a broad range of semiconductor process technologies and manufacturing environments.
Why IC Enable?

IC Enable offers a comprehensive benefits package designed to support our employees and their families, including:

  • Competitive Paid Time Off (PTO)
  • Paid Holidays
  • 401(k) with Company Match
  • Performance‑Based Variable Compensation Opportunities
  • Opportunities to work on cutting‑edge technologies with industry‑leading customers
  • Collaborative and highly skilled engineering environment
Equal Opportunity Employer

IC Enable is proud to be an Equal Opportunity Employer. We celebrate diversity and are committed to creating an inclusive environment for all employees.

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IC Enable logo

About IC Enable

Sourced by ZipRecruiter

Industry

Semiconductor and electronic component manufacturing

Company size

51 - 200 Employees

Headquarters location

Dallas, TX, US

Year founded

2004