The SME works across systems engineering, ASIC design, RF design, hardware, software, packaging, test, manufacturing, and program management teams to translate operational needs into achievable ...
The SME works across systems engineering, ASIC design, RF design, hardware, software, packaging, test, manufacturing, and program management teams to translate operational needs into achievable ...
US_West | Infrastructure Engineer_L3
NJ · On-site
$169K/yr
Marie.samayoa@capgemini.com SOC Design Verification Engineer Location: Redmond, WA Onsite Role Minimum Qualifications • Track record of 'first-pass success' in ASIC development cycles. • Bachelor ...
US_West | Infrastructure Engineer_L3
NJ · On-site
$169K/yr
Marie.samayoa@capgemini.com SOC Design Verification Engineer Location: Redmond, WA Onsite Role Minimum Qualifications • Track record of 'first-pass success' in ASIC development cycles. • Bachelor ...
FPGA Engineer with Security Clearance
Camden, NJ · On-site
$131K - $168K/yr
Senior FPGA Design Engineer Location: Camden, NJ (100% On-Site) Type: 12 Months, Temp-to-Perm | Active Secret Clearance Required We are seeking a Senior FPGA Design Engineer to support a high ...
FPGA Engineer with Security Clearance
Camden, NJ · On-site
$131K - $168K/yr
Senior FPGA Design Engineer Location: Camden, NJ (100% On-Site) Type: 12 Months, Temp-to-Perm | Active Secret Clearance Required We are seeking a Senior FPGA Design Engineer to support a high ...
Design Engineering Market: Transportation Employment Type: Full Time Position Overview Kiewit Infrastructure Engineering has an opening for a dynamic Experienced Structural Engineer in our Temporary ...
Design Engineering Market: Transportation Employment Type: Full Time Position Overview Kiewit Infrastructure Engineering has an opening for a dynamic Experienced Structural Engineer in our Temporary ...
Structural Engineer - Temporary Structures - Kiewit Infrastructure Engineers
Woodcliff Lake, NJ · On-site
Design Engineering Market: Transportation Employment Type: Full Time Position Overview Kiewit Infrastructure Engineering has an opening for a dynamic Experienced Structural Engineer in our Temporary ...
Structural Engineer - Temporary Structures - Kiewit Infrastructure Engineers
Woodcliff Lake, NJ · On-site
Design Engineering Market: Transportation Employment Type: Full Time Position Overview Kiewit Infrastructure Engineering has an opening for a dynamic Experienced Structural Engineer in our Temporary ...
Senior Design Verification Engineer - FPGA with Security Clearance
Totowa, NJ · On-site
$97K - $164K/yr
BAE is looking for experienced FPGA Design Verification Engineers who can develop and use ... Experience with FPGA/ASIC design and verification tools (Mentor Questa or Cadence) * Proven track ...
Senior Design Verification Engineer - FPGA with Security Clearance
Totowa, NJ · On-site
$97K - $164K/yr
BAE is looking for experienced FPGA Design Verification Engineers who can develop and use ... Experience with FPGA/ASIC design and verification tools (Mentor Questa or Cadence) * Proven track ...
Senior Principal Design Verification Engineer - FPGA - (Sign-on with Security Clearance
Totowa, NJ · On-site
$130K - $221K/yr
BAE is looking for experienced senior level FPGA Design Verification Engineers who can plan ... Experience with FPGA/ASIC design and verification tools (Mentor Questa or Cadence) * Proven track ...
Senior Principal Design Verification Engineer - FPGA - (Sign-on with Security Clearance
Totowa, NJ · On-site
$130K - $221K/yr
BAE is looking for experienced senior level FPGA Design Verification Engineers who can plan ... Experience with FPGA/ASIC design and verification tools (Mentor Questa or Cadence) * Proven track ...
Senior Principal Design Verification Engineer - FPGA - (Sign-on with Security Clearance
Totowa, NJ · On-site
$130K - $221K/yr
BAE is looking for experienced senior level FPGA Design Verification Engineers who can plan ... Experience with FPGA/ASIC design and verification tools (Mentor Questa or Cadence) * Proven track ...
Senior Principal Design Verification Engineer - FPGA - (Sign-on with Security Clearance
Totowa, NJ · On-site
$130K - $221K/yr
BAE is looking for experienced senior level FPGA Design Verification Engineers who can plan ... Experience with FPGA/ASIC design and verification tools (Mentor Questa or Cadence) * Proven track ...
Sr Structural Engineer - Temporary Works - Kiewit Infrastructure Engineers
Woodcliff Lake, NJ · On-site
$106K - $144K/yr
Design Engineering Market: Transportation Employment Type: Full Time Position Overview Kiewit Infrastructure Engineering has an opening for a highly Experienced Structural Engineer in our Temporary ...
Sr Structural Engineer - Temporary Works - Kiewit Infrastructure Engineers
Woodcliff Lake, NJ · On-site
$106K - $144K/yr
Design Engineering Market: Transportation Employment Type: Full Time Position Overview Kiewit Infrastructure Engineering has an opening for a highly Experienced Structural Engineer in our Temporary ...
San Jose, CA 100% Onsite ASIC Package Engineer SI/PI Responsibilities: • Drive chip-package-system co-design by driving signal and power integrity requirements analysis and optimization • Define ...
San Jose, CA 100% Onsite ASIC Package Engineer SI/PI Responsibilities: • Drive chip-package-system co-design by driving signal and power integrity requirements analysis and optimization • Define ...
US_West | Infrastructure Engineer_L3
NJ · On-site
$110K - $144K/yr
... of ASIC design flow and ASIC prototyping flow. • Experience with FPGA and hardware evaluation ... Software Infrastructure Engineer * Local Skills : Julie Skidmore * Languages Required: : English
US_West | Infrastructure Engineer_L3
NJ · On-site
$110K - $144K/yr
... of ASIC design flow and ASIC prototyping flow. • Experience with FPGA and hardware evaluation ... Software Infrastructure Engineer * Local Skills : Julie Skidmore * Languages Required: : English
FPGA Engineer - Control Systems
Princeton, NJ · On-site
$150/hr
We're looking for a few visionary scientists and engineers to join our team, to move fast and blow ... You'll design, implement, and verify features across the control stack, from RTL through hardware ...
FPGA Engineer - Control Systems
Princeton, NJ · On-site
$150/hr
We're looking for a few visionary scientists and engineers to join our team, to move fast and blow ... You'll design, implement, and verify features across the control stack, from RTL through hardware ...
FPGA Engineer - Control Systems
Princeton, NJ · On-site
$150/hr
We're looking for a few visionary scientists and engineers to join our team, to move fast and blow ... You'll design, implement, and verify features across the control stack, from RTL through ...
FPGA Engineer - Control Systems
Princeton, NJ · On-site
$150/hr
We're looking for a few visionary scientists and engineers to join our team, to move fast and blow ... You'll design, implement, and verify features across the control stack, from RTL through ...
Photonic Design Verification Test Engineer - Acacia (Onsite)
Holmdel, NJ · On-site
$154K - $225K/yr
... DVT) Engineer to design and run automated testing of PIC devices, assist development teams with ... optical packaging, ASIC development, and the operations teams to deliver leading edge, high ...
Photonic Design Verification Test Engineer - Acacia (Onsite)
Holmdel, NJ · On-site
$154K - $225K/yr
... DVT) Engineer to design and run automated testing of PIC devices, assist development teams with ... optical packaging, ASIC development, and the operations teams to deliver leading edge, high ...
Photonic Design Verification Test Engineer - Acacia (Onsite)
Holmdel, NJ · On-site
$154K - $225K/yr
... DVT) Engineer to design and run automated testing of PIC devices, assist development teams with ... optical packaging, ASIC development, and the operations teams to deliver leading edge, high ...
Photonic Design Verification Test Engineer - Acacia (Onsite)
Holmdel, NJ · On-site
$154K - $225K/yr
... DVT) Engineer to design and run automated testing of PIC devices, assist development teams with ... optical packaging, ASIC development, and the operations teams to deliver leading edge, high ...
FPGA Engineer
$128K - $164K/yr
Apply Now RTL, C/C++, Python, VHDL, Verilog, Tcl, cryptography, hardware, embedded software, System ... Key Responsibilities FPGA Design and Development: Design and develop IP cores and FPGA ...
Quick apply
FPGA Engineer
$128K - $164K/yr
Apply Now RTL, C/C++, Python, VHDL, Verilog, Tcl, cryptography, hardware, embedded software, System ... Key Responsibilities FPGA Design and Development: Design and develop IP cores and FPGA ...
What You Will Do As a Field Applications Engineer (FAE) , your key responsibilities will be ... Experience in FPGA, ASIC, and/or digital design * Experience with FPGA development tools (e.g ...
What You Will Do As a Field Applications Engineer (FAE) , your key responsibilities will be ... Experience in FPGA, ASIC, and/or digital design * Experience with FPGA development tools (e.g ...
$134K - $195K/yr
What You Will Do As a Field Applications Engineer (FAE) , your key responsibilities will be ... Experience in FPGA, ASIC, and/or digital design * Experience with FPGA development tools (e.g ...
$134K - $195K/yr
What You Will Do As a Field Applications Engineer (FAE) , your key responsibilities will be ... Experience in FPGA, ASIC, and/or digital design * Experience with FPGA development tools (e.g ...
2027 Masters ASIC Package Engineering Co-op/Intern
Secaucus, NJ · Hybrid
$17 - $22/hr
We are seeking a highly motivated ASIC Package Engineering intern/co-op to join our team and work ... We will have your involvement in supporting Package design and Package Development Engineers in ...
2027 Masters ASIC Package Engineering Co-op/Intern
Secaucus, NJ · Hybrid
$17 - $22/hr
We are seeking a highly motivated ASIC Package Engineering intern/co-op to join our team and work ... We will have your involvement in supporting Package design and Package Development Engineers in ...
2027 Undergrad ASIC Package Engineering Co-op/Intern
Secaucus, NJ · Hybrid
$17 - $22/hr
We are seeking a highly motivated ASIC Package Engineering intern/co-op to join our team and work ... We will have your involvement in supporting Package design and Package Development Engineers in ...
2027 Undergrad ASIC Package Engineering Co-op/Intern
Secaucus, NJ · Hybrid
$17 - $22/hr
We are seeking a highly motivated ASIC Package Engineering intern/co-op to join our team and work ... We will have your involvement in supporting Package design and Package Development Engineers in ...
Temporary Asic Rtl Design Engineer information
What is the difference between Temporary Asic Rtl Design Engineer vs Temporary FPGA Design Engineer?
| Aspect | Temporary Asic Rtl Design Engineer | Temporary FPGA Design Engineer |
|---|---|---|
| Primary Focus | Designing RTL code for ASIC chips | Designing FPGA logic and configurations |
| Skills & Certifications | Verilog/VHDL, ASIC design flow, simulation tools | Verilog/VHDL, FPGA development tools, synthesis |
| Work Environment | Semiconductor companies, ASIC design teams | FPGA development labs, prototyping environments |
| Industry Usage | Used in high-volume chip manufacturing | Used for prototyping, testing, and low-volume products |
Both roles involve RTL design using Verilog or VHDL, but the Temporary Asic Rtl Design Engineer focuses on ASIC chip development, while the Temporary FPGA Design Engineer specializes in FPGA-based prototyping and testing. The choice depends on whether the project aims for mass production or flexible, rapid development.
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The most popular types of Asic Rtl Design Engineer jobs in New Jersey are:
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For Temporary Asic Rtl Design Engineer jobs in New Jersey, the most frequently searched job titles are:
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The top searched job categories for Temporary Asic Rtl Design Engineer jobs in New Jersey are:
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Cities in New Jersey with the most Temporary Asic Rtl Design Engineer job openings:

Systems Engineering Lead
Clifton, NJ
Full-time
Medical, Retirement, PTO
Posted 23 days ago
Key responsibilities
Serve as the systems engineering SME for RF ASIC-related technical issues.
Derive and allocate system requirements to RF ASIC functions, interfaces, and performance needs.
Support modeling, simulation, verification, and test activities to ensure system-level compliance and performance.
Job description
L3Harris is dedicated to recruiting and developing high-performing talent who are passionate about what they do. Our employees are unified in a shared dedication to our customers' mission and quest for professional growth. L3Harris provides an inclusive, engaging environment designed to empower employees and promote work-life success. Fundamental to our culture is an unwavering focus on values, dedication to our communities, and commitment to excellence in everything we do.
L3Harris is the Trusted Disruptor in defense tech. With customers' mission-critical needs always in mind, our employees deliver end-to-end technology solutions connecting the space, air, land, sea and cyber domains in the interest of national security.
Job Title: Systems Engineering Lead
Job Code: 43006
Job Location: Clifton, NJ
Job Schedule: 9/80: Employees work 9 out of every 14 days- totaling 80 hours worked- and have every other Friday off
Position Overview:
The RF ASIC Subject Matter Expert (SME) - Systems Engineering provides technical leadership for the definition, integration, verification, and lifecycle support of RF ASIC capabilities within larger system architectures. This role serves as the bridge between system requirements and ASIC implementation, ensuring RF ASIC solutions align with mission objectives, platform constraints, interface definitions, performance budgets, and verification strategies. The SME works across systems engineering, ASIC design, RF design, hardware, software, packaging, test, manufacturing, and program management teams to translate operational needs into achievable technical requirements and to ensure the delivered RF ASIC performs as intended in the full system environment.
- Ensure RF ASIC designs support system-level performance, interoperability, and mission objectives.
- Translate system and subsystem requirements into RF ASIC functional and performance allocations.
- Assess the impact of RF ASIC design decisions on overall system performance, integration risk, cost, and schedule.
- Support verification, validation, and technical risk management across the full development lifecycle.
Essential Functions:
- Serve as the systems engineering SME for RF ASIC-related technical issues.
- Derive and allocate system requirements to RF ASIC functions, interfaces, and performance needs.
- Manage RF ASIC performance budgets, including gain, noise figure, linearity, phase noise, dynamic range, power, and spectral purity.
- Ensure traceability from customer needs through system requirements, ASIC implementation, and verification.
- Evaluate RF ASIC architectures and support trade studies across performance, SWaP, reliability, producibility, and lifecycle cost.
- Coordinate RF ASIC integration with antennas, RF front ends, converters, digital processing, timing, power, thermal, and control interfaces.
- Define and manage electrical, mechanical, thermal, digital, and control interfaces impacting RF ASIC integration.
- Support modeling, simulation, verification, and test activities to ensure system-level compliance and performance.
- Identify technical risks related to RF ASIC performance, manufacturability, qualification, integration, and obsolescence, and develop mitigation plans.
- Support design reviews, root cause investigations, production transition, and customer technical engagement.
- Significant experience in RF systems, RFIC/ASIC development, or system integration involving RF subsystems.
- Strong understanding of systems engineering principles, including requirements development, allocation, traceability, interface management, and verification.
- Working knowledge of RF ASIC technologies and their effects on system-level behavior.
- Experience performing trade studies and system performance analysis.
- Ability to interpret and communicate RF technical issues in a system context.
- Experience supporting technical reviews, risk assessments, and cross-functional engineering efforts.
- Strong written and verbal communication skills.
- Ability to lift 20 lbs
- Up to 10% travel, as required
Qualifications:
- Bachelor's Degree and minimum 9 years of prior relevant experience. Graduate Degree and a minimum of 7 years of prior related experience. In lieu of a degree, minimum of 13 years of prior related experience.
- Active Secret Clearance required.
Preferred Additional Skills:
- Master's degree or higher in Electrical Engineering, Systems Engineering, or related field.
- Experience in aerospace, defense, communications, radar, EW, SIGINT, or space systems.
- Familiarity with model-based systems engineering, requirements management tools, and verification planning tools.
- Multi-domain knowledge, in particular systems, RF, software, and firmware
- Hands on experience in system integration, engineering testing, and system performance characterization of embedded RF systems
- Experience with environmental qualification, production transition, and lifecycle support.
- Experience briefing customers or program leadership on technical issues and trades.
- Active Top Secret Security Clearance
In compliance with pay transparency requirements, the salary range for this role in New Jersey is $127,500 - $236,000. This is not a guarantee of compensation or salary, as final offer amount may vary based on factors including but not limited to experience and geographic location. L3Harris also offers a variety of benefits, including health and disability insurance, 401(k) match, flexible spending accounts, EAP, education assistance, parental leave, paid time off, and company-paid holidays. The specific programs and options available to an employee may vary depending on date of hire, schedule type, and the applicability of collective bargaining agreements.
#LI-ML2
L3Harris Technologies is proud to be an Equal Opportunity Employer. L3Harris is committed to treating all employees and applicants for employment with respect and dignity and maintaining a workplace that is free from unlawful discrimination. All applicants will be considered for employment without regard to race, color, religion, age, national origin, ancestry, ethnicity, gender (including pregnancy, childbirth, breastfeeding or other related medical conditions), gender identity, gender expression, sexual orientation, marital status, veteran status, disability, genetic information, citizenship status, characteristic or membership in any other group protected by federal, state or local laws. L3Harris maintains a drug-free workplace and performs pre-employment substance abuse testing and background checks, where permitted by law.
Please be aware many of our positions require the ability to obtain a security clearance. Security clearances may only be granted to U.S. citizens. In addition, applicants who accept a conditional offer of employment may be subject to government security investigation(s) and must meet eligibility requirements for access to classified information.
By submitting your resume for this position, you understand and agree that L3Harris Technologies may share your resume, as well as any other related personal information or documentation you provide, with its subsidiaries and affiliated companies for the purpose of considering you for other available positions.
L3Harris Technologies is an E-Verify Employer. Please click here for the E-Verify Poster in English or Spanish. For information regarding your Right To Work, please click here for English or Spanish.
Employment Type: Full-TimeAbout L3Harris Technologies
Sourced by ZipRecruiter
Industry
Aviation
Company size
1,001 - 5,000 Employees
Headquarters location
Melbourne, FL, US
Year founded
2019