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Telecommute Asic Rtl Design Engineer Jobs in Round Rock, TX

ARM

Staff RTL Design Engineer

Austin, TX · On-site

$198K - $268K/yr

As an Interconnect RTL Design Engineer, you will be part of the Systems team focused on next-generation interconnects targeting high-end mobile, automotive, networking, and enterprise markets! You ...

ARM

Staff RTL Design Engineer

Austin, TX · Hybrid

$198K - $268K/yr

As an Interconnect RTL Design Engineer, you will be part of the Systems team focused on next-generation interconnects targeting high-end mobile, automotive, networking, and enterprise markets! You ...

Intel Corporation

RTL Design Engineer

Austin, TX · On-site

$105K - $200K/yr

... Engineering • At least 1+ years of coursework or experience in the following areas: oBasic Logic Design oMicroprocessors oComputer Architecture oDigital design and RTL coding oVerilog/SystemVerilog ...

Atom Computing

Senior ASIC Design Engineer

Austin, TX · On-site

$140K - $175K/yr

Perform hands-on ASIC design including microarchitecture, RTL development, testing, and integration. * Work closely with Atom Computing's quantum physicists, optical engineers, hardware and software ...

New

Nvidia

ASIC Design Engineer - Hardware

Austin, TX · Hybrid

Join the NVIDIA System-On-Chip (SOC) group as an ASIC Design Engineer and make a broad impact. You ... Run and debug RTL checks to ensure design quality (e.g., cross clock domains (CDC), clocks, reset ...

Intel

RTL Design Engineer

Austin, TX

$105K - $200K/yr

Develops the logic design, register transfer level (RTL) coding, and simulation for a CPU required ... Electrical or Computer Engineering or any STEM related education with at least 2+ years of ...

Meta

ASIC Engineer, Power

Austin, TX · On-site +1

$146K/yr

As an ASIC Engineer specializing in power on the EDA Infrastructure team, you will develop and ... Collaborate with RTL design, physical design, and verification teams to identify and resolve power ...

Intel

CPU RTL Design Engineer

Austin, TX · On-site

$141K - $269K/yr

As a CPU Logic Design Engineer, you will play a critical role in designing and optimizing the logic for Intel's cutting-edge processors. You will drive the development of register transfer level (RTL ...

Intel Corporation

CPU RTL Design Engineer

Austin, TX · On-site

$141K - $269K/yr

As a CPU Logic Design Engineer, you will play a critical role in designing and optimizing the logic for Intel's cutting-edge processors. You will drive the development of register transfer level (RTL ...

Meta

ASIC Engineer, Physical Design

Austin, TX

$178K/yr

The Physical Design team is responsible for translating RTL into manufacturable, high-performance ... ASIC Engineer, Physical Design Responsibilities: * Lead physical implementation of complex ASIC ...

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Showing results 21-40

All JobsTelecommute Asic Rtl Design Engineer JobsTelecommute Asic Rtl Design Engineer Jobs in Round Rock, TX

Telecommute Asic Rtl Design Engineer information

See Round Rock, TX salary details

$87.7K

$140.1K

$188.4K

How much do telecommute asic rtl design engineer jobs pay per year?

As of Aug 14, 2026, the average yearly pay for telecommute asic rtl design engineer in Round Rock, TX is $140,063.00, according to ZipRecruiter salary data. Most workers in this role earn between $122,600.00 and $167,900.00 per year, depending on experience, location, and employer.

What are some common challenges faced by telecommute ASIC RTL design engineers, and how can they be addressed?

Telecommute ASIC RTL Design Engineers often face challenges like coordinating effectively with remote teams, ensuring version control integrity, and maintaining clear communication on project specifications. These challenges can be mitigated by utilizing robust collaboration tools, adhering to standardized documentation practices, and scheduling regular virtual meetings for design reviews. Additionally, staying proactive in seeking feedback and clarifying requirements helps ensure alignment and prevents costly design iterations.

What are the key skills and qualifications needed to thrive as a telecommute ASIC RTL design engineer?

To thrive as a Telecommute ASIC RTL Design Engineer, you need a strong background in digital logic design, proficiency in hardware description languages like Verilog or VHDL, and typically a degree in electrical or computer engineering. Familiarity with EDA tools such as Synopsys or Cadence, as well as experience with simulation, synthesis, and debugging environments, is essential. Strong problem-solving abilities, attention to detail, and effective communication skills are crucial for collaborating remotely and ensuring design accuracy. These skills are vital to deliver complex, high-performance ASICs on schedule while working efficiently in a remote setting.

What is a telecommute ASIC RTL design engineer?

A Telecommute ASIC RTL Design Engineer is a professional who specializes in designing digital circuits at the Register Transfer Level (RTL) for Application-Specific Integrated Circuits (ASICs), while working remotely. They use hardware description languages like Verilog or VHDL to create and verify circuit designs tailored to specific applications. Their responsibilities often include developing, simulating, and optimizing digital logic, collaborating with cross-functional teams, and ensuring that the final silicon meets design specifications. Since the role is telecommute, all work is performed from a remote location using digital communication and collaboration tools.

What is the difference between Telecommute Asic Rtl Design Engineer vs Telecommute Digital IC Design Engineer?

AspectTelecommute Asic Rtl Design EngineerTelecommute Digital IC Design Engineer
CredentialsBachelor's or Master's in Electrical Engineering or Computer Engineering; experience with RTL codingBachelor's or Master's in Electrical Engineering or Computer Engineering; experience with digital circuit design
Work EnvironmentRemote, primarily designing RTL code for ASICsRemote, focusing on digital IC architecture and design
Industry UsageCommon in semiconductor and electronics companies

Both roles often require similar educational backgrounds and work remotely in the semiconductor industry. The main difference lies in their focus: RTL Design Engineers concentrate on writing RTL code for ASICs, while Digital IC Design Engineers work on broader digital circuit architecture. Candidates should choose based on their specific skills and career interests in digital design or RTL coding.

What are the most commonly searched types of Asic Rtl Design Engineer jobs in Round Rock, TX?

The most popular types of Asic Rtl Design Engineer jobs in Round Rock, TX are:

What cities near Round Rock, TX are hiring for Telecommute Asic Rtl Design Engineer jobs?

Cities near Round Rock, TX with the most Telecommute Asic Rtl Design Engineer job openings:

Telecommute Asic Rtl Design Engineer jobs near you

ASIC Design Engineer (eInfochips)

Arrow Electronics, Inc.

Sunset Valley, TX • On-site

Full-time

Re-posted 5 days ago

Arrow Electronics rating

7.7

Company rating: 7.7 out of 10

Based on 19 frontline employees who took The Breakroom Quiz

Job description

Position:ASIC Design Engineer (eInfochips)
Job Description:

Role: Asic Design Engineer

Location: Mountain View CA (Remote)

Note: Seeking candidate with Fusion Compiler and Scripting experince.

What candidate will Be Doing:

  • Proficient in Verilog/System Verilog coding constructs.
  • Knowledge of front-end tools (Verilog simulators, Connectivity tools, CDC checkers, low power static checkers, linting)
  • Experience with high speed PCIe designs and protocols.
  • Experience with Industry standard interface protocols such as AXI, APB, etc.
  • Experience with ARM Fabric IPs.
  • Experience with IPXACT.
  • Understanding of Computer Architecture fundamentals.
  • Ability to write scripts using Python, Tcl, Perl etc.
  • Experience in EDA tools such as VCS, VCLP, Spyglass Lint, Questa CDC, Fusion Compiler, Design Compiler, Genus.
  • Proficiency with UPF (Low power intent)
  • Proficiency in clock crossing techniques.
  • Knowledge of Static Timing Analysis and understanding of timing signoff fundamentals.

What we are looking for:

  • Good in understanding RTL Design and Digital concepts
  • Strong experience with EDA tools: Fusion Compiler, CDC
  • Scripting: Pearl, Python, TCL
  • At-least 5+ years of experience in Verilog Design
  • AMBA AXI bus along-with ARM or C based processor
  • Ensure customer satisfaction.
  • Reporting to customers on daily or weekly progress effectively

Work Arrangement Fully Onsite: Must be able to travel to an Arrow Client office location as requested by Arrow Client leadership.

Location: Mountain View CA (Remote)

About eInfochips:

eInfochips, an Arrow company (Fortune#154), is a leading global provider of product engineering and semiconductor design services. A rich history of over two decades, with over 500+ products developed and 40M deployments in 140 countries, eInfochips continues to fuel technological innovations in multiple verticals. eInfochips has strategic technology partnerships with Qualcomm, NVIDIA, NXP, Analog Devices, Texas Instruments, Amazon, Microsoft and Google to name a few. Along with Arrow’s $38B in revenues, 22,000 employees, and 345 locations serving over 80 countries, eInfochips is primed to accelerate connected products innovation for 150,000+ global clients. eInfochips acts as a catalyst to Arrow’s Sensor-to-Sunset initiative and offers complete edge-to-cloud capabilities for its clients. Please visit www.einfochips.com for our portfolio of product engineering services across

various industries & verticals.

Arrow’s Sensor-to-Sunset initiative and offers complete edge-to-cloud capabilities for its clients. Please visit www.einfochips.com for our portfolio of product engineering services across various industries C verticals.

EEO Statement:

Arrow is an equal opportunity employer. All applicants will be considered for employment without attention to race, color, religion, gender, age, sexual orientation, gender identity, national origin, veteran or disability status.


Location:US-CA-Mountain View, California (Google)
Time Type:Full time
Job Category:Engineering ServicesEEO Statement:

Arrow is an equal opportunity employer. All applicants will be considered for employment without attention to race, color, religion, gender, age, sexual orientation, gender identity, national origin, veteran or disability status. (Arrow EEO/AAP policy)


All Arrow job postings are for existing job vacancies. We anticipate this requisition will be open for a minimum of five days, though it may be open for a longer period of time. We encourage your prompt application.

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