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Locum Asic Rtl Design Engineer Jobs in Round Rock, TX

SambaNova

Senior RTL Design Engineer

Austin, TX · On-site

S. in Electrical Engineering, Computer Engineering, or Computer Science * 5+ years of experience in ASIC RTL design * Solid foundation in computer architecture and digital logic design * Strong ...

SambaNova

Principal RTL Design Engineer

Austin, TX · On-site

B.S. in Electrical Engineering, Computer Engineering, or Computer Science * 7+ years of industry experience in ASIC RTL design * Mastery of synthesizable SystemVerilog for high-speed, high ...

Socket.dev

Senior RTL Design Engineer

Austin, TX · On-site

$120 - $200/hr

S. in Electrical Engineering, Computer Engineering, or Computer Science * 5+ years of experience in ASIC RTL design * Solid foundation in computer architecture and digital logic design * Strong ...

SambaNova

Senior RTL Design Engineer

Austin, TX · On-site

$120K - $200K/yr

S. in Electrical Engineering, Computer Engineering, or Computer Science * 5+ years of experience in ASIC RTL design * Solid foundation in computer architecture and digital logic design * Strong ...

SambaNova

Principal RTL Design Engineer

Austin, TX · On-site

$180K - $255K/yr

B.S. in Electrical Engineering, Computer Engineering, or Computer Science * 7+ years of industry experience in ASIC RTL design * Mastery of synthesizable SystemVerilog for high-speed, high ...

Mythic

RTL Design Engineer

Austin, TX · On-site

$120K - $225K/yr

We're hiring experienced RTL Design Engineers from junior to senior levels to play a key role in designing and implementing the components that will bring our next-generation AI processors to life.

Mythic

RTL Design Engineer

Austin, TX

$120K - $225K/yr

We're hiring experienced RTL Design Engineers from junior to senior levels to play a key role in designing and implementing the components that will bring our next-generation AI processors to life.

Mythic

RTL Design Engineer

Austin, TX · On-site

$120K - $225K/yr

We're hiring experienced RTL Design Engineers from junior to senior levels to play a key role in designing and implementing the components that will bring our next-generation AI processors to life.

Apple

RTL Design Engineer

Austin, TX

$134K/yr

If you're passionate about taking on unsolved challenges, we have a great opportunity for a results-oriented and highly motivated RTL Design Engineer. This is an exciting position in the world class ...

Apple

RTL Design Engineer

Austin, TX · On-site

$134K/yr

If you're passionate about taking on unsolved challenges, we have a great opportunity for a results-oriented and highly motivated RTL Design Engineer. This is an exciting position in the world class ...

Positron AI

ASIC Design Engineer

Austin, TX · On-site

$225K - $350K/yr

Role Overview As a Senior ASIC Design Engineer, you will take a leadership role in defining ... You will own the microarchitecture from high-level concept through RTL signoff, collaborating ...

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Showing results 1-20

All JobsLocum Asic Rtl Design Engineer JobsLocum Asic Rtl Design Engineer Jobs in Round Rock, TX

Locum Asic Rtl Design Engineer information

See Round Rock, TX salary details

$87.7K

$140.1K

$188.4K

How much do locum asic rtl design engineer jobs pay per year?

As of Sep 3, 2026, the average yearly pay for locum asic rtl design engineer in Round Rock, TX is $140,063.00, according to ZipRecruiter salary data. Most workers in this role earn between $122,600.00 and $167,900.00 per year, depending on experience, location, and employer.

What is the difference between Locum Asic Rtl Design Engineer vs Contract Asic Rtl Design Engineer?

AspectLocum Asic Rtl Design EngineerContract Asic Rtl Design Engineer
CredentialsTypically requires relevant engineering degrees and RTL design experienceSimilar credentials, often with specific RTL design certifications
Work EnvironmentTemporary, short-term assignments often in multiple locationsProject-based roles, usually in a fixed location or remote
Employer UsageUsed by agencies or companies needing immediate, short-term expertiseEngaged by companies or staffing agencies for project-specific work

Both roles involve RTL design skills for ASIC development, but a Locum Asic Rtl Design Engineer typically fills short-term, temporary positions, often through staffing agencies, while a Contract Asic Rtl Design Engineer is engaged for specific projects with defined durations. The main difference lies in the nature and duration of employment, but both require similar technical credentials and work environments.

What are the most commonly searched types of Asic Rtl Design Engineer jobs in Round Rock, TX?

The most popular types of Asic Rtl Design Engineer jobs in Round Rock, TX are:

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Locum Asic Rtl Design Engineer jobs near you

Senior RTL Design Engineer

SambaNova

Austin, TX • On-site

Full-time

Posted 14 days ago

Job description

About the team About the role

The RTL design team builds the compute datapath, on-chip network, and memory subsystems inside SambaNova's RDU AI accelerator. Their work spans microarchitecture through tape-out: RTL implementation, PPA trade-offs, quality gates like lint, CDC, and LEC, and timing closure with 

About the role

SambaNova RTL Design Engineers design component units of the Reconfigurable Dataflow Unit (RDU) ASICs behind our AI acceleration systems. You'll own blocks within a larger subsystem, contributing sections of the microarchitecture specification, writing and debugging the RTL, and carrying your blocks through implementation, tape-out, and silicon bring-up. You'll work alongside principal engineers, architects, design verification, and physical design, and take on larger blocks as you build depth in our architecture

Required Qualifications
  • B.S. in Electrical Engineering, Computer Engineering, or Computer Science
  • 5+ years of experience in ASIC RTL design
  • Solid foundation in computer architecture and digital logic design
  • Strong SystemVerilog RTL design skills for high-speed, high-performance ASICs
  • Experience making design decisions that trade off power, performance, and area
  • Knowledge of industry-standard interconnects and protocols including AXI, PCIe, Ethernet, and HBM or DDR
  • Experience with digital logic synthesis tools and static timing analysis
  • Proficiency with industry-standard tools for linting, clock domain crossing, and logical equivalence checking
  • Experience implementing SystemVerilog Assertions to check design intent
  • Familiarity with tools and simulators for hardware performance analysis and tuning
  • Familiarity with Git for managing release cycles
  • Scripting skills in Python and Linux shell
Preferred Qualifications
  • M.S. or Ph.D. in Electrical Engineering, Computer Engineering, or Computer Science
  • Exposure to a full ASIC development cycle through tape-out and production silicon
  • Interest in or knowledge of AI workload acceleration techniques
  • Experience with low-power design techniques such as clock gating and DVFS at advanced process nodes
  • Exposure to emulation or FPGA prototyping platforms for pre-silicon validation

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