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Telecommute Asic Rtl Design Engineer Jobs in Leander, TX

Qualcomm

GPU Design Engineer

Austin, TX · On-site

Provide hands-on technical leadership across RTL design and design verification, including ... Extensive experience delivering complex GPU, CPU, and/or ASIC designs from micro-architecture ...

Meta

ASIC Engineer, Architecture

Austin, TX

$146K/yr

As an ASIC Engineer specializing in architecture, performance and modeling, you will define and ... Collaborate with architecture, RTL design, and physical design teams to translate performance ...

Meta

ASIC Engineer, Architecture

Austin, TX

$114K/yr

As an ASIC Engineer specializing in architecture, performance and modeling, you will define and ... Collaborate with architecture, RTL design, and physical design teams to translate performance ...

Intel

Senior CPU RTL Design Engineer

Austin, TX · On-site

As a CPU RTL Logic Design Engineer your responsibilities will include but are not limited to: Collaborates, drives and develops logic design, register transfer level (RTL) coding, and simulation for ...

Infotech Sourcing

Design Engineer III

Austin, TX · On-site

Job Title: Core Engineering - Design Engineer III Duration: 12 months with possible extension ... Minimum Qualifications Demonstrated experience with RTL-to-GDSII design flow usage and development ...

Meta

ASIC Engineer, Architecture

Austin, TX

$178K/yr

As an ASIC Engineer specializing in performance and modeling, you will define and drive the ... Collaborate with architecture, RTL design, and physical design teams to translate performance ...

Cornelis Networks

PCIe ASIC Design Engineer

Austin, TX · On-site

Debug functional and performance issues at RTL, gate-level, and silicon. * Ensure compliance with ... Engineering, or related field. * 10+ years of industry experience in ASIC/SoC design with a focus ...

Infotech Sourcing

Design Engineer III

Austin, TX

Job Title: Core Engineering - Design Engineer III Duration: 12 months with possible extension ... Minimum Qualifications Demonstrated experience with RTL-to-GDSII design flow usage and development ...

Cisco

Senior ASIC Physical Design Engineer

Austin, TX · On-site

$165K - $241K/yr

Your Impact As a Physical Design Engineer, you will play a key role in the full RTL-to-GDSII ... Own and drive RTL-to-GDSII implementation for advanced nodes (sub-16nm to 3nm). * Define and ...

Apple

FE RTL Infrastructure - CAD Engineer

Austin, TX · On-site

$164K/yr

Description As a Front-End (FE) RTL Infrastructure - CAD Engineer, you will play a major role in developing and supporting a reliable infrastructure and work environments that design and verification ...

H R PUNDITS INC

Design Engineer III

Austin, TX · On-site

$120K/yr

Design Engineer III ONSITE- US: TX- Austin OR Sunnyvale office (2nd option) Salary 140 to 145K ... Minimum Qualifications Demonstrated experience with RTL-to-GDSII design flow usage and development ...

Conductor

ASIC Design Engineer

Austin, TX · On-site

$130 - $210/hr

We're looking for ASIC design engineers to contribute to and own blocks in the development of the A-0 and A-1 wafer products, across both the XPU, memory chiplet and other dies on the wafer. Ideal ...

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All JobsTelecommute Asic Rtl Design Engineer JobsTelecommute Asic Rtl Design Engineer Jobs in Leander, TX

Telecommute Asic Rtl Design Engineer information

See Leander, TX salary details

$89.8K

$143.5K

$193K

How much do telecommute asic rtl design engineer jobs pay per year?

As of Aug 10, 2026, the average yearly pay for telecommute asic rtl design engineer in Leander, TX is $143,513.00, according to ZipRecruiter salary data. Most workers in this role earn between $125,600.00 and $172,000.00 per year, depending on experience, location, and employer.

What are some common challenges faced by telecommute ASIC RTL design engineers, and how can they be addressed?

Telecommute ASIC RTL Design Engineers often face challenges like coordinating effectively with remote teams, ensuring version control integrity, and maintaining clear communication on project specifications. These challenges can be mitigated by utilizing robust collaboration tools, adhering to standardized documentation practices, and scheduling regular virtual meetings for design reviews. Additionally, staying proactive in seeking feedback and clarifying requirements helps ensure alignment and prevents costly design iterations.

What are the key skills and qualifications needed to thrive as a telecommute ASIC RTL design engineer?

To thrive as a Telecommute ASIC RTL Design Engineer, you need a strong background in digital logic design, proficiency in hardware description languages like Verilog or VHDL, and typically a degree in electrical or computer engineering. Familiarity with EDA tools such as Synopsys or Cadence, as well as experience with simulation, synthesis, and debugging environments, is essential. Strong problem-solving abilities, attention to detail, and effective communication skills are crucial for collaborating remotely and ensuring design accuracy. These skills are vital to deliver complex, high-performance ASICs on schedule while working efficiently in a remote setting.

What is a telecommute ASIC RTL design engineer?

A Telecommute ASIC RTL Design Engineer is a professional who specializes in designing digital circuits at the Register Transfer Level (RTL) for Application-Specific Integrated Circuits (ASICs), while working remotely. They use hardware description languages like Verilog or VHDL to create and verify circuit designs tailored to specific applications. Their responsibilities often include developing, simulating, and optimizing digital logic, collaborating with cross-functional teams, and ensuring that the final silicon meets design specifications. Since the role is telecommute, all work is performed from a remote location using digital communication and collaboration tools.

What is the difference between Telecommute Asic Rtl Design Engineer vs Telecommute Digital IC Design Engineer?

AspectTelecommute Asic Rtl Design EngineerTelecommute Digital IC Design Engineer
CredentialsBachelor's or Master's in Electrical Engineering or Computer Engineering; experience with RTL codingBachelor's or Master's in Electrical Engineering or Computer Engineering; experience with digital circuit design
Work EnvironmentRemote, primarily designing RTL code for ASICsRemote, focusing on digital IC architecture and design
Industry UsageCommon in semiconductor and electronics companies

Both roles often require similar educational backgrounds and work remotely in the semiconductor industry. The main difference lies in their focus: RTL Design Engineers concentrate on writing RTL code for ASICs, while Digital IC Design Engineers work on broader digital circuit architecture. Candidates should choose based on their specific skills and career interests in digital design or RTL coding.

What are the most commonly searched types of Asic Rtl Design Engineer jobs in Leander, TX? The most popular types of Asic Rtl Design Engineer jobs in Leander, TX are:
What cities near Leander, TX are hiring for Telecommute Asic Rtl Design Engineer jobs? Cities near Leander, TX with the most Telecommute Asic Rtl Design Engineer job openings:
Telecommute Asic Rtl Design Engineer jobs near you

Design Engineering Architect

Cadence Design Systems, Inc.

Austin, TX • On-site

Full-time

Re-posted 15 days ago

Cadence Design Systems rating

9.0

Company rating: 9.0 out of 10

Based on 5 frontline employees who took The Breakroom Quiz

33rd of 242 rated software companies

Job description

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
Cadence Solutions (North America) team is looking for an experienced candidate to lead Front End Design projects. This is a challenging and rewarding opportunity is for a highly motivated engineer with a passion for innovation and a proven track record of success in the semiconductor industry.
This is a leadership role where you will be responsible for:
Technical Leadership:
Guide and mentor a team of RTL design engineers, fostering a collaborative and innovative environment.
Design & Microarchitecture:
Define and develop microarchitectural features for IPs and subsystems, ensuring they meet PPA goals.
RTL Development:
Write, debug, and optimize RTL code in Verilog, SystemVerilog, or VHDL to create complex digital logic.
Verification & Signoff:
Oversee pre-silicon verification activities, including Lint, Clock Domain Crossing (CDC), Formal Verification (FV), and other quality checks.
Collaboration:
Work closely with cross-functional teams, including Design Verification (DV), Physical Design (PD), Architecture, and firmware engineers, to ensure successful delivery.
Qualifications:
*10+ years of Front End design and/or verification with a BS/MS Engineering or Computer Sciences
*Proven experience in leading and managing complex engineering projects
*Rich experience in IP creation and/or SoC and IP (CPU, Memory, Interface) integration
*Expert in RTL design (Verilog), simulators debuggers
*Hands on Experience in Synthesis, SDC creation and support PD and STA teams.
*Experience in driving results in multi-disciplinary organization
Desirable:
A Self-motivated person with good communication and design management skills
Experience with Cadence front end toolset
We're doing work that matters. Help us solve what others can't.
We're doing work that matters. Help us solve what others can't.

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