Join the NVIDIA System-On-Chip (SOC) group as an ASIC Design Engineer and make a broad impact. You ... Learn and run RTL checks to ensure design quality (e.g., cross clock domains (CDC), clocks, reset ...
Join the NVIDIA System-On-Chip (SOC) group as an ASIC Design Engineer and make a broad impact. You ... Learn and run RTL checks to ensure design quality (e.g., cross clock domains (CDC), clocks, reset ...
You are an experienced RTL design engineer with a passion for complex processor systems and interconnect architecture. You bring deep technical expertise, a structured problem-solving approach, and ...
You are an experienced RTL design engineer with a passion for complex processor systems and interconnect architecture. You bring deep technical expertise, a structured problem-solving approach, and ...
TITLE :- System IP/RTL Design Engineer LOCATION Austin, TX (Onsite) DURATION 6+ Months (May get extend) MODE OF INTERVIEW Onsite RATE $90 per hour on W2 Key responsibilities include: * Work on RTL ...
TITLE :- System IP/RTL Design Engineer LOCATION Austin, TX (Onsite) DURATION 6+ Months (May get extend) MODE OF INTERVIEW Onsite RATE $90 per hour on W2 Key responsibilities include: * Work on RTL ...
GPU Design Engineer
Austin, TX · On-site
Provide hands-on technical leadership across RTL design and design verification, including ... Extensive experience delivering complex GPU, CPU, and/or ASIC designs from micro-architecture ...
GPU Design Engineer
Austin, TX · On-site
Provide hands-on technical leadership across RTL design and design verification, including ... Extensive experience delivering complex GPU, CPU, and/or ASIC designs from micro-architecture ...
Design Engineering Architect
Austin, TX · On-site
Guide and mentor a team of RTL design engineers, fostering a collaborative and innovative environment. Design & Microarchitecture: Define and develop microarchitectural features for IPs and ...
Design Engineering Architect
Austin, TX · On-site
Guide and mentor a team of RTL design engineers, fostering a collaborative and innovative environment. Design & Microarchitecture: Define and develop microarchitectural features for IPs and ...
Guide and mentor a team of RTL design engineers, fostering a collaborative and innovative environment. Design & Microarchitecture: Define and develop microarchitectural features for IPs and ...
Guide and mentor a team of RTL design engineers, fostering a collaborative and innovative environment. Design & Microarchitecture: Define and develop microarchitectural features for IPs and ...
PCIe ASIC Design Engineer
Austin, TX · On-site +1
Debug functional and performance issues at RTL, gate-level, and silicon. * Ensure compliance with ... Engineering, or related field. * 10+ years of industry experience in ASIC/SoC design with a focus ...
PCIe ASIC Design Engineer
Austin, TX · On-site +1
Debug functional and performance issues at RTL, gate-level, and silicon. * Ensure compliance with ... Engineering, or related field. * 10+ years of industry experience in ASIC/SoC design with a focus ...
Design Engineer III
Austin, TX · On-site
Job Title: Core Engineering - Design Engineer III Duration: 12 months with possible extension ... Minimum Qualifications Demonstrated experience with RTL-to-GDSII design flow usage and development ...
Design Engineer III
Austin, TX · On-site
Job Title: Core Engineering - Design Engineer III Duration: 12 months with possible extension ... Minimum Qualifications Demonstrated experience with RTL-to-GDSII design flow usage and development ...
DMTS Digital Design Engineer / Chip Lead
Richardson, TX · On-site
$206K - $410K/yr
RTL Design: Author, review, and maintain synthesizable RTL (SystemVerilog) for all soft IP control ... ASIC/digital design experience with at least one prior tape-out in a chip lead, design lead, or ...
DMTS Digital Design Engineer / Chip Lead
Richardson, TX · On-site
$206K - $410K/yr
RTL Design: Author, review, and maintain synthesizable RTL (SystemVerilog) for all soft IP control ... ASIC/digital design experience with at least one prior tape-out in a chip lead, design lead, or ...
As a CPU RTL Logic Design Engineer your responsibilities will include but are not limited to: Collaborates, drives and develops logic design, register transfer level (RTL) coding, and simulation for ...
As a CPU RTL Logic Design Engineer your responsibilities will include but are not limited to: Collaborates, drives and develops logic design, register transfer level (RTL) coding, and simulation for ...
SR. ASIC DESIGN VERIFICATION ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our ... RTL design, chip bring-up, and post-silicon validation experience * Ability to work in a dynamic ...
SR. ASIC DESIGN VERIFICATION ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our ... RTL design, chip bring-up, and post-silicon validation experience * Ability to work in a dynamic ...
Senior CPU RTL Design Engineer - Power Management
Austin, TX · On-site
$164K - $269K/yr
As a Senior CPU RTL Design Engineer - Power Management , you will play a critical role in designing and delivering CPU microarchitectures with strong emphasis on power management and energy-efficient ...
Senior CPU RTL Design Engineer - Power Management
Austin, TX · On-site
$164K - $269K/yr
As a Senior CPU RTL Design Engineer - Power Management , you will play a critical role in designing and delivering CPU microarchitectures with strong emphasis on power management and energy-efficient ...
As an ASIC Engineer specializing in performance and modeling, you will define and drive the ... Collaborate with architecture, RTL design, and physical design teams to translate performance ...
As an ASIC Engineer specializing in performance and modeling, you will define and drive the ... Collaborate with architecture, RTL design, and physical design teams to translate performance ...
Design Engineer III
Austin, TX · On-site
Job Title: Core Engineering - Design Engineer III Duration: 12 months with possible extension ... Minimum Qualifications Demonstrated experience with RTL-to-GDSII design flow usage and development ...
Design Engineer III
Austin, TX · On-site
Job Title: Core Engineering - Design Engineer III Duration: 12 months with possible extension ... Minimum Qualifications Demonstrated experience with RTL-to-GDSII design flow usage and development ...
Senior ASIC Physical Design Engineer
Austin, TX · On-site
$165K - $241K/yr
Your Impact As a Physical Design Engineer, you will play a key role in the full RTL-to-GDSII ... Own and drive RTL-to-GDSII implementation for advanced nodes (sub-16nm to 3nm). * Define and ...
Senior ASIC Physical Design Engineer
Austin, TX · On-site
$165K - $241K/yr
Your Impact As a Physical Design Engineer, you will play a key role in the full RTL-to-GDSII ... Own and drive RTL-to-GDSII implementation for advanced nodes (sub-16nm to 3nm). * Define and ...
Senior CPU RTL Design Engineer - Power Management
$164K - $269K/yr
As a Senior CPU RTL Design Engineer - Power Management , you will play a critical role in designing and delivering CPU microarchitectures with strong emphasis on power management and energy-efficient ...
Senior CPU RTL Design Engineer - Power Management
$164K - $269K/yr
As a Senior CPU RTL Design Engineer - Power Management , you will play a critical role in designing and delivering CPU microarchitectures with strong emphasis on power management and energy-efficient ...
PCIe ASIC Design Engineer
Austin, TX · On-site
Debug functional and performance issues at RTL, gate-level, and silicon. * Ensure compliance with ... Engineering, or related field. * 10+ years of industry experience in ASIC/SoC design with a focus ...
PCIe ASIC Design Engineer
Austin, TX · On-site
Debug functional and performance issues at RTL, gate-level, and silicon. * Ensure compliance with ... Engineering, or related field. * 10+ years of industry experience in ASIC/SoC design with a focus ...
The clocks group is looking for a top-notch ASIC engineer to join the team. The Team is responsible ... Experience in RTL design (Verilog), verification and logic synthesis. * Strong coding skills in ...
The clocks group is looking for a top-notch ASIC engineer to join the team. The Team is responsible ... Experience in RTL design (Verilog), verification and logic synthesis. * Strong coding skills in ...
Senior CPU RTL Design Engineer
Austin, TX · On-site
As a CPU RTL Logic Design Engineer your responsibilities will include but are not limited to: • Collaborates, drives and develops logic design, register transfer level (RTL) coding, and simulation ...
Senior CPU RTL Design Engineer
Austin, TX · On-site
As a CPU RTL Logic Design Engineer your responsibilities will include but are not limited to: • Collaborates, drives and develops logic design, register transfer level (RTL) coding, and simulation ...
FE RTL Infrastructure - CAD Engineer
Austin, TX · On-site
$164K/yr
Description As a Front-End (FE) RTL Infrastructure - CAD Engineer, you will play a major role in developing and supporting a reliable infrastructure and work environments that design and verification ...
FE RTL Infrastructure - CAD Engineer
Austin, TX · On-site
$164K/yr
Description As a Front-End (FE) RTL Infrastructure - CAD Engineer, you will play a major role in developing and supporting a reliable infrastructure and work environments that design and verification ...
Telecommute Asic Rtl Design Engineer information
What are some common challenges faced by telecommute ASIC RTL Design Engineers, and how can they be addressed?
What are the key skills and qualifications needed to thrive as a Telecommute ASIC RTL Design Engineer, and why are they important?
What is a Telecommute ASIC RTL Design Engineer?
What is the difference between Telecommute Asic Rtl Design Engineer vs Telecommute Digital IC Design Engineer?
| Aspect | Telecommute Asic Rtl Design Engineer | Telecommute Digital IC Design Engineer |
|---|---|---|
| Credentials | Bachelor's or Master's in Electrical Engineering or Computer Engineering; experience with RTL coding | Bachelor's or Master's in Electrical Engineering or Computer Engineering; experience with digital circuit design |
| Work Environment | Remote, primarily designing RTL code for ASICs | Remote, focusing on digital IC architecture and design |
| Industry Usage | Common in semiconductor and electronics companies |
Both roles often require similar educational backgrounds and work remotely in the semiconductor industry. The main difference lies in their focus: RTL Design Engineers concentrate on writing RTL code for ASICs, while Digital IC Design Engineers work on broader digital circuit architecture. Candidates should choose based on their specific skills and career interests in digital design or RTL coding.
Full-time
Posted 21 days ago
Nvidia rating
9.3
Based on 5 frontline employees who took The Breakroom Quiz
15th of 209 rated software companies
Job description
NVIDIA has been redefining computer graphics, PC gaming, and accelerated computing for more than 25 years. It's a unique legacy of innovation that's motivated by great technology-and amazing people. Today, we're tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. Doing what's never been done before takes vision, innovation, and the world's best talent. As an NVIDIAN, you'll be immersed in a diverse, supportive environment where everyone is inspired to do their best work. Come join the team and see how you can make a lasting impact on the world.
Join the NVIDIA System-On-Chip (SOC) group as an ASIC Design Engineer and make a broad impact. You will focus on improving methodologies and delivering system-level IP to measure performance across multiple projects.
What you'll be doing:
Be an integral part of the team defining, developing, and delivering system-level methodologies and RTL to measure performance on the industry's leading GPUs and SOCs.
Learn and contribute to the development and automation of flows and methodologies to efficiently build, deliver, and support a system-level IP.
Support projects by applying the performance monitoring system under the guidance of senior engineers.
Learn and run RTL checks to ensure design quality (e.g., cross clock domains (CDC), clocks, reset, latency, and more).
Design and implement RTL features (microarchitecture and RTL) with mentorship from experienced engineers.
Work with architects, designers, and software engineers to accomplish your tasks.
What we need to see:
Bachelor's or Master's degree in Electrical or Computer Engineering (or equivalent experience).
Strong academic background in digital design and computer architecture.
Programming experience in Python or other scripting languages.
Knowledge of RTL design (Verilog) and digital design concepts.
Understanding of basic SOC architecture concepts.
Excellent problem-solving and analytical skills.
Proven teamwork and communication across multiple teams.
NVIDIA is widely considered to be the leader of AI computing, and one of the technology world's most desirable employers. We have some of the most forward-thinking and hardworking people in the world working for us. If you're creative and autonomous, we want to hear from you.
Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 116,000 USD - 189,750 USD for Level 2, and 136,000 USD - 218,500 USD for Level 3.You will also be eligible for equity and benefits.
This posting is for an existing vacancy.
NVIDIA uses AI tools in its recruiting processes.
NVIDIA is committed to fostering a diverse work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.About Nvidia
Sourced by ZipRecruiter
NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. It's a unique legacy of innovation that's fueled by great technology--and amazing people. Today, we're tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. Doing what's never been done before takes vision, innovation, and the world's best talent.
Industry
Computer and electronic product manufacturing
Company size
10,000+ Employees
Headquarters location
Santa Clara, CA, US
Year founded
1993