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Telecommute Asic Rtl Design Engineer Jobs in Ohio

FPGA Engineer

Cincinnati, OH ยท On-site

$124K - $160K/yr

Apply Now RTL, C/C++, Python, VHDL, Verilog, Tcl, cryptography, hardware, embedded software, System ... Key Responsibilities FPGA Design and Development: Design and develop IP cores and FPGA ...

$104 - $150/hr

... ASIC teams. Performance characterization will include MODEM SNR, OSNR tolerance, systematic ... Your experimental data will fuel our design, starting with off-the-shelf components, evolving to ...

FPGA Engineer

Cincinnati, OH ยท On-site

$124K - $160K/yr

Description Apply Now RTL, C/C++, Python, VHDL, Verilog, Tcl, cryptography, hardware, embedded ... Key Responsibilities FPGA Design and Development: Design and develop IP cores and FPGA ...

Execute electrical engineering design scope for single and multi-discipline projects while ensuring ... Flexible Telecommuting Policy * Paid Time for Charitable Efforts * Paid Parental Leave

Structural Engineer

Mason, OH ยท On-site

$80K - $115K/yr

They perform necessary calculations and ensure that the structural scope of our design packages ... Flexible Telecommuting Policy * Paid Time for Charitable Efforts * Paid Parental Leave

Electrical Engineer

Cincinnati, OH ยท On-site

$85 - $120/hr

... engineering, design and project management services for industrial manufacturing clients ... Flexible Telecommuting Policy * Paid Time for Charitable Efforts * Paid Parental Leave

ASIC/interface electronics * Firmware/software algorithms * Packaging and mechanical interface ... Design & development * Verification & validation * Production launch * Manage system-level risk ...

Structural Engineer

Cincinnati, OH ยท On-site

$85 - $115/hr

Flexible Telecommuting Policy * Paid Time for Charitable Efforts * Paid Parental Leave ... Ensures structural design is accurate and coordinated within the model and drawings * Coordinates ...

... engineering, design and project management services for industrial manufacturing clients ... Flexible Telecommuting Policy * Paid Time for Charitable Efforts * Paid Parental Leave

... engineering, design and project management services for industrial manufacturing clients ... Flexible Telecommuting Policy * Paid Time for Charitable Efforts * Paid Parental Leave

Showing results 21-40

Telecommute Asic Rtl Design Engineer information

What is a telecommute ASIC RTL design engineer?

A Telecommute ASIC RTL Design Engineer is a professional who specializes in designing digital circuits at the Register Transfer Level (RTL) for Application-Specific Integrated Circuits (ASICs), while working remotely. They use hardware description languages like Verilog or VHDL to create and verify circuit designs tailored to specific applications. Their responsibilities often include developing, simulating, and optimizing digital logic, collaborating with cross-functional teams, and ensuring that the final silicon meets design specifications. Since the role is telecommute, all work is performed from a remote location using digital communication and collaboration tools.

What are the key skills and qualifications needed to thrive as a telecommute ASIC RTL design engineer?

To thrive as a Telecommute ASIC RTL Design Engineer, you need a strong background in digital logic design, proficiency in hardware description languages like Verilog or VHDL, and typically a degree in electrical or computer engineering. Familiarity with EDA tools such as Synopsys or Cadence, as well as experience with simulation, synthesis, and debugging environments, is essential. Strong problem-solving abilities, attention to detail, and effective communication skills are crucial for collaborating remotely and ensuring design accuracy. These skills are vital to deliver complex, high-performance ASICs on schedule while working efficiently in a remote setting.

What are some common challenges faced by telecommute ASIC RTL design engineers, and how can they be addressed?

Telecommute ASIC RTL Design Engineers often face challenges like coordinating effectively with remote teams, ensuring version control integrity, and maintaining clear communication on project specifications. These challenges can be mitigated by utilizing robust collaboration tools, adhering to standardized documentation practices, and scheduling regular virtual meetings for design reviews. Additionally, staying proactive in seeking feedback and clarifying requirements helps ensure alignment and prevents costly design iterations.

What is the difference between Telecommute Asic Rtl Design Engineer vs Telecommute Digital IC Design Engineer?

AspectTelecommute Asic Rtl Design EngineerTelecommute Digital IC Design Engineer
CredentialsBachelor's or Master's in Electrical Engineering or Computer Engineering; experience with RTL codingBachelor's or Master's in Electrical Engineering or Computer Engineering; experience with digital circuit design
Work EnvironmentRemote, primarily designing RTL code for ASICsRemote, focusing on digital IC architecture and design
Industry UsageCommon in semiconductor and electronics companies

Both roles often require similar educational backgrounds and work remotely in the semiconductor industry. The main difference lies in their focus: RTL Design Engineers concentrate on writing RTL code for ASICs, while Digital IC Design Engineers work on broader digital circuit architecture. Candidates should choose based on their specific skills and career interests in digital design or RTL coding.

What are the most commonly searched types of Asic Rtl Design Engineer jobs in Ohio?

The most popular types of Asic Rtl Design Engineer jobs in Ohio are:

What cities in Ohio are hiring for Telecommute Asic Rtl Design Engineer jobs?

Cities in Ohio with the most Telecommute Asic Rtl Design Engineer job openings:

FPGA Engineer - 37319 Cincinnati, Ohio Direct Hire Opportunity

TalentPro Consulting

Cincinnati, OH โ€ข On-site

$126K - $163K/yr

Full-time

Posted 4 days ago


Job description

FPGA Engineer - 37319 Cincinnati, Ohio
Direct Hire Opportunity
Salary Plus Benefits
Onsite Only
US Citizenship required
Relocation Assistance Available

As a Hardware Engineer at our company, you will be responsible for architecture, design and development of next generation Electronic Safe and Arm Devices utilizing the latest state of the art technologies.
ASIC / FPGA designs will include various sensor interfaces, sequence verification, A/D and D/A interfaces, communication protocols, state machines, timer chains, etc. used in Electronic Safe and Arm Devices (Fuzes) for DOD weapon systems. Microsemi / Actel is our targeted FPGA and QuestaSim is our simulation tool. The primary responsibilities will focus on Verilog FPGA design, System Verilog UVM verification and C# based microcontroller development.
Essential Functions:
Analysis of the requirements, architecture definition, design and debug of FPGA and associated hardware and microcontroller products and associated firmware.
Developing Verilog HDL targeting Antifuse and enhanced Flash FPGA’s.
Performing effective analysis of functional issues or performance profiling with the hardware and firmware in test environments or target host systems.
Contribute to process improvements to ensure hardware-firmware quality and time-to-market.
Qualifications:
Bachelor’s Degree and minimum 6 years of prior relevant experience. Graduate Degree and a minimum of 4 years of prior related experience. In lieu of a degree, minimum of 10 years of prior related experience.
Knowledge using Verilog for Logic Design.
Programming experience in C for embedded systems, including development of algorithms, manipulation of data structures, and implementing highly optimized code.
Experience with lab tools: Logic Analyzers, oscilloscopes, JTAG/ICE debuggers and protocol analyzers.
Preferred Additional Skills:
Knowledge using System Verilog for verification with AVM, VMM, OVM, or UVM a plus.
Developing C# source code targeting enhanced Flash Microcontrollers.