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Substrate Packaging Engineer Jobs (NOW HIRING)

Broadcom Inc.

$141K - $226K/yr

Broadcom OSD is looking for an IC Substrate and Package/Interposer Layout Engineer. In the role, you will have primary responsibility for the layout, routing, and functionality of packages and ...

Broadcom

Substrate/Package Layout Engineer

San Jose, CA · On-site

$141K - $226K/yr

Broadcom OSD is looking for an IC Substrate and Package/Interposer Layout Engineer. In the role, you will have primary responsibility for the layout, routing, and functionality of packages and ...

black.ai

Substrate IC Package Design Engineer

Tempe, AZ · On-site

$130K - $160K/yr

Our manufacturing products build cutting edge advanced packaging for the semiconductor industry by ... Engineering, or a related field * 5+ years of experience in substrate IC package design for high ...

Conductor

Packaging Engineer- Flip Chip

Austin, TX · On-site

We're seeking experienced engineers to contribute to flip chip package development and assembly ... This spans bump metallurgy, substrate integration, reflow and underfill processes, reliability ...

Velaura

Principal Packaging Engineer

Austin, TX · On-site

$200K - $500K/yr

Role Overview We are looking for a Principal Packaging Engineer to own package architecture and ... Lead package design, bump planning, substrate definition, escape routing, andassembly interactions ...

Microsoft

Packaging Engineer

Redmond, WA · On-site

We are seeking a Packaging Engineer with a focus on mechanical simulation. This is a unique ... substrate bonding, and PCB interfaces. * Generate and maintain reusable simulation templates ...

Conductor

Packaging Engineer- Flip Chip

Boston, MA · On-site

We're seeking experienced engineers to contribute to flip chip package development and assembly ... This spans bump metallurgy, substrate integration, reflow and underfill processes, reliability ...

Velaura

Principal Packaging Engineer

Boston, MA

$200K - $300K/yr

Role Overview We are looking for a Principal Packaging Engineer to own package architecture and ... Lead package design, bump planning, substrate definition, escape routing, and assembly interactions ...

Velaura

Principal Packaging Engineer

Austin, TX

$200K - $300K/yr

Role Overview We are looking for a Principal Packaging Engineer to own package architecture and ... Lead package design, bump planning, substrate definition, escape routing, and assembly interactions ...

Velaura

Principal Packaging Engineer

Santa Clara, CA

$200K - $300K/yr

Role Overview We are looking for a Principal Packaging Engineer to own package architecture and ... Lead package design, bump planning, substrate definition, escape routing, and assembly interactions ...

Velaura

Principal Packaging Engineer

Austin, TX · On-site

$200K - $300K/yr

... integrity, substrate and assembly technologies, and cross-functional system optimization ... engineering mindset. Preferred Qualifications • Advanced packaging technologies including ...

Entrada Ventures

Package Engineer

Palo Alto, CA · On-site

$180K - $240K/yr

... OSAT on bumping, substrate options, and advanced packaging flows. * Partner with IC design ... S. in Electrical Engineering or related field. * Experience with multi‑die package design and ...

Delos Data Inc

Package Engineer

Palo Alto, CA · On-site

$180K - $240K/yr

... OSAT on bumping, substrate options, and advanced packaging flows. * Partner with IC design ... S. in Electrical Engineering or related field. * Experience with multi‑die package design and ...

Cspeed

FEA Packaging Engineer

Palo Alto, CA

... packages across both thermal and structural domains. It is scoped for a strong FEA engineer ... Engage substrate suppliers, OSATs, and cooling and material vendors on process assumptions and ...

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Substrate Packaging Engineer information

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How much do substrate packaging engineer jobs pay per hour?

As of Sep 13, 2026, the average hourly pay for substrate packaging engineer in the United States is $42.37, according to ZipRecruiter salary data. Most workers in this role earn between $32.69 and $49.28 per hour, depending on experience, location, and employer.

What is a substrate packaging engineer?

A Substrate Packaging Engineer is a specialist who designs, develops, and tests the substrates used in semiconductor packaging. These substrates act as the physical base that connects the silicon chip to the external circuit, playing a crucial role in electrical performance, thermal management, and overall reliability of electronic devices. Substrate Packaging Engineers work closely with materials, design, and manufacturing teams to ensure that the substrate meets technical requirements and production standards. Their expertise is vital for advancing chip technology in fields like consumer electronics, automotive, and telecommunications.

What are the key skills and qualifications needed to thrive as a substrate packaging engineer?

To thrive as a Substrate Packaging Engineer, you need a solid background in materials science, electrical engineering, and semiconductor packaging, often supported by a relevant engineering degree. Familiarity with design tools like Cadence or Mentor Graphics, simulation software, and knowledge of industry standards such as IPC are commonly required. Strong problem-solving, attention to detail, and effective communication skills help you collaborate with cross-functional teams and address complex technical challenges. These skills and qualities are crucial for ensuring optimal performance, reliability, and manufacturability of advanced electronic devices.

What are some common challenges faced by substrate packaging engineers during the product development cycle?

Substrate Packaging Engineers often encounter challenges such as balancing electrical performance with thermal management and mechanical reliability. They must collaborate closely with cross-functional teams, including design, manufacturing, and quality assurance, to address issues like material selection, signal integrity, and miniaturization. Tight project timelines and evolving customer requirements can also add complexity, requiring strong problem-solving skills and adaptability. Staying updated on the latest materials and processes is essential for success in this dynamic role.

What are popular job titles related to Substrate Packaging Engineer jobs?

For Substrate Packaging Engineer jobs, the most frequently searched job titles are:

Infographic showing various Substrate Packaging Engineer job openings in the United States as of August 2026, with employment types broken down into 94% Full Time, 2% Part Time, and 4% Contract. Highlights an 85% Physical, 5% Hybrid, and 10% Remote job distribution, with an average salary of $88,120 per year, or $42.4 per hour.

Substrate/Package Layout Engineer

On-site

Broadcom Inc.
Semiconductor and Electronic Component Manufacturing • 10K+ employees
Learn more about Broadcom Inc.external

$141K - $226K/yr

Other

Medical, Dental, Vision, Retirement, PTO

This job post has expired 3 days ago. Applications are no longer accepted.

Broadcom rating

8.7

Company rating: 8.7 out of 10

Based on 23 frontline employees who took The Breakroom Quiz

Job description

Job Description

Broadcom OSD is looking for an IC Substrate and Package/Interposer Layout Engineer. In the role, you will have primary responsibility for the layout, routing, and functionality of packages and substrates, including design of high‑speed lines. Expertise with design tools, such as Calibre/Klayout and Cadence tools (e.g. Allegro Package Design, Innovus, and Virtuoso) is required.

You will work closely with core members of the design team, mechanical engineers, electrical engineers, power/signal integrity engineers, and project managers. Peer reviews of substrate/package designs is also an important element of the role. You will work with substrate/package vendors to define layout/panel/stack‑up design and other specifications. In addition to the front‑end layout work, you will also help evaluate the parts when they come back from the fab, including visual inspection, electrical functionality, and characterization of the high‑speed electrical lines.

Responsibilities
  • Design and layout advanced substrates and IC packages
  • Develop and utilize script‑based layout tools
  • Collaborate with design and verification teams to ensure layout meets specifications and performance requirements
  • Perform design rule checking (DRC) and layout vs schematic (LVS) check
  • Contribute to the development and improvement of layout methodologies and flows
Qualifications
  • Bachelors degree in Material Science/ Electrical/ Computer/Mechanical Engineering or related science/engineering degree with at least 12 years experience
  • Or Masters degree and 10+ years of related experience or PhD and 7+ years of related experience
  • Deep knowledge and expertise with using Cadence layout tools and Electronic Design Automation (EDA) tools
  • Broad understanding of multilayer high‑speed RF‑design, package/substrate manufacturing processes and materials, and surface mount technology
  • Simulations of designs and improvement suggestions
Compensation and Benefits

The annual base salary range for this position is $141,300 - $226,000. As a valued member of our team, you'll be eligible for a discretionary annual bonus and the opportunity to receive not only a competitive new hire equity grant, but also annual equity awards, connecting your success directly to the company's growth. All subject to relevant plan documents and award agreements.

Broadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans, 401(k) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time. The company follows all applicable laws for Paid Family Leave and other leaves of absence.

Equal Opportunity Employment

Broadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law.

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