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Substrate Design Engineer Ic Packaging Jobs (NOW HIRING)

black.ai

Substrate IC Package Design Engineer

Tempe, AZ · On-site

$130K - $160K/yr

Our manufacturing products build cutting edge advanced packaging for the semiconductor industry by ... Engineering, or a related field * 5+ years of experience in substrate IC package design for high ...

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Substrate Design Engineer Ic Packaging information

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$90K

$136.5K

How much do substrate design engineer ic packaging jobs pay per year?

As of Sep 9, 2026, the average yearly pay for substrate design engineer ic packaging in the United States is $135,040.00, according to ZipRecruiter salary data. Most workers in this role earn between $136,000.00 and $136,000.00 per year, depending on experience, location, and employer.

What is a substrate design engineer in IC packaging?

A Substrate Design Engineer in IC Packaging is a specialized engineer who focuses on designing the substrates that connect and support integrated circuits (ICs) within electronic packages. These substrates serve as the bridge between the silicon chip and the printed circuit board (PCB), providing electrical connections, mechanical support, and thermal management. The engineer works closely with cross-functional teams to optimize layout, materials, and manufacturing processes, ensuring high performance and reliability of electronic products. Their role is critical in enabling advanced semiconductor devices, such as processors and memory chips, to function efficiently in various applications.

What skills and qualifications are needed to thrive as a substrate design engineer in IC packaging?

To excel as a Substrate Design Engineer in IC Packaging, a solid background in electrical engineering, circuit design, and materials science—often with a relevant bachelor's or master's degree—is essential. Familiarity with EDA tools (such as Cadence Allegro or Mentor Graphics), PCB/IC packaging standards, and simulation software is typically required, alongside knowledge of industry certifications like IPC. Outstanding problem-solving, collaboration, and communication skills help engineers coordinate with cross-functional teams and address complex design challenges. These competencies ensure reliable, high-performance substrate solutions that meet manufacturing, cost, and quality requirements in advanced electronics.

How does a substrate design engineer in IC packaging typically collaborate with cross-functional teams during a project?

As a Substrate Design Engineer in IC Packaging, you'll work closely with electrical engineers, mechanical engineers, and manufacturing teams to ensure the substrate meets both electrical and physical requirements. Collaboration often involves regular design reviews, troubleshooting sessions, and iterative feedback to align on performance, cost, and manufacturability targets. Communication skills are vital, as you'll translate technical requirements between design and production, and may also interact with suppliers or customers to address specific needs or constraints. This cross-functional teamwork is essential for delivering reliable, high-performance IC packages on schedule.
Infographic showing various Substrate Design Engineer Ic Packaging job openings in the United States as of July 2026, with employment types broken down into 88% Full Time, 9% Part Time, and 3% Contract. Highlights an 85% Physical, 4% Hybrid, and 11% Remote job distribution, with an average salary of $135,040 per year, or $64.9 per hour.

IC Packaging Design Engineer

Hillsboro, OR • On-site

Comprehensive Resources Inc.
IT Services • 51 - 200 employees
Learn more about Comprehensive Resources Inc.external

$148K/yr

Other

This job post has expired today. Applications are no longer accepted.

Job description

Role : IC Packaging Design Engineer
LOC: Chandler, AZ or Hillsboro, OR (ONSITE)
Experience : !0+ years
Skills Required : -
Bachelor s or Master s degree in Electrical /Electronics Engineering
Experience Tier: Senior-level (primary); Mid-level (secondary)
Senior-Level: ~10+ years in IC packaging / package design
Mid-Level: 4-6+ years (MS) or 6+ years (BS) in IC packaging / package design
Strong hands-on experience in Siemens (Mentor) Xpedition (XPD); Alternatively: Cadence Allegro/Advanced Package Designer (APD / SiP)
Experience :-


Strong hands-on experience in Siemens (Mentor) Xpedition (XPD); Alternatively: Cadence Allegro/Advanced Package Designer (APD / SiP)
Candidates should have experience in the below domains:
Physical Design & Layout
Substrate design and layout
SI/PI aware design implementation
Design for performance, manufacturability, yield, and reliability
Design rule compliance

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