Deep understanding of flip-chip, 2.5D/3D packaging, wire bonding, and advanced substrate ... Design & Simulation Tools:Familiarity with IC package EDA software (e.g., Cadence Allegro Package ...
Deep understanding of flip-chip, 2.5D/3D packaging, wire bonding, and advanced substrate ... Design & Simulation Tools:Familiarity with IC package EDA software (e.g., Cadence Allegro Package ...
Package Layout Engineer
Mountain View, CA · On-site
$157K - $176K/yr
About This Role Lightmatter is looking for a Package Layout Design Engineer to drive the next ... Educational background in IC packaging and substrate layout design. * Familiarity with ...
Package Layout Engineer
Mountain View, CA · On-site
$157K - $176K/yr
About This Role Lightmatter is looking for a Package Layout Design Engineer to drive the next ... Educational background in IC packaging and substrate layout design. * Familiarity with ...
Package Engineer
Palo Alto, CA · On-site
$180K - $240K/yr
... OSAT on bumping, substrate options, and advanced packaging flows. * Partner with IC design ... S. in Electrical Engineering or related field. * Experience with multi‑die package design and ...
Package Engineer
Palo Alto, CA · On-site
$180K - $240K/yr
... OSAT on bumping, substrate options, and advanced packaging flows. * Partner with IC design ... S. in Electrical Engineering or related field. * Experience with multi‑die package design and ...
IC Package Design Engineer
Austin, TX · On-site
$134K/yr
Our Packaging team defines, designs, and integrates advanced electronic packaging solutions for ... Solid grasp of substrate manufacturing processes, design rules (DRC), design for manufacturability ...
IC Package Design Engineer
Austin, TX · On-site
$134K/yr
Our Packaging team defines, designs, and integrates advanced electronic packaging solutions for ... Solid grasp of substrate manufacturing processes, design rules (DRC), design for manufacturability ...
Package Design Engineer
Sunnyvale, CA · On-site
$159K/yr
Bachelor's degree in Mechanical Engineering, Material Engineering, Electrical Engineering ... substrate designs of advanced (2.5D/3.5D) packaging technologies for ML chips. This involves ...
Package Design Engineer
Sunnyvale, CA · On-site
$159K/yr
Bachelor's degree in Mechanical Engineering, Material Engineering, Electrical Engineering ... substrate designs of advanced (2.5D/3.5D) packaging technologies for ML chips. This involves ...
Package Layout Engineer
Mountain View, CA · On-site
$157K - $176K/yr
About This Role Lightmatter is looking for a Package Layout Design Engineer to drive the next ... Educational background in IC packaging and substrate layout design. * Familiarity with system-level ...
Package Layout Engineer
Mountain View, CA · On-site
$157K - $176K/yr
About This Role Lightmatter is looking for a Package Layout Design Engineer to drive the next ... Educational background in IC packaging and substrate layout design. * Familiarity with system-level ...
NY · On-site
$134K/yr
... Package Design Engineer to work in our Apopka, Florida or Raleigh, North Carolina facility ... interposer / substrate stack up * Work with IC design team to define IC package requirements
NY · On-site
$134K/yr
... Package Design Engineer to work in our Apopka, Florida or Raleigh, North Carolina facility ... interposer / substrate stack up * Work with IC design team to define IC package requirements
IC Packaging Design Engineer, Amazon Leo
San Diego, CA · On-site
$144K/yr
The Role As an IC Packaging Design Engineer, you will engage with an experienced cross-disciplinary staff to conceive and design innovative product solutions. You will work closely with an internal ...
New
IC Packaging Design Engineer, Amazon Leo
San Diego, CA · On-site
$144K/yr
The Role As an IC Packaging Design Engineer, you will engage with an experienced cross-disciplinary staff to conceive and design innovative product solutions. You will work closely with an internal ...
New
In this high-impact role, you'll own the end-to-end delivery of advanced IC packaging solutions ... Define and review substrate stack-ups, pad stacks, routing strategies, and design constraints to ...
In this high-impact role, you'll own the end-to-end delivery of advanced IC packaging solutions ... Define and review substrate stack-ups, pad stacks, routing strategies, and design constraints to ...
Advanced Package Design Engineer
San Jose, CA · On-site
$159K/yr
Familiar with 2.5D/3D packaging technologies, substrate design rules, and large body substrate ... Currently pursuing a PhD's degree in Electrical Engineering or a related field * 5+ years of ...
Advanced Package Design Engineer
San Jose, CA · On-site
$159K/yr
Familiar with 2.5D/3D packaging technologies, substrate design rules, and large body substrate ... Currently pursuing a PhD's degree in Electrical Engineering or a related field * 5+ years of ...
Senior Engineer Package Designer
Bodega Bay, CA · On-site
$190K - $220K/yr
Perform package substrate design and analysis (SI/PI/routing) * Collaborate with layout engineers, marketing, and global design teams * Use tools like HFSS, ADS for package modeling/simulation
Quick apply
Senior Engineer Package Designer
Bodega Bay, CA · On-site
$190K - $220K/yr
Perform package substrate design and analysis (SI/PI/routing) * Collaborate with layout engineers, marketing, and global design teams * Use tools like HFSS, ADS for package modeling/simulation
Perform package substrate design and analysis (SI/PI/routing) * Collaborate with layout engineers, marketing, and global design teams * Use tools like HFSS, ADS for package modeling/simulation
Perform package substrate design and analysis (SI/PI/routing) * Collaborate with layout engineers, marketing, and global design teams * Use tools like HFSS, ADS for package modeling/simulation
Package Engineer
Palo Alto, CA · On-site
$180K - $240K/yr
... OSAT on bumping, substrate options, and advanced packaging flows. * Partner with IC design ... S. in Electrical Engineering or related field. * Experience with multi‑die package design and ...
Package Engineer
Palo Alto, CA · On-site
$180K - $240K/yr
... OSAT on bumping, substrate options, and advanced packaging flows. * Partner with IC design ... S. in Electrical Engineering or related field. * Experience with multi‑die package design and ...
Principal SI/PI Design Engineer
New Providence, NJ · On-site
$148K - $237K/yr
As an SI/PI Design Engineer, you will be an integral part of the Ciena engineering team and lead ... Familiar with package substrate technologies including 2.5-D IC and 3-D IC interposers * Problem ...
Principal SI/PI Design Engineer
New Providence, NJ · On-site
$148K - $237K/yr
As an SI/PI Design Engineer, you will be an integral part of the Ciena engineering team and lead ... Familiar with package substrate technologies including 2.5-D IC and 3-D IC interposers * Problem ...
Principal SI/PI Design Engineer
New Providence, NJ · On-site
$148K - $237K/yr
As an SI/PI Design Engineer, you will be an integral part of the Ciena engineering team and lead ... Familiar with package substrate technologies including 2.5-D IC and 3-D IC interposers * Problem ...
Principal SI/PI Design Engineer
New Providence, NJ · On-site
$148K - $237K/yr
As an SI/PI Design Engineer, you will be an integral part of the Ciena engineering team and lead ... Familiar with package substrate technologies including 2.5-D IC and 3-D IC interposers * Problem ...
In this role, you will work at the intersection of IC design, advanced package development, and ... Strong background in power module packaging, FCBGA, SiP, WLCSP, advanced substrate-based packages ...
In this role, you will work at the intersection of IC design, advanced package development, and ... Strong background in power module packaging, FCBGA, SiP, WLCSP, advanced substrate-based packages ...
Principal SI/PI Design Engineer
New Providence, NJ · On-site
$148K - $237K/yr
As an SI/PI Design Engineer, you will be an integral part of the Ciena engineering team and lead ... Familiar with package substrate technologies including 2.5-D IC and 3-D IC interposers * Problem ...
Principal SI/PI Design Engineer
New Providence, NJ · On-site
$148K - $237K/yr
As an SI/PI Design Engineer, you will be an integral part of the Ciena engineering team and lead ... Familiar with package substrate technologies including 2.5-D IC and 3-D IC interposers * Problem ...
IC Package Design Engineer
$122K - $214K/yr
Our Packaging team defines, designs, and integrates advanced electronic packaging solutions for ... Solid grasp of substrate manufacturing processes, design rules (DRC), design for manufacturability ...
IC Package Design Engineer
$122K - $214K/yr
Our Packaging team defines, designs, and integrates advanced electronic packaging solutions for ... Solid grasp of substrate manufacturing processes, design rules (DRC), design for manufacturability ...
IC Package Design Engineer
$175K - $308K/yr
Our Packaging team defines, designs, and integrates advanced electronic packaging solutions for ... Solid grasp of substrate manufacturing processes, design rules (DRC), design for manufacturability ...
IC Package Design Engineer
$175K - $308K/yr
Our Packaging team defines, designs, and integrates advanced electronic packaging solutions for ... Solid grasp of substrate manufacturing processes, design rules (DRC), design for manufacturability ...
Staff Package Design Engineer
Tempe, AZ · On-site
In this role, you will work at the intersection of IC design, advanced package development, and ... Strong background in power module packaging, FCBGA, SiP, WLCSP, advanced substrate-based packages ...
Staff Package Design Engineer
Tempe, AZ · On-site
In this role, you will work at the intersection of IC design, advanced package development, and ... Strong background in power module packaging, FCBGA, SiP, WLCSP, advanced substrate-based packages ...
Substrate Design Engineer Ic Packaging information
See salary details
$90K - $94.2K
0% of jobs
$94.2K - $98.5K
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$98.5K - $102.7K
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$102.7K - $106.9K
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$106.9K - $111.1K
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$111.1K - $115.4K
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$115.4K - $119.6K
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$119.6K - $123.8K
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$123.8K - $128K
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$128K - $132.3K
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$133.3K is the 25th percentile. Wages below this are outliers.
$132.3K - $136.5K
100% of jobs
$90K
$136.5K
How much do substrate design engineer ic packaging jobs pay per year?
What is a substrate design engineer in IC packaging?
What skills and qualifications are needed to thrive as a substrate design engineer in IC packaging?
How does a substrate design engineer in IC packaging typically collaborate with cross-functional teams during a project?

Senior IC Packaging Development Engineer
Santa Clara, CA • On-site
Full-time
Re-posted 27 days ago
Nvidia rating
9.6
Based on 18 frontline employees who took The Breakroom Quiz
Job description
We are looking for an experienced Engineerwho will lead the development of rapid IC packaging of individual die, to enable Failure Analysis and NPI tasks ahead of high-volume manufacturing. This will include planning &drivingrelated R&D with multiple internal and external partners and you will be responsible for establishing advanced packaging processes needed to meet our NPI goals regarding packaging turn-around-time, reliability, and chip-package interaction. Prior knowledge of Package related Failure Analysis is beneficial.
What you will be doing:
Package Development & Prototyping:Drive the process, mechanical, thermal, and material evaluation ofthe latestIC packages. Manage rapid prototyping builds, package stack-ups, and assembly processes to bring new packaging architectures from concept to small volume for FA and NPI use cases.
Material Characterization:Pioneer new packaging & die-level processing methodologies and evaluateinnovativepackaging materials (e.g., molding compounds, substrates, adhesives).
Failure Analysis & Debug:Coordinate comprehensive physical and electrical failure analysis on prototype builds, reliability-tested components to determine root causes of failures.
Multi-functionalCollaboration:You'll be embedded into the IC Failure Analysis team and collaborate with IC & Package design teams, process & product engineering. Collaboratewith foundries and OSAT (Outsourced Semiconductor Assembly and Test) partners to develop & test the required processes, tooling, and workflows.
What we need to see:
B.S., M.S., or Ph.D., or equivalent experiencein Materials Science, Mechanical Engineering, Electrical Engineering, Physics, or a related semiconductor field.
Packaging Expertise:Deep understanding of flip-chip, 2.5D/3D packaging, wire bonding, and advanced substrate architectures.
Experience:12+ years of hands-on experience in IC packaging development and/or package design, NPI (New Product Introduction).
Design & Simulation Tools:Familiarity with IC package EDA software (e.g., Cadence Allegro Package Designer) and Finite Element Modeling (FEM) tools like ANSYS or ABAQUS is a strong plus.
FA Tooling Proficiency:At a minimum, you'll need basic understanding of advanced packaging related FA techniques and equipment, such as SEM, EDX, CSAM, X-Ray, and LIT.
With competitive salaries and a generous benefits package, we are widely considered to be one of the technology world's most desirable employers; we have some of the most forward-thinking and hardworking people in the world working for us and, due to unparalleled growth, best-in-class teams are rapidly growing. If you're creative and autonomous with a real passion for your work, we want to hear from you!
Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 168,000 USD - 270,250 USD for Level 5, and 216,000 USD - 345,000 USD for Level 6.You will also be eligible for equity and benefits.
This posting is for an existing vacancy.
NVIDIA uses AI tools in its recruiting processes.
NVIDIA is committed to fostering an inclusive work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.About Nvidia
Sourced by ZipRecruiter
NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. It's a unique legacy of innovation that's fueled by great technology--and amazing people. Today, we're tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. Doing what's never been done before takes vision, innovation, and the world's best talent.
Industry
Computer and electronic product manufacturing
Company size
10,000+ Employees
Headquarters location
Santa Clara, CA, US