Lincolnton, GA · On-site
$115K/yr
... physical standard-cell routing and logic structures. - Run synthesis, place-and-route, and area ... RTL design (Verilog/SystemVerilog/VHDL), and digital logic synthesis. - Strong scripting and ...
Quick apply
Lincolnton, GA · On-site
$115K/yr
... physical standard-cell routing and logic structures. - Run synthesis, place-and-route, and area ... RTL design (Verilog/SystemVerilog/VHDL), and digital logic synthesis. - Strong scripting and ...
Lincolnton, GA · On-site
$115K/yr
... physical standard-cell routing and logic structures. - Run synthesis, place-and-route, and area ... RTL design (Verilog/SystemVerilog/VHDL), and digital logic synthesis. - Strong scripting and ...
Quick apply
Lincolnton, GA · On-site
$115K/yr
... physical standard-cell routing and logic structures. - Run synthesis, place-and-route, and area ... RTL design (Verilog/SystemVerilog/VHDL), and digital logic synthesis. - Strong scripting and ...
Atlanta, GA · On-site
$130K/yr
... physical standard-cell routing and logic structures. - Run synthesis, place-and-route, and area ... RTL design (Verilog/SystemVerilog/VHDL), and digital logic synthesis. - Strong scripting and ...
Quick apply
Atlanta, GA · On-site
$130K/yr
... physical standard-cell routing and logic structures. - Run synthesis, place-and-route, and area ... RTL design (Verilog/SystemVerilog/VHDL), and digital logic synthesis. - Strong scripting and ...
Lincolnton, GA · On-site
$115K/yr
... physical standard-cell routing and logic structures. - Run synthesis, place-and-route, and area ... RTL design (Verilog/SystemVerilog/VHDL), and digital logic synthesis. - Strong scripting and ...
Quick apply
Lincolnton, GA · On-site
$115K/yr
... physical standard-cell routing and logic structures. - Run synthesis, place-and-route, and area ... RTL design (Verilog/SystemVerilog/VHDL), and digital logic synthesis. - Strong scripting and ...
Concord, NC · On-site
You will lead the design, validation, and optimization of next-generation lithium-ion cells ... Familiarity with safety standards, abuse testing, and failure analysis. * Ability to operate in ...
Concord, NC · On-site
You will lead the design, validation, and optimization of next-generation lithium-ion cells ... Familiarity with safety standards, abuse testing, and failure analysis. * Ability to operate in ...
Experience inDTCO methodologies, including SRAM and Standard Cell design * Experienceleading cross-functional teamsin defining derivative architectures encompassing design rules, transistors, and ...
Experience inDTCO methodologies, including SRAM and Standard Cell design * Experienceleading cross-functional teamsin defining derivative architectures encompassing design rules, transistors, and ...
Experience inDTCO methodologies, including SRAM and Standard Cell design * Experienceleading cross-functional teamsin defining derivative architectures encompassing design rules, transistors, and ...
Experience inDTCO methodologies, including SRAM and Standard Cell design * Experienceleading cross-functional teamsin defining derivative architectures encompassing design rules, transistors, and ...
Experience inDTCO methodologies, including SRAM and Standard Cell design * Experienceleading cross-functional teamsin defining derivative architectures encompassing design rules, transistors, and ...
Experience inDTCO methodologies, including SRAM and Standard Cell design * Experienceleading cross-functional teamsin defining derivative architectures encompassing design rules, transistors, and ...
Sunnyvale, CA · On-site
$159K - $164K/yr
Placement & Optimization - Perform standard cell placement, legalization, and optimization to improve area, power, and timing. * Clock Tree Synthesis (CTS) - Design and optimize low-skew, high ...
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Sunnyvale, CA · On-site
$159K - $164K/yr
Placement & Optimization - Perform standard cell placement, legalization, and optimization to improve area, power, and timing. * Clock Tree Synthesis (CTS) - Design and optimize low-skew, high ...
Austin, TX · On-site
$134K - $138K/yr
... and drive standard cell and memory hard-IP offerings and recommend usage/methodology to the ... Experience with industry standard physical design tools. Experience with one or more of the ...
Austin, TX · On-site
$134K - $138K/yr
... and drive standard cell and memory hard-IP offerings and recommend usage/methodology to the ... Experience with industry standard physical design tools. Experience with one or more of the ...
Houston, TX · On-site
$40 - $50/hr
... standards. Required Skills & Experience: Minimum 3 years of Small Cell or wireless construction experience Strong knowledge of Small Cell Node (SCN) design and deployment Experience with ROW small ...
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Houston, TX · On-site
$40 - $50/hr
... standards. Required Skills & Experience: Minimum 3 years of Small Cell or wireless construction experience Strong knowledge of Small Cell Node (SCN) design and deployment Experience with ROW small ...
$134K - $138K/yr
... and drive standard cell and memory hard-IP offerings and recommend usage/methodology to the ... Proficiency in logic design principles, physical design, power and timing concepts. Knowledge of ...
$134K - $138K/yr
... and drive standard cell and memory hard-IP offerings and recommend usage/methodology to the ... Proficiency in logic design principles, physical design, power and timing concepts. Knowledge of ...
Santa Clara, CA · On-site
$161.55 - $317.60/hr
Experience in DTCO methodologies, including SRAM and Standard Cell design. * Experience leading cross‑functional teams in defining derivative architectures encompassing design rules, transistors ...
Santa Clara, CA · On-site
$161.55 - $317.60/hr
Experience in DTCO methodologies, including SRAM and Standard Cell design. * Experience leading cross‑functional teams in defining derivative architectures encompassing design rules, transistors ...
$156K - $160K/yr
Planning and specification, writing Verilog models, and designing custom circuits and synthesized standard cell blocks. * Using industrial CAD tools and flows for digital, analog/RF, or mixed-signal ...
$156K - $160K/yr
Planning and specification, writing Verilog models, and designing custom circuits and synthesized standard cell blocks. * Using industrial CAD tools and flows for digital, analog/RF, or mixed-signal ...
Planning and specification, writing Verilog models, and designing custom circuits and synthesized standard cell blocks. * Using industrial CAD tools and flows for digital, analog/RF, or mixed-signal ...
Quick apply
Planning and specification, writing Verilog models, and designing custom circuits and synthesized standard cell blocks. * Using industrial CAD tools and flows for digital, analog/RF, or mixed-signal ...
Experience in DTCO methodologies, including SRAM and Standard Cell design * Experience leading cross-functional teams in defining derivative architectures encompassing design rules, transistors, and ...
Experience in DTCO methodologies, including SRAM and Standard Cell design * Experience leading cross-functional teams in defining derivative architectures encompassing design rules, transistors, and ...
Santa Clara, CA · On-site
$156K - $160K/yr
Planning and specification, writing Verilog models, and designing custom circuits and synthesized standard cell blocks. * Using industrial CAD tools and flows for digital, analog/RF, or mixed-signal ...
Santa Clara, CA · On-site
$156K - $160K/yr
Planning and specification, writing Verilog models, and designing custom circuits and synthesized standard cell blocks. * Using industrial CAD tools and flows for digital, analog/RF, or mixed-signal ...
Santa Clara, CA · On-site
$156K - $160K/yr
Planning and specification, writing Verilog models, and designing custom circuits and synthesized standard cell blocks. * Using industrial CAD tools and flows for digital, analog/RF, or mixed-signal ...
Santa Clara, CA · On-site
$156K - $160K/yr
Planning and specification, writing Verilog models, and designing custom circuits and synthesized standard cell blocks. * Using industrial CAD tools and flows for digital, analog/RF, or mixed-signal ...
Irvine, CA · On-site
The Central Engineering Team is responsible for standard cell development and custom design solutions that power cutting-edge AI compute cores and CPUs. We are seeking a motivated and technically ...
Irvine, CA · On-site
The Central Engineering Team is responsible for standard cell development and custom design solutions that power cutting-edge AI compute cores and CPUs. We are seeking a motivated and technically ...
The Central Engineering Team is responsible for standard cell development and custom design solutions that power cutting-edge AI compute cores and CPUs. We are seeking a motivated and technically ...
The Central Engineering Team is responsible for standard cell development and custom design solutions that power cutting-edge AI compute cores and CPUs. We are seeking a motivated and technically ...
$12.74 - $14.31
3% of jobs
$14.31 - $15.89
6% of jobs
$16.78 is the 25th percentile. Wages below this are outliers.
$15.89 - $17.46
27% of jobs
The median wage is $18.87 / hr.
$17.46 - $19.03
15% of jobs
$19.03 - $20.61
9% of jobs
$20.61 - $22.18
0% of jobs
$22.18 - $23.75
1% of jobs
$23.75 - $25.33
6% of jobs
$26.42 is the 75th percentile. Wages above this are outliers.
$25.33 - $26.90
9% of jobs
$26.90 - $28.47
9% of jobs
$28.47 - $30.05
13% of jobs
$12
$21
$30
To thrive in Standard Cell Design, you need a solid background in electrical or electronics engineering, semiconductor device physics, and CMOS circuit design, typically with a relevant degree. Familiarity with EDA tools like Cadence Virtuoso, Synopsys, and layout verification software, as well as knowledge of physical design rules and scripting languages (e.g., Python or TCL), is essential. Attention to detail, strong problem-solving abilities, and the ability to collaborate with multidisciplinary teams are valuable soft skills. These competencies enable you to create robust, efficient standard cells that meet performance, area, and power targets critical for advanced chip design.
A Standard Cell Design job involves creating and optimizing fundamental building blocks (standard cells) used in digital integrated circuits. Engineers in this role define the cell architecture, design layouts, and ensure timing, power, and area efficiency. They work closely with circuit and physical design teams to deliver high-quality libraries for ASIC and SoC development. Strong skills in CMOS design, EDA tools, and scripting are essential for success in this field.
Professionals in Standard Cell Design often encounter challenges related to meeting aggressive performance, power, and area (PPA) targets while adhering to strict design rules and technology constraints. Balancing design trade-offs, resolving design rule violations, and optimizing cells for manufacturability require both technical expertise and creative problem-solving skills. Collaboration with process engineers, verification teams, and EDA tool specialists is common to address issues that arise throughout the design flow. Successfully navigating these challenges improves both the quality and yield of integrated circuits, making this role both vital and intellectually rewarding in semiconductor development.
Cities with the most Standard Cell Design job openings:
The most popular types of Standard Cell Design jobs are:
The top searched job categories for Standard Cell Design jobs are:
$115K/yr
Part-time
Re-posted 19 days ago
