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Home Based Standard Cell Design Jobs (NOW HIRING)

Substrate

Standard Cell Design Lead

San Francisco, CA · On-site

$150K - $275K/yr

Standard Cell Design Lead Substrate is addressing one of the most important technological problems facing the United States. At the intersection of advanced manufacturing and cutting-edge physics, we ...

Intel

Principal Engineer - Standard Cell Design

Austin, TX · On-site

  • Medical

  • Retirement

  • PTO

Understanding of std cell circuit design tradeoffs across power, performance, area and Vmin * Experience with standard cell characterization tools and Spice circuit simulations * Experience in ...

Intel

Principal Engineer - Standard Cell Design

Folsom, CA · On-site

  • Medical

  • Retirement

  • PTO

Understanding of std cell circuit design tradeoffs across power, performance, area and Vmin * Experience with standard cell characterization tools and Spice circuit simulations * Experience in ...

Nvidia

Senior Circuit Design Engineer

Santa Clara, CA · On-site

$122K - $168K/yr

We are now hiring for a Senior Circuit Design Engineer for Standard Cell and/or ROM. NVIDIA has ... Your base salary will be determined based on your location, experience, and the pay of employees in ...

Oklo

Hot Cell Design Engineer

Santa Clara, CA · On-site +1

  • Medical

  • Retirement

Knowledge of NRC and/or DOE regulatory requirements and nuclear standards for nuclear facilities ... based on business or team needs, including attendance at team meetings, off-sites, and other ...

Oklo

Hot Cell Design Engineer

Santa Clara, CA · On-site +1

  • Medical

  • Retirement

Knowledge of NRC and/or DOE regulatory requirements and nuclear standards for nuclear facilities ... based on business or team needs, including attendance at team meetings, off-sites, and other ...

Sion Power Corporation

Senior Cell Design Engineer

Tucson, AZ · On-site

$89K - $123K/yr

Sion Power Corporation, based in Tucson, AZ, is the leading developer of high-energy rechargeable ... The responsibilities of this position cover cell design, analysis, material development, and ...

Sion Power Corporation

Senior Cell Design Engineer

Tucson, AZ · On-site

$89K - $123K/yr

Sion Power Corporation, based in Tucson, AZ, is the leading developer of high-energy rechargeable ... The responsibilities of this position cover cell design, analysis, material development, and ...

Nyobolt

Senior Li-Ion Cell Engineer

Bedford, MA · On-site

$109K - $150K/yr

  • Medical

  • Dental

  • Vision

  • Life

  • Retirement

  • PTO

Maintain accurate documentation for cell design, manufacturing processes, and quality standards ... and home appliances to electric vehicles and industrial robotics. Nyobolt has assembled a world ...

Nyobolt Limited

Senior Li-Ion Cell Engineer

Bedford, MA · On-site

$95K - $120K/yr

  • Medical

  • Dental

  • Vision

  • Life

  • Retirement

  • PTO

Maintain accurate documentation for cell design, manufacturing processes, and quality standards ... and home appliances to electric vehicles and industrial robotics. Nyobolt has assembled a world ...

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As of Aug 15, 2026, the average hourly pay for home based standard cell design in the United States is $21.64, according to ZipRecruiter salary data. Most workers in this role earn between $16.83 and $27.16 per hour, depending on experience, location, and employer.

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Home Based Standard Cell Design jobs near you
Infographic showing various Home Based Standard Cell Design job openings in the United States as of August 2026, with employment types broken down into 1% As Needed, 77% Full Time, 15% Part Time, and 7% Contract. Highlights an 87% Physical, 2% Hybrid, and 11% Remote job distribution, with an average salary of $45,021 per year, or $21.6 per hour.

Standard Cell Design Lead

Substrate

San Francisco, CA • On-site

$150K - $275K/yr

Full-time

Re-posted 19 days ago

Job description

Standard Cell Design Lead
Substrate is addressing one of the most important technological problems facing the United States. At the intersection of advanced manufacturing and cutting-edge physics, we are developing technologies that will reshape the semiconductor industry and strengthen America's technological leadership. We are a team of world-class scientists, engineers, and technical experts building technology for the United States.
Summary
As a Standard Cell Design Lead, you will develop and optimize standard cell libraries while leading cell characterization and library validation efforts. This role requires deep expertise in digital cell design, layout, and timing characterization combined with strong understanding of library requirements for digital design flows. You will work across multiple locations including external fabrication facilities. This is a full-time, onsite position.
Responsibilities
  • Lead standard cell library development including logic gates, flip-flops, and complex cells
  • Optimize cell layouts for power, performance and area across Vth's and drive strengths
  • Characterize cell library including timing, power, and noise analysis for library models
  • Develop Liberty (.lib) timing files and LEF physical abstractions for EDA tool integration
  • Collaborate with PDK and process teams to ensure cell performance meets targets
  • Implement DFM techniques and validate cells against DRC/LVS rules
  • Support all DFT fault models including cell aware, physical aware, stuck-at and transition
  • Optimize cell architectural requirements including multi-Vt and multi-channel options
  • Lead library validation and qualification across distributed design and fabrication teams

Required Qualifications
  • 10+ years experience in standard cell design, library development and characterization
  • Deep understanding of standard cell architecture, layout, and optimization strategies
  • Strong background in cell characterization and Liberty timing model generation
  • Experience with layout tools (Cadence Virtuoso, Synopsys Custom Compiler, or similar)
  • Proficiency with characterization tools and SPICE simulation for timing/power analysis
  • Proven ability to balance area, performance, and power trade-offs in cell design

Preferred Qualifications
  • Advanced degree in Electrical Engineering or related field
  • Experience with advanced node standard cells or FinFET/GAA library development
  • Background in low-power design techniques and multi-threshold voltage libraries
  • Familiarity with EDA flows and library integration requirements
  • Experience in research-driven or startup semiconductor environments

Salary Range
$150,000-$275,000 USD
Substrate is an equal opportunity employer. It provides equal employment opportunity to all applicants without regard to race, color, religion, national origin, disability, medical condition, marital status, sex, gender, age, military or veteran status, or any other characteristic protected by applicable federal, state, or local laws.
Substrate will provide reasonable accommodations to applicants with disabilities. If you need an accommodation during the hiring process, please let your recruiter know.
Applicants must be legally authorized to work in the United States. This position is not eligible for visa sponsorship.

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