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Home Based Standard Cell Design Jobs (NOW HIRING)

OMNIVISION

SoC Design Engineer

Santa Clara, CA · On-site

$156K - $160K/yr

Work with algorithm and application engineers for project-based microarchitecture improvements ... standard cell blocks. * Using industrial CAD tools and flows for digital, analog/RF, or mixed ...

Shine Early Learning

Home Based Visitor

New York, NY · On-site +1

$50K - $57K/yr

To design and deliver research and evidence-based approaches to eliminate the gaps between young ... The Home-Based Visitor will work collaboratively with a team of other Home-Based Visitors to ...

Apple

GPU Physical Design PPA Engineer

Austin, TX

$134K - $138K/yr

... and drive standard cell and memory hard-IP offerings and recommend usage/methodology to the ... Proficiency in logic design principles, physical design, power and timing concepts. Knowledge of ...

Apple

GPU Physical Design PPA Engineer

Austin, TX · On-site

$134K - $138K/yr

... and drive standard cell and memory hard-IP offerings and recommend usage/methodology to the ... Experience with industry standard physical design tools.Experience with one or more of the ...

Intel

Senior CPU Physical Design Engineer

Austin, TX

$134K - $138K/yr

Qualify and validate new PDK versions, standard cell libraries using backend design environment for RTL2GDS (Synthesis & APR) and custom verification flows. * Conduct verification and signoff ...

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How much do home based standard cell design jobs pay per hour?

As of Jun 6, 2026, the average hourly pay for home based standard cell design in the United States is $21.64, according to ZipRecruiter salary data. Most workers in this role earn between $16.83 and $27.16 per hour, depending on experience, location, and employer.
What cities are hiring for Home Based Standard Cell Design jobs? Cities with the most Home Based Standard Cell Design job openings:
What are the most commonly searched types of Standard Cell Design jobs? The most popular types of Standard Cell Design jobs are:
What states have the most Home Based Standard Cell Design jobs? States with the most job openings for Home Based Standard Cell Design jobs include:
Home Based Standard Cell Design jobs near you
Infographic showing various Home Based Standard Cell Design job openings in the United States as of May 2026, with employment types broken down into 4% As Needed, 17% Full Time, and 79% Part Time. Highlights an 94% Physical, 1% Hybrid, and 5% Remote job distribution, with an average salary of $45,021 per year, or $21.6 per hour.
SoC Design Engineer

SoC Design Engineer

OMNIVISION

Santa Clara, CA • On-site

$156K - $160K/yr

Full-time

Posted 29 days ago

Job description

Description
Job Title: SoC Design Engineer
Job Duties:
Be responsible for digital design of ASIC cores within image sensor SoC products, including IP design, analysis, integration, and validation. Collaborate with physical design teams on floor-planning, timing closure, and DFT implementation. Conduct timing control logic design and static timing analysis (STA) for sensor interfaces and mixed-signal integration. Perform chip bring-up, validation and debugging. Design, integrate and validate data pipeline according to PRD/design specification and system architecture of SoC products, following ASIC design flow: coding, simulation, synthesis, static timing analysis, formality verification, DFT, using Simvision, EDA tools such as Prime Time, cadence Virtuoso, Design Compiler, Integrator, and Verilog and System Verilog programming languages etc. Conduct design verification and modeling using SVA, Python, Perl, C++/C, and HLS. Work with digital and analog engineers for system design, integration and validation. Work with algorithm engineers for module level design, including hardware C model implementation, micro architecture design, RTL design and hardware/software co-simulation. Work with algorithm and application engineers for project-based microarchitecture improvements. Conduct silicon validation, debugging and tuning.
Requirements:
Master's degree or foreign equivalent degree in Electrical Engineering, Computer Engineering, or a related field.
Required skills and/or academic training in the following:
  • Arithmetic circuit design related to general datapath circuits, ML and AI circuits.
  • Arithmetic circuit design, timing analysis; synchronous and asynchronous FSMs; power, test, and debug.
  • Design and design debug with System Verilog; Logic design and analysis.
  • Processing Subsystem, including superscalar out-of-order cores, multicore and heterogeneous processors, and purpose-specific accelerators.
  • Design tools, such as microarchitecture simulators, RTL synthesis tools, and modeling for area, power, and thermal.
  • FPGA platforms to compute acceleration.
  • FPGAs technology, architecture and applications.
  • Register-Transfer Level (RTL) hardware design.
  • Planning and specification, writing Verilog models, and designing custom circuits and synthesized standard cell blocks.
  • Using industrial CAD tools and flows for digital, analog/RF, or mixed-signal chip design.
  • Full-chip integration and verification for tapeout.

Annual base salary for this role in California, US is expected to be between $156,853 - $160,000. Actual pay will be determined on a number of factors such as relevant skills and experience, and the pay of employees in the similar role.

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