ZipRecruiter

Log In

1

Silicon Foundry Interface Engineer Jobs (NOW HIRING)

Grid Dynamics Holdings

Senior UI Engineer

$133K - $165K/yr

We are seeking a strong Senior UI Developer with good technical expertise, to be responsible for ... Founded in 2006, Grid Dynamics is headquartered in Silicon Valley with offices across the Americas ...

OMNIVISION

Product Validation Engineer

Santa Clara, CA · On-site

$120K - $125K/yr

Interact with foundry fab in improving all silicon process, color, and package issues. * Improve product yield and performance by process optimization and layout design update. * Analyze yield and ...

Intel

Foundry Customer Device Engineer

Phoenix, AZ · On-site

Coordinate cross-functional device engineering teams to deliver silicon manufacturing solutions ... Join Intel's foundry transformation and make a direct impact on customer success. Apply today to ...

OMNIVISION

Sr. Product Engineer

Santa Clara, CA

... with silicon foundry, imager characterization and pixel design; interact with foundry fab in ... Master's degree or foreign equivalent degree in Materials Science & Engineering, Physics, or ...

Intel

Foundry Customer Device Engineer

Hillsboro, OR · On-site

Coordinate cross-functional device engineering teams to deliver silicon manufacturing solutions ... Join Intel's foundry transformation and make a direct impact on customer success. Apply today to ...

next page

Showing results 1-20

All JobsSilicon Foundry Interface Engineer Jobs

Silicon Foundry Interface Engineer information

See salary details

$60K

$80.4K

$111.5K

How much do silicon foundry interface engineer jobs pay per year?

As of Jun 8, 2026, the average yearly pay for silicon foundry interface engineer in the United States is $80,416.00, according to ZipRecruiter salary data. Most workers in this role earn between $70,500.00 and $85,000.00 per year, depending on experience, location, and employer.

What are the key skills and qualifications needed to thrive in the Silicon Foundry Interface Engineer position, and why are they important?

To thrive as a Silicon Foundry Interface Engineer, you typically need a strong background in semiconductor physics, process integration, and a relevant engineering degree such as electrical, materials, or chemical engineering. Familiarity with foundry process flows, EDA tools (like Cadence, Synopsys), and knowledge of standards such as JEDEC or SEMI, as well as experience in silicon fabrication and yield analysis, are highly valued. Excellent problem-solving abilities, cross-functional communication, and project management skills help in bridging foundry capabilities with design teams and customers. These skills and qualities are critical for ensuring smooth collaboration between internal teams and external foundry partners, helping to deliver high-quality silicon products on schedule.

What is a Silicon Foundry Interface Engineer job?

A Silicon Foundry Interface Engineer acts as the primary liaison between semiconductor design teams and external silicon foundries. They ensure that manufacturing processes align with design specifications, optimizing yield and performance. Responsibilities include managing design rule checks (DRC), process design kits (PDK), fabrication schedules, and addressing technical challenges during production. This role requires expertise in semiconductor process technology, fabrication flows, and working closely with foundry partners. Effective communication and problem-solving skills are crucial for maintaining smooth manufacturing operations.

What are some common challenges faced by Silicon Foundry Interface Engineers, and how can they be addressed?

Silicon Foundry Interface Engineers often encounter challenges related to aligning design requirements with foundry process limitations and maintaining effective communication between diverse technical teams. Navigating rapidly changing specifications and troubleshooting yield or manufacturing issues require strong analytical skills and adaptability. To overcome these hurdles, it’s essential to build strong relationships with both internal stakeholders and foundry representatives, stay current with process technology updates, and proactively address potential bottlenecks. This collaborative approach helps ensure project timelines are met and product quality is maintained. Additionally, a willingness to learn and continuously improve is invaluable for keeping pace in this fast-evolving field.

More about Silicon Foundry Interface Engineer jobs
What cities are hiring for Silicon Foundry Interface Engineer jobs? Cities with the most Silicon Foundry Interface Engineer job openings:
What are the most commonly searched types of Silicon Foundry Interface Engineer jobs? The most popular types of Silicon Foundry Interface Engineer jobs are:
What states have the most Silicon Foundry Interface Engineer jobs? States with the most job openings for Silicon Foundry Interface Engineer jobs include:
What job categories do people searching Silicon Foundry Interface Engineer jobs look for? The top searched job categories for Silicon Foundry Interface Engineer jobs are:
Silicon Foundry Interface Engineer jobs near you
Infographic showing various Silicon Foundry Interface Engineer job openings in the United States as of May 2026, with employment types broken down into 60% Full Time, and 40% Contract. Highlights an 80% In-person, and 20% Remote job distribution, with an average salary of $80,416 per year, or $38.7 per hour.
Senior Foundry Engineer, Silicon Technology

Senior Foundry Engineer, Silicon Technology

Astera Labs

San Jose, CA

$122K - $168K/yr

Other

Posted 3 days ago

Job description

Job Description
We are seeking a Senior Foundry Engineer, Silicon Technology to support foundry engagement, silicon-to-model correlation, tapeout readiness, and yield improvement for advanced semiconductor products. This person will work closely with internal design, CAD layout, product engineering, test, reliability, operations teams and external foundry partners to identify risks, assess product impact, and drive timely resolution of process, PDK, model, DRC/DFM, and silicon-related issues.
 
Responsibilities Include
  • Silicon, process and yield correlation
    • Analyze process inline data, silicon test data, process drift and process correlation data 
    • Fine tune processes to optimize power, performance and yield
    • Help identify process related contributors to parametric drift, yield loss, leakage, reliability risk
    • Work with foundry and internal teams to investigate yield issues and process excursions
    • Perform layout analysis where needed to understand process sensitivity, failures
  • Tapeout and DFM support
    • Support product tapeouts, tapeout readiness reviews from a PDK, DRC/DFM, device model and reliability perspective
    • Run or coordinate DFM checks on products and summarize findings for design and layout teams
    • Coordinate between foundry and physical design teams to disposition waivers taking performance, leakage, manufacturability and reliability in mind
    • Document known PDK, model, DRC, DFM or process risks before tapeout
    • Maintain an internal PDK qualification database across foundries and process nodes to reduce tapeout risk from unnoticed PDK or model changes
  • Foundry and PDK support
    • Support technical interactions with foundry partners on PDK, device models, process assumptions, design rules, DRC/DFM decks and reliability collateral
    • Track PDK versions, model updates, DRC/DFM runset changes, and foundry signoff recommendations
    • Compare PDK changes across versions and summarize potential design, layout, model or signoff impact
  • Device model and circuit model evaluation
    • Validate model behavior across voltage bias, temperature, process corners, and relevant operating conditions
    • Compare silicon measurements against SPICE/model predictions and help identify model gaps
Basic Qualifications:
  • B.S or M.S in Electrical Engineering, Material science, Semiconductor engineering or a related technical field
  • 5+ years of experience in semiconductor device engineering, foundry interface, silicon technology, process integration, yield/process correlation
Required Experience:
  • Working knowledge of semiconductor process flows, device physics, manufacturability, reliability and yield drivers
  • Experience supporting tapeouts, PDK validation, models, DRC/DFM, silicon bring up
  • Experience analyzing silicon, wafer-level, process monitors, product test, characterization, or reliability data
  • Prior experience at a foundry, IDM, fabless semiconductor company or a PDK/enablement organization
  • Familiarity with SPICE models, process corners, device behavior, layout effects and silicon-to-model correlation
  • Ability to communicate technical issues clearly across design, CAD, layout, test, products engineering and external foundries
  • Familiarity with using TSMC as a foundry
Preferred Experience:
  • Experience with advanced FinFET, gate-all-around/nanosheet technologies and BiCMOS technologies
  • Experience with SRAM, analog/mixed signal, RF, Serdes, low power design constraints
  • Experience benchmarking foundry nodes using spice models on representative circuits
  • Experience using foundry models to simulate junction breakdowns, SOA, ESD, aging, reliability or device operating limits

Apply