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Freelance Silicon Foundry Interface Engineer Jobs

Murata Americas

Senior Staff Engineer, Foundry

San Diego, CA · On-site

$58.75 - $75.75/hr

Job Summary This position is responsible for technical aspects of the foundry interface with external SOS, Off the Shelf, and SOI foundry partners. Senior Staff Foundry Engineer will drive and lead ...

Murata America

Senior Staff Engineer, Foundry

San Diego, CA

$58.75 - $75.75/hr

Job Summary This position is responsible for technical aspects of the foundry interface with external SOS, Off the Shelf, and SOI foundry partners. Senior Staff Foundry Engineer will drive and lead ...

Taxbit

UI Engineer

Salt Lake City, UT · On-site

$110K - $170K/yr

Backed by top-tier Silicon Valley VCs, Taxbit's team is located across offices in San Francisco ... Comfortable operating in product engineering environments where UI quality, reusable patterns, and ...

Taxbit

UI Engineer

Seattle, WA · On-site

$110K - $170K/yr

Backed by top-tier Silicon Valley VCs, Taxbit's team is located across offices in San Francisco ... Comfortable operating in product engineering environments where UI quality, reusable patterns, and ...

TaxBit

UI Engineer

Seattle, WA · Hybrid

$110K - $170K/yr

Backed by top-tier Silicon Valley VCs, Taxbit's team is located across offices in San Francisco ... Comfortable operating in product engineering environments where UI quality, reusable patterns, and ...

TaxBit

UI Engineer

Salt Lake City, UT · Hybrid

$110K - $170K/yr

Backed by top-tier Silicon Valley VCs, Taxbit's team is located across offices in San Francisco ... Comfortable operating in product engineering environments where UI quality, reusable patterns, and ...

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All JobsSilicon Foundry Interface Engineer JobsFreelance Silicon Foundry Interface Engineer Jobs

Freelance Silicon Foundry Interface Engineer information

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$60K

$80.4K

$111.5K

How much do freelance silicon foundry interface engineer jobs pay per year?

As of Jul 20, 2026, the average yearly pay for freelance silicon foundry interface engineer in the United States is $80,416.00, according to ZipRecruiter salary data. Most workers in this role earn between $70,500.00 and $85,000.00 per year, depending on experience, location, and employer.

What does a Freelance Silicon Foundry Interface Engineer do?

A Freelance Silicon Foundry Interface Engineer specializes in managing and optimizing the communication between semiconductor design teams and silicon foundries. They ensure that the design specifications are compatible with foundry processes, handle technical documentation, and resolve interface issues during chip manufacturing. Their work helps streamline the production of integrated circuits by bridging the gap between chip designers and manufacturing facilities. As freelancers, they often work on a project basis for multiple clients, offering flexibility and specialized expertise.

What are some common challenges faced by Freelance Silicon Foundry Interface Engineers when managing multiple client projects?

Freelance Silicon Foundry Interface Engineers often juggle multiple projects with varying requirements, timelines, and communication styles. A common challenge is efficiently coordinating with different foundries and design teams to ensure interface specifications are met and any technical issues are resolved quickly. Managing time zones, documentation standards, and project milestones for each client can also be demanding. Developing strong organizational skills and clear communication habits is essential to ensure successful project delivery while maintaining client satisfaction.

What are the key skills and qualifications needed to thrive as a Freelance Silicon Foundry Interface Engineer, and why are they important?

To thrive as a Freelance Silicon Foundry Interface Engineer, you need expertise in semiconductor device physics, digital and analog circuit design, and experience with foundry processes, usually supported by a degree in electrical engineering or a related field. Proficiency in EDA tools such as Cadence, Synopsys, or Mentor Graphics, as well as familiarity with interface standards and PDKs, is essential. Strong problem-solving abilities, effective communication, and project management skills help you collaborate with clients and deliver complex solutions on time. These skills are crucial for ensuring accurate design handoffs, seamless foundry integration, and successful project outcomes in a highly technical and deadline-driven environment.

What is the difference between Freelance Silicon Foundry Interface Engineer vs Freelance Semiconductor Process Engineer?

AspectFreelance Silicon Foundry Interface EngineerFreelance Semiconductor Process Engineer
CredentialsEngineering degree, industry certificationsEngineering degree, process-specific certifications
Work EnvironmentFoundry facilities, R&D labsManufacturing plants, R&D labs
Industry UsageUsed in chip fabrication, process integrationUsed in process development, optimization
Common Search IntentDesigning interfaces for silicon fabricationDeveloping and optimizing semiconductor processes

The Freelance Silicon Foundry Interface Engineer focuses on designing and managing interfaces within silicon fabrication processes, ensuring seamless integration between different process modules. In contrast, the Freelance Semiconductor Process Engineer concentrates on developing and optimizing manufacturing processes for semiconductor devices. Both roles require technical expertise and industry experience but serve different aspects of semiconductor production.

What cities are hiring for Freelance Silicon Foundry Interface Engineer jobs? Cities with the most Freelance Silicon Foundry Interface Engineer job openings:
What are the most commonly searched types of Silicon Foundry Interface Engineer jobs? The most popular types of Silicon Foundry Interface Engineer jobs are:
What states have the most Freelance Silicon Foundry Interface Engineer jobs? States with the most job openings for Freelance Silicon Foundry Interface Engineer jobs include:
Freelance Silicon Foundry Interface Engineer jobs near you
Senior Foundry Engineer, Silicon Technology

Senior Foundry Engineer, Silicon Technology

Astera Labs

San Jose, CA • On-site

$122K - $168K/yr

Other

Posted 15 days ago

Job description

Job Description
We are seeking a Senior Foundry Engineer, Silicon Technology to support foundry engagement, silicon-to-model correlation, tapeout readiness, and yield improvement for advanced semiconductor products. This person will work closely with internal design, CAD layout, product engineering, test, reliability, operations teams and external foundry partners to identify risks, assess product impact, and drive timely resolution of process, PDK, model, DRC/DFM, and silicon-related issues.
 
Responsibilities Include
  • Silicon, process and yield correlation
    • Analyze process inline data, silicon test data, process drift and process correlation data 
    • Fine tune processes to optimize power, performance and yield
    • Help identify process related contributors to parametric drift, yield loss, leakage, reliability risk
    • Work with foundry and internal teams to investigate yield issues and process excursions
    • Perform layout analysis where needed to understand process sensitivity, failures
  • Tapeout and DFM support
    • Support product tapeouts, tapeout readiness reviews from a PDK, DRC/DFM, device model and reliability perspective
    • Run or coordinate DFM checks on products and summarize findings for design and layout teams
    • Coordinate between foundry and physical design teams to disposition waivers taking performance, leakage, manufacturability and reliability in mind
    • Document known PDK, model, DRC, DFM or process risks before tapeout
    • Maintain an internal PDK qualification database across foundries and process nodes to reduce tapeout risk from unnoticed PDK or model changes
  • Foundry and PDK support
    • Support technical interactions with foundry partners on PDK, device models, process assumptions, design rules, DRC/DFM decks and reliability collateral
    • Track PDK versions, model updates, DRC/DFM runset changes, and foundry signoff recommendations
    • Compare PDK changes across versions and summarize potential design, layout, model or signoff impact
  • Device model and circuit model evaluation
    • Validate model behavior across voltage bias, temperature, process corners, and relevant operating conditions
    • Compare silicon measurements against SPICE/model predictions and help identify model gaps
Basic Qualifications:
  • B.S or M.S in Electrical Engineering, Material science, Semiconductor engineering or a related technical field
  • 5+ years of experience in semiconductor device engineering, foundry interface, silicon technology, process integration, yield/process correlation
Required Experience:
  • Working knowledge of semiconductor process flows, device physics, manufacturability, reliability and yield drivers
  • Experience supporting tapeouts, PDK validation, models, DRC/DFM, silicon bring up
  • Experience analyzing silicon, wafer-level, process monitors, product test, characterization, or reliability data
  • Prior experience at a foundry, IDM, fabless semiconductor company or a PDK/enablement organization
  • Familiarity with SPICE models, process corners, device behavior, layout effects and silicon-to-model correlation
  • Ability to communicate technical issues clearly across design, CAD, layout, test, products engineering and external foundries
  • Familiarity with using TSMC as a foundry
Preferred Experience:
  • Experience with advanced FinFET, gate-all-around/nanosheet technologies and BiCMOS technologies
  • Experience with SRAM, analog/mixed signal, RF, Serdes, low power design constraints
  • Experience benchmarking foundry nodes using spice models on representative circuits
  • Experience using foundry models to simulate junction breakdowns, SOA, ESD, aging, reliability or device operating limits

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