SerDes System Validation Engineer
Cupertino, CA · On-site
$184K - $324K/yr
... SerDes IP ... In this highly visible role, you will actively work within Analog-Mixed/Signal design team and ...
Cupertino, CA · On-site
$184K - $324K/yr
... SerDes IP ... In this highly visible role, you will actively work within Analog-Mixed/Signal design team and ...
Cupertino, CA · On-site
$184K - $324K/yr
... SerDes IP ... In this highly visible role, you will actively work within Analog-Mixed/Signal design team and ...
$129K - $225K/yr
... SerDes IP ... In this highly visible role, you will actively work within Analog-Mixed/Signal design team and ...
$129K - $225K/yr
... SerDes IP ... In this highly visible role, you will actively work within Analog-Mixed/Signal design team and ...
San Jose, CA · On-site
We are seeking highly motivated SerDes Optical Transceivers Silicon Design and Architecture Modeling Engineer Intern/Co-Op candidates to join our team. In this role, you will have the opportunity to ...
New
San Jose, CA · On-site
We are seeking highly motivated SerDes Optical Transceivers Silicon Design and Architecture Modeling Engineer Intern/Co-Op candidates to join our team. In this role, you will have the opportunity to ...
New
Santa Clara, CA · On-site
We are seeking highly motivated SerDes Optical Transceivers Silicon Design and Architecture Modeling Engineer Intern/Co-Op candidates to join our team. In this role, you will have the opportunity to ...
New
Santa Clara, CA · On-site
We are seeking highly motivated SerDes Optical Transceivers Silicon Design and Architecture Modeling Engineer Intern/Co-Op candidates to join our team. In this role, you will have the opportunity to ...
New
San Jose, CA · On-site
$114K/yr
We are seeking highly motivated SerDes Optical Transceivers Silicon Design and Architecture Modeling Engineer Intern/Co-Op candidates to join our team. In this role, you will have the opportunity to ...
San Jose, CA · On-site
$114K/yr
We are seeking highly motivated SerDes Optical Transceivers Silicon Design and Architecture Modeling Engineer Intern/Co-Op candidates to join our team. In this role, you will have the opportunity to ...
Strong understanding of high-speed SerDes architectures and circuit design principles. * Experience using MATLAB, SPICE, and other industry-standard CAD tools for simulation and design implementation.
New
Strong understanding of high-speed SerDes architectures and circuit design principles. * Experience using MATLAB, SPICE, and other industry-standard CAD tools for simulation and design implementation.
New
Austin, TX · On-site
$200K/yr
Familiarity with high-speed analog design and building block circuits for SERDES technology such as ADC/DAC, CTLE, CDR, PLL etc. * Must have a track record of successfully taking designs to ...
Austin, TX · On-site
$200K/yr
Familiarity with high-speed analog design and building block circuits for SERDES technology such as ADC/DAC, CTLE, CDR, PLL etc. * Must have a track record of successfully taking designs to ...
Strong understanding of high-speed SerDes architectures and circuit design principles. * Experience using MATLAB, SPICE, and other industry-standard CAD tools for simulation and design implementation.
New
Strong understanding of high-speed SerDes architectures and circuit design principles. * Experience using MATLAB, SPICE, and other industry-standard CAD tools for simulation and design implementation.
New
Milpitas, CA · On-site
$235K/yr
Familiarity with high-speed analog design and building block circuits for SERDES technology such as ADC/DAC, CTLE, CDR, PLL etc. * Must have a track record of successfully taking designs to ...
Milpitas, CA · On-site
$235K/yr
Familiarity with high-speed analog design and building block circuits for SERDES technology such as ADC/DAC, CTLE, CDR, PLL etc. * Must have a track record of successfully taking designs to ...
Fort Collins, CO · On-site
$199K/yr
Familiarity with high-speed analog design and building block circuits for SERDES technology such as ADC/DAC, CTLE, CDR, PLL etc. * Must have a track record of successfully taking designs to ...
Fort Collins, CO · On-site
$199K/yr
Familiarity with high-speed analog design and building block circuits for SERDES technology such as ADC/DAC, CTLE, CDR, PLL etc. * Must have a track record of successfully taking designs to ...
Billerica, MA · On-site
$214K/yr
Familiarity with high-speed analog design and building block circuits for SERDES technology such as ADC/DAC, CTLE, CDR, PLL etc. * Must have a track record of successfully taking designs to ...
Billerica, MA · On-site
$214K/yr
Familiarity with high-speed analog design and building block circuits for SERDES technology such as ADC/DAC, CTLE, CDR, PLL etc. * Must have a track record of successfully taking designs to ...
San Jose, CA · On-site
$114K/yr
Strong understanding of high-speed SerDes architectures and circuit design principles. * Experience using MATLAB, SPICE, and other industry-standard CAD tools for simulation and design implementation.
San Jose, CA · On-site
$114K/yr
Strong understanding of high-speed SerDes architectures and circuit design principles. * Experience using MATLAB, SPICE, and other industry-standard CAD tools for simulation and design implementation.
San Jose, CA · On-site
$236K/yr
Advanced Circuit and Systems (ACAS) is looking for a Senior Manager, Serdes Analog Design. In this role, you will actively work on architecture and circuits of high-speed interconnect transceiver ...
San Jose, CA · On-site
$236K/yr
Advanced Circuit and Systems (ACAS) is looking for a Senior Manager, Serdes Analog Design. In this role, you will actively work on architecture and circuits of high-speed interconnect transceiver ...
San Jose, CA · On-site
$121K - $164K/yr
... SerDes Design • Design and integrate high-speed interfaces including: o DDR4/DDR memory subsystems o PCIe Gen3/Gen4 interfaces o QSFP (10G/25G/40G/100G) links o 10G+ SerDes channels • Define ...
San Jose, CA · On-site
$121K - $164K/yr
... SerDes Design • Design and integrate high-speed interfaces including: o DDR4/DDR memory subsystems o PCIe Gen3/Gen4 interfaces o QSFP (10G/25G/40G/100G) links o 10G+ SerDes channels • Define ...
San Jose, CA · On-site
$236K/yr
Advanced Circuit and Systems (ACAS) is looking for a Senior Manager, Serdes Analog Design. In this role, you will actively work on architecture and circuits of high-speed interconnect transceiver ...
Quick apply
San Jose, CA · On-site
$236K/yr
Advanced Circuit and Systems (ACAS) is looking for a Senior Manager, Serdes Analog Design. In this role, you will actively work on architecture and circuits of high-speed interconnect transceiver ...
San Jose, CA · On-site
$136K - $253K/yr
Proficient design experience in most of the following SerDes circuit blocks: Driver; Receiver; Serializer; Deserializer; Phase Interpolator; Low jitter PLL; High Speed Clock Distribution; ADC and DAC;
San Jose, CA · On-site
$136K - $253K/yr
Proficient design experience in most of the following SerDes circuit blocks: Driver; Receiver; Serializer; Deserializer; Phase Interpolator; Low jitter PLL; High Speed Clock Distribution; ADC and DAC;
Proficient design experience in most of the following SerDes circuit blocks: Driver; Receiver; Serializer; Deserializer; Phase Interpolator; Low jitter PLL; High Speed Clock Distribution; ADC and DAC;
Proficient design experience in most of the following SerDes circuit blocks: Driver; Receiver; Serializer; Deserializer; Phase Interpolator; Low jitter PLL; High Speed Clock Distribution; ADC and DAC;
San Jose, CA · On-site
$136K - $253K/yr
Proficient design experience in most of the following SerDes circuit blocks: Driver; Receiver; Serializer; Deserializer; Phase Interpolator; Low jitter PLL; High Speed Clock Distribution; ADC and DAC;
San Jose, CA · On-site
$136K - $253K/yr
Proficient design experience in most of the following SerDes circuit blocks: Driver; Receiver; Serializer; Deserializer; Phase Interpolator; Low jitter PLL; High Speed Clock Distribution; ADC and DAC;
Proficient design experience in most of the following SerDes circuit blocks: Driver; Receiver; Serializer; Deserializer; Phase Interpolator; Low jitter PLL; High Speed Clock Distribution; ADC and DAC;
Proficient design experience in most of the following SerDes circuit blocks: Driver; Receiver; Serializer; Deserializer; Phase Interpolator; Low jitter PLL; High Speed Clock Distribution; ADC and DAC;
San Jose, CA · On-site
$145K/yr
AMD SerDes Technology team is searching for a passionate and innovative RTL design engineer to develop high-performance, multi-protocol wireline transceivers in state-of-the-art CMOS processes. THE ...
San Jose, CA · On-site
$145K/yr
AMD SerDes Technology team is searching for a passionate and innovative RTL design engineer to develop high-performance, multi-protocol wireline transceivers in state-of-the-art CMOS processes. THE ...
$14.18 - $16.91
2% of jobs
$16.91 - $19.65
11% of jobs
$22.11 is the 25th percentile. Wages below this are outliers.
$19.65 - $22.38
14% of jobs
$22.38 - $25.11
18% of jobs
The median wage is $26.18 / hr.
$25.11 - $27.84
15% of jobs
$27.84 - $30.57
15% of jobs
$30.91 is the 75th percentile. Wages above this are outliers.
$30.57 - $33.30
11% of jobs
$33.30 - $36.04
7% of jobs
$36.04 - $38.77
4% of jobs
$38.77 - $41.50
3% of jobs
$41.50 - $44.23
1% of jobs
$14
$27
$44
| Aspect | Serdes Design | FPGA Design Engineer |
|---|---|---|
| Required Credentials | Bachelor's or Master's in Electrical Engineering, specialized in high-speed signaling | Bachelor's or Master's in Electrical or Computer Engineering, with FPGA focus |
| Work Environment | Semiconductor companies, high-speed circuit labs | Electronics companies, FPGA development teams |
| Industry Usage | High-speed data communication, networking hardware | Digital system development, embedded systems |
| Common Search/Comparison | Yes | Yes |
Serdes Design focuses on developing high-speed serial transceivers for data communication, requiring expertise in analog and high-speed digital circuits. FPGA Design Engineers develop digital logic on FPGA platforms, often integrating Serdes modules but with broader responsibilities in digital system design. While both roles overlap in digital electronics and high-speed signaling, Serdes Design is specialized in transceiver architecture, whereas FPGA Design Engineers work on implementing entire digital systems on FPGA chips.
States with the most job openings for Serdes Design jobs include:
The top searched job categories for Serdes Design jobs are:

Cupertino, CA • On-site
$184K - $324K/yr
Full-time
Medical, Dental, Retirement
Re-posted 28 days ago
8.1
Based on 686 frontline employees who took The Breakroom Quiz
Sourced by ZipRecruiter
Imagine what you could do here! At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, intelligent people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same real passion for innovation that goes into our products also applies to our practices strengthening our dedication to leave the world better than we found it.
Computer and electronic product manufacturing
10,000+ Employees
Cupertino, CA, US
1976