We are seeking a Senior R&D Software Engineer with proven experience in multiple areas of VLSI Physical Design Algorithms (sizing, buffering, CTS, legalization, incremental place and route etc.
We are seeking a Senior R&D Software Engineer with proven experience in multiple areas of VLSI Physical Design Algorithms (sizing, buffering, CTS, legalization, incremental place and route etc.
Work on applications ranging from silicon data analysis, manufacturing process variation analysis, VLSI circuit design, timing, and agent-driven design exploration and agent flow optimization.
Work on applications ranging from silicon data analysis, manufacturing process variation analysis, VLSI circuit design, timing, and agent-driven design exploration and agent flow optimization.
Work on applications ranging from silicon data analysis, manufacturing process variation analysis, VLSI circuit design, timing, and agent-driven design exploration and agent flow optimization.
Work on applications ranging from silicon data analysis, manufacturing process variation analysis, VLSI circuit design, timing, and agent-driven design exploration and agent flow optimization.
Sr Principal AI/ML Driven ASIC Design and Implementation Automation Expert
San Diego, CA · On-site
$179K - $247K/yr
As an Sr Principal AI/ML driven ASIC Design and Implementation Automation Expert in our Advanced ... Work closely with Academic research communities in AI/ML for VLSI design, Architecture teams, IP ...
Sr Principal AI/ML Driven ASIC Design and Implementation Automation Expert
San Diego, CA · On-site
$179K - $247K/yr
As an Sr Principal AI/ML driven ASIC Design and Implementation Automation Expert in our Advanced ... Work closely with Academic research communities in AI/ML for VLSI design, Architecture teams, IP ...
Sr Principal AI/ML Driven ASIC Design and Implementation Automation Expert
San Diego, CA · On-site
$179K - $247K/yr
As an Sr Principal AI/ML driven ASIC Design and Implementation Automation Expert in our Advanced ... Work closely with Academic research communities in AI/ML for VLSI design, Architecture teams, IP ...
Sr Principal AI/ML Driven ASIC Design and Implementation Automation Expert
San Diego, CA · On-site
$179K - $247K/yr
As an Sr Principal AI/ML driven ASIC Design and Implementation Automation Expert in our Advanced ... Work closely with Academic research communities in AI/ML for VLSI design, Architecture teams, IP ...
Design Verification Engineer
Irvine, CA · On-site
$146K - $178K/yr
Company Description Insilico is an End-to-End specialized VLSI, Embedded Design & Software services ... Santa Clara, CA Duration: 06 months (High Possibility of an extension) Senior DV engineer ...
Design Verification Engineer
Irvine, CA · On-site
$146K - $178K/yr
Company Description Insilico is an End-to-End specialized VLSI, Embedded Design & Software services ... Santa Clara, CA Duration: 06 months (High Possibility of an extension) Senior DV engineer ...
Senior VLSI Physical Design Engineer
Irvine, CA · On-site
$130 - $180/hr
About the Job We are seeking a highly skilled Senior SoC/ASIC Physical Design Engineer to lead and drive the physical design activities to successful closure by collaborating closely with RTL and ...
New
Senior VLSI Physical Design Engineer
Irvine, CA · On-site
$130 - $180/hr
About the Job We are seeking a highly skilled Senior SoC/ASIC Physical Design Engineer to lead and drive the physical design activities to successful closure by collaborating closely with RTL and ...
New
Senior Circuit Design Engineer - AI & HPC (7708)
California, MO · On-site
$120 - $165/hr
As a Senior Circuit Design Engineer, you will leverage TSMC's leading process technology and design ... In-depth knowledge of VLSI design, digital integrated circuits, Verilog, logic design, and DFT.
Senior Circuit Design Engineer - AI & HPC (7708)
California, MO · On-site
$120 - $165/hr
As a Senior Circuit Design Engineer, you will leverage TSMC's leading process technology and design ... In-depth knowledge of VLSI design, digital integrated circuits, Verilog, logic design, and DFT.
Design Verification Engineer
Irvine, CA · On-site
$146K - $178K/yr
Company Description Insilico is an End-to-End specialized VLSI, Embedded Design & Software services ... Santa Clara, CA Duration: 06 months (High Possibility of an extension) Senior DV engineer ...
Design Verification Engineer
Irvine, CA · On-site
$146K - $178K/yr
Company Description Insilico is an End-to-End specialized VLSI, Embedded Design & Software services ... Santa Clara, CA Duration: 06 months (High Possibility of an extension) Senior DV engineer ...
Senior ICV CAD Engineer
Santa Clara, CA · On-site
$136 - $264.50/hr
## Senior ICV CAD EngineerApplylocations: US, CA, Santa Claratime type: Full timeposted on: Posted 2 ... A basic understanding of mosfet device behavior, CMOS layout, and VLSI design.* Excellent ...
Senior ICV CAD Engineer
Santa Clara, CA · On-site
$136 - $264.50/hr
## Senior ICV CAD EngineerApplylocations: US, CA, Santa Claratime type: Full timeposted on: Posted 2 ... A basic understanding of mosfet device behavior, CMOS layout, and VLSI design.* Excellent ...
As a Senior Circuit Design Engineer, you will leverage TSMC's leading process technology and design ... In-depth knowledge of VLSI design, digital integrated circuits, Verilog, logic design, and DFT.
As a Senior Circuit Design Engineer, you will leverage TSMC's leading process technology and design ... In-depth knowledge of VLSI design, digital integrated circuits, Verilog, logic design, and DFT.
As a Senior Circuit Design Engineer, you will leverage TSMC's leading process technology and design ... In-depth knowledge of VLSI design, digital integrated circuits, Verilog, logic design, and DFT.
As a Senior Circuit Design Engineer, you will leverage TSMC's leading process technology and design ... In-depth knowledge of VLSI design, digital integrated circuits, Verilog, logic design, and DFT.
Senior ICV CAD Engineer
Santa Clara, CA · On-site
A successful candidate will have solid EE or CS background with an understanding of circuits, layouts and VLSI design. We are looking for someone who enjoys working on groundbreaking process ...
Senior ICV CAD Engineer
Santa Clara, CA · On-site
A successful candidate will have solid EE or CS background with an understanding of circuits, layouts and VLSI design. We are looking for someone who enjoys working on groundbreaking process ...
A successful candidate will have solid EE or CS background with an understanding of circuits, layouts and VLSI design. We are looking for someone who enjoys working on groundbreaking process ...
A successful candidate will have solid EE or CS background with an understanding of circuits, layouts and VLSI design. We are looking for someone who enjoys working on groundbreaking process ...
Senior ICV CAD Engineer
Santa Clara, CA · On-site
A successful candidate will have solid EE or CS background with an understanding of circuits, layouts and VLSI design. We are looking for someone who enjoys working on groundbreaking process ...
Senior ICV CAD Engineer
Santa Clara, CA · On-site
A successful candidate will have solid EE or CS background with an understanding of circuits, layouts and VLSI design. We are looking for someone who enjoys working on groundbreaking process ...
$135K - $170K/yr
Good understanding of computer architecture, logic design and VLSI design. * Knowledge of System Verilog, Verilog, python, and Perl. * Knowledge of design verification, and functional coverage.
$135K - $170K/yr
Good understanding of computer architecture, logic design and VLSI design. * Knowledge of System Verilog, Verilog, python, and Perl. * Knowledge of design verification, and functional coverage.
Senior ASIC Design Engineer
Santa Clara, CA · On-site
$168 - $311/hr
## Senior ASIC Design EngineerApplylocations: US, CA, Santa Claratime type: Full timeposted on: Posted ... Exposure to Digital systems and VLSI design, Computer Architecture, and Computer Arithmetic is ...
Senior ASIC Design Engineer
Santa Clara, CA · On-site
$168 - $311/hr
## Senior ASIC Design EngineerApplylocations: US, CA, Santa Claratime type: Full timeposted on: Posted ... Exposure to Digital systems and VLSI design, Computer Architecture, and Computer Arithmetic is ...
$168 - $311/hr
## Senior ASIC Design EngineerApplylocations: US, CA, Santa Claratime type: Full timeposted on: Posted ... Exposure to Digital systems and VLSI design, Computer Architecture, and Computer Arithmetic is ...
$168 - $311/hr
## Senior ASIC Design EngineerApplylocations: US, CA, Santa Claratime type: Full timeposted on: Posted ... Exposure to Digital systems and VLSI design, Computer Architecture, and Computer Arithmetic is ...
We are now looking for a Senior ASIC Design Engineer. NVIDIA is seeking ASIC Design Engineers to ... Exposure to Digital systems and VLSI design, Computer Architecture, and Computer Arithmetic is ...
We are now looking for a Senior ASIC Design Engineer. NVIDIA is seeking ASIC Design Engineers to ... Exposure to Digital systems and VLSI design, Computer Architecture, and Computer Arithmetic is ...
We are now looking for a Senior ASIC Design Engineer. NVIDIA is seeking ASIC Design Engineers to ... Exposure to Digital systems and VLSI design, Computer Architecture, and Computer Arithmetic is ...
We are now looking for a Senior ASIC Design Engineer. NVIDIA is seeking ASIC Design Engineers to ... Exposure to Digital systems and VLSI design, Computer Architecture, and Computer Arithmetic is ...
Senior Vlsi Design information
See salary details
$25K - $37.6K
14% of jobs
$43.9K is the 25th percentile. Wages below this are outliers.
$37.6K - $50.2K
22% of jobs
$50.2K - $62.8K
9% of jobs
The median wage is $71.8K / yr.
$62.8K - $75.4K
7% of jobs
$75.4K - $88K
12% of jobs
$98.1K is the 75th percentile. Wages above this are outliers.
$88K - $100.5K
14% of jobs
$100.5K - $113.1K
9% of jobs
$113.1K - $125.7K
4% of jobs
$125.7K - $138.3K
3% of jobs
$138.3K - $150.9K
4% of jobs
$150.9K - $163.5K
2% of jobs
$25K
$80.3K
$163.5K
How much do senior vlsi design jobs pay per year?
What is the difference between Senior Vlsi Design vs Digital IC Design Engineer?
| Aspect | Senior Vlsi Design | Digital IC Design Engineer |
|---|---|---|
| Required Credentials | Bachelor's or Master's in Electrical Engineering, VLSI specialization | Bachelor's or Master's in Electrical Engineering, Digital IC focus |
| Work Environment | Design teams, semiconductor companies, research labs | Design teams, semiconductor companies, integrated circuit firms |
| Employer & Industry Usage | Primarily in semiconductor and electronics industries | Electronics, semiconductor, and integrated circuit industries |
| Common Search & Comparison | Yes | Yes |
Both roles involve designing integrated circuits, but Senior Vlsi Design typically emphasizes advanced VLSI architecture and system-level design, while Digital IC Design Engineers focus more on digital logic implementation and verification. Senior Vlsi Design roles often require broader experience in VLSI design flow, whereas Digital IC Design Engineers concentrate on digital logic design and testing within the IC development process.
What cities are hiring for Senior Vlsi Design jobs?
Cities with the most Senior Vlsi Design job openings:
What are the most commonly searched types of Vlsi Design jobs?
The most popular types of Vlsi Design jobs are:
What states have the most Senior Vlsi Design jobs?
States with the most job openings for Senior Vlsi Design jobs include:
What job categories do people searching Senior Vlsi Design jobs look for?
The top searched job categories for Senior Vlsi Design jobs are:

Full-time
Re-posted 16 days ago
Nvidia rating
9.6
Based on 18 frontline employees who took The Breakroom Quiz
6th of 247 rated software companies
Job description
NVIDIA's success builds on a foundation of industry leading hardware. We achieve distinction through extensive design optimization, including combining the best of external EDA with highly optimized, internal EDA tools. Our team develops these tools by fusing advances in parallel computing, machine learning, and specialized algorithms for VLSI design. We are seeking a Senior R&D Software Engineer with proven experience in multiple areas of VLSI Physical Design Algorithms (sizing, buffering, CTS, legalization, incremental place and route etc.). Understanding both software and hardware aspects is the key. Creativity and self-drive to explore and perfect fast, high-capacity software is required. If you like to work across many technical areas and see your successes directly realized in the world's best AI hardware, it does not get any better than this!
Developing software within a leading hardware company means getting to almost exclusively focus on the latest processes and most advanced designs. We're not bogged down by legacy support, niche roles, or convoluted approval processes. Our developers enjoy unusually high intellectual freedom and the ability to explore broad roles.
What you'll be doing:
Invent new optimization engines that fuse traditionally independent engines (e.g., co-optimization of legalization and sizing) with the objective of increasing chip frequency while minimizing power consumption across a suite of internal optimization tools. These tools already outperform the industry's alternatives in high capacity timing closure and will advance even further with your contributions.
Improve algorithms (in C++) for gate-level sizing, buffering, useful clock skew, cell legalization, power minimization, ECO routing, and incremental parasitic extraction.
As with any software engineering team, we do write a lot of code, but this is broader than a typical CAD or EDA role. Instead, we as a team own the whole process from discovery and invention of new optimization opportunities, to developing solutions and working directly inside design teams to facilitate deployment.
What we need to see:
BS, MS, PhD or equivalent experience in Electrical Engineering or Computer Science
6+ years in VLSI algorithms development using C++
Strong understanding of VLSI timing optimization and related concepts, including cell libraries, interconnect models, crosstalk, glitches, IR drop, timing constraints, corners, congestion, etc.
Familiarity with design implementation tools such as ICC2, Innovus, PrimeTime, Tempus, and StarRC and typical design flows written in Perl, Tcl, and Python
Strong communication and interpersonal skills
Ways to stand out from the crowd:
C++14 or newer experience, such as lambdas and concurrency
Detailed understanding of how multiple Physical Design steps interact and how they can potentially be fused together to form hybrid engines that result in better PPA
Experience in high performance software design including multithreading, distributed computing, efficient memory and I/O use, etc.
Highly driven to craft outstanding software towards improving PPA with a dedication to continuous improvement
Experience with reinforcement learning, GNNs (Graph Neural Networks), and other relevant machine learning frameworks, especially as applied to physical design
NVIDIA is widely considered to be one of the technology world's most desirable employers, and due to outstanding growth, our teams are rapidly growing. Are you passionate about becoming a part of a best-in-class team driving the latest in GPU and AI technology? If so, we want to hear from you!
#LI-Hybrid
Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 168,000 USD - 264,500 USD for Level 4, and 196,000 USD - 310,500 USD for Level 5.You will also be eligible for equity and benefits.
This posting is for an existing vacancy.
NVIDIA uses AI tools in its recruiting processes.
NVIDIA is committed to fostering an inclusive work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.About Nvidia
Sourced by ZipRecruiter
NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. It's a unique legacy of innovation that's fueled by great technology--and amazing people. Today, we're tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. Doing what's never been done before takes vision, innovation, and the world's best talent.
Industry
Computer and electronic product manufacturing
Company size
10,000+ Employees
Headquarters location
Santa Clara, CA, US