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Semiconductor Reliability Engineer Jobs (NOW HIRING)

Reliability Engineer (Starlink/Akoustis)

Bastrop, TX · On-site

$101K - $128K/yr

RELIABILITY ENGINEER (STARLINK/AKOUSTIS) Akoustis is now operating as a wholly owned subsidiary of ... Hands-on experience on semiconductor reliability, physical and electrical failure analysis tools ...

BEOL Reliability Engineer

Austin, TX · On-site

$70K - $212K/yr

About Samsung Austin Semiconductor Samsung is a world leader in advanced semiconductor technology ... support the reliability engineering activity for advanced CMOS technology node. Role and ...

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How much do semiconductor reliability engineer jobs pay per year?

As of Aug 20, 2026, the average yearly pay for semiconductor reliability engineer in the United States is $117,973.00, according to ZipRecruiter salary data. Most workers in this role earn between $102,500.00 and $129,000.00 per year, depending on experience, location, and employer.

What does a semiconductor reliability engineer do?

A Semiconductor Reliability Engineer ensures that semiconductor devices and components meet reliability and quality standards over their expected lifespan. They design stress tests, analyze failure mechanisms, and work on improvements to enhance product durability. Their role involves collaborating with design, manufacturing, and testing teams to identify potential weaknesses and implement solutions. By conducting reliability assessments and failure analysis, they help ensure product performance in various operating conditions.

What are the key skills and qualifications needed to thrive as a semiconductor reliability engineer?

To thrive as a Semiconductor Reliability Engineer, you need a strong background in materials science, semiconductor physics, and data analysis, usually supported by an engineering degree. Experience with reliability testing platforms, Failure Analysis tools (like SEM, TEM), and familiarity with industry standards such as JEDEC or ISO are typically required. Excellent problem-solving skills, attention to detail, and effective communication abilities set you apart in this role. These competencies are critical to ensuring product quality, identifying reliability risks, and delivering robust semiconductor devices in a highly collaborative, fast-paced environment.

What are the typical challenges faced by semiconductor reliability engineers in their day-to-day work?

Semiconductor Reliability Engineers often face challenges such as identifying the root causes of device failures, balancing tight project timelines, and keeping up with evolving industry standards and technologies. The role requires meticulous attention to experiment design and data interpretation, as even small errors can impact the reliability assessment of products. Collaboration with cross-functional teams—including design, process, and test engineering—is also a key aspect, ensuring reliability considerations are integrated throughout development. Staying adaptable and proactive helps overcome these challenges, making the work both dynamic and rewarding.

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Infographic showing various Semiconductor Reliability Engineer job openings in the United States as of August 2026, with employment types broken down into 94% Full Time, 2% Part Time, and 4% Contract. Highlights an 85% Physical, 6% Hybrid, and 9% Remote job distribution, with an average salary of $117,973 per year, or $56.7 per hour.

Co-Packaged Optics (CPO) Reliability Sr. Staff/Principal Engineer

MediaTek Research Lab Inc.

San Jose, CA • On-site

$188 - $301/hr

Other

Medical, Life, Retirement, PTO

Posted 15 days ago


Job description

Co-Packaged Optics (CPO) Reliability Sr. Staff/Principal Engineer

Category: Chip Design

Location: San Jose, CA

Experience: More than 8 Years Work Expe.

Job Description

We are seeking a high-caliber Co-Packaged Optics (CPO) Reliability Engineer to lead the reliability, qualification, and robustness assessment of next-generation co-packaged photonic and electronic systems. In this role, you will focus on the unique reliability challenges at the intersection of high-speed silicon switch ASICs and optical transport, driving qualification across the entire product Lifecycle. You will be responsible for defining accelerated testing methodologies, evaluating complex thermal/mechanical interfaces, and ensuring the seamless integration of optoelectronic components within advanced multi-die architectures.

  • CPO Architecture Qualification: Architecture and execute comprehensive qualification plans at the module and system levels, ensuring strict compliance with GR-468 (Telcordia) and relevant JEDEC standards tailored for co-packaged environments.
  • Advanced Packaging Reliability: Characterize and model the Reliability Failure Modes of Silicon / Packaging specifically targeting high-density 2.5D / 3D packaging, Multi-Chip-Modules (MCM), and ultra-dense electrical/optical interfaces.
  • Component De-risking: Partner with design teams early in the NPI phase to establish Design for Reliability (DfR) and execute FMEA / DFMEA to mitigate risks associated with integrated Optical Engines, PIC (Photonic Integrated Circuits), and high-power III-V laser sources.
  • Reliability Lifetime Modeling: Develop physics-of-failure and Reliability lifetime Modeling frameworks to evaluate wear-out mechanisms such as thermo-mechanical fatigue, electromigration, and optical degradation under mission-critical data center use conditions.
  • Statistical Analysis & FIT Tracking: Utilize statistical software like JMP to analyze parametric drift, accelerated life testing (ALT) data, and calculate product FIT (Failures in Time) and MTBF metrics.
  • Failure Analysis & RMA: Own root-cause failure analysis (FA) for qualification failures and field returns (RMA), leveraging advanced analytical tools to identify material, process, or design marginalities.
  • Supply Chain Collaboration: Work closely with external ecosystems, including OSAT partners, contract manufacturers (CM), and foundry suppliers, to standardize test methodologies and audit factory-level quality controls.
Main Requirements and Qualifications
  • Education: Master’s or Ph.D. in Materials Science, Electrical Engineering, Physics, or a related field with a focus on semiconductor reliability.
  • Experience: 8+ years of experience in product qualification and reliability engineering, specifically within high-speed optoelectronics, silicon photonics, or advanced semiconductor packaging.
  • Technical Expertise: Deep understanding of III-V lasers, Silicon Photonic devices, and high-density optical interconnects.
  • Packaging Knowledge: Direct experience evaluating reliability risks in Advanced Packaging schemes, including TSVs, micro-bumps, and high-thermal-dissipation substrates used in Multi-Chip-Modules.
  • Tools & Standards: Proficient in JMP for statistical life-data analysis (Weibull, lognormal distributions) and thoroughly well-versed in GR-468 qualification environments.
  • Salary range: $188,000- $301,000
  • Employee may be eligible for performance bonus, short and long term incentive programs. Actual total compensation will be dependent upon the individual's skills, experience and qualifications. In addition, MediaTek provides a variety of benefits including comprehensive health insurance coverage, life and disability insurance, savings plan, Company paid holidays, Sick Leave, Vacation time, Parental leave, 401K and more.
  • MediaTek is an Equal Opportunity Employer that is committed to inclusion and diversity to all, regardless of age, ancestry, color, disability (mental and physical), exercising the right to family care and medical leave, gender, gender expression, gender identity, genetic information, marital status, medical condition, military or veteran status, national origin, political affiliation, race, religious creed, sex (includes pregnancy, childbirth, breastfeeding and related medical conditions), and sexual orientation.
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