$95K - $114K/yr
... Product Management, and R&D. You will engage directly with leading semiconductor companies to ... Investigate complex customer and design-flow problems, perform root-cause analysis, and develop ...
$95K - $114K/yr
... Product Management, and R&D. You will engage directly with leading semiconductor companies to ... Investigate complex customer and design-flow problems, perform root-cause analysis, and develop ...
$95K - $114K/yr
... Product Management, and R&D. You will engage directly with leading semiconductor companies to ... Investigate complex customer and design-flow problems, perform root-cause analysis, and develop ...
Wilsonville, OR Β· On-site
$133K - $160K/yr
... Product Management, and R&D. You will engage directly with leading semiconductor companies to ... Investigate complex customer and design-flow problems, perform root-cause analysis, and develop ...
Wilsonville, OR Β· On-site
$133K - $160K/yr
... Product Management, and R&D. You will engage directly with leading semiconductor companies to ... Investigate complex customer and design-flow problems, perform root-cause analysis, and develop ...
Wilsonville, OR Β· On-site
$133K - $160K/yr
... Product Management, and R&D. You will engage directly with leading semiconductor companies to ... Investigate complex customer and design-flow problems, perform root-cause analysis, and develop ...
Wilsonville, OR Β· On-site
$133K - $160K/yr
... Product Management, and R&D. You will engage directly with leading semiconductor companies to ... Investigate complex customer and design-flow problems, perform root-cause analysis, and develop ...
Dallas, TX Β· On-site
$48 - $65.75/hr
You will: β’ Design, automate, and manage DevOps pipelines for deploying and operating semiconductor EDA tools (Cadence PSPICE, Artisan, etc.) on-prem and in the cloud. β’ Work closely with EDA ...
Dallas, TX Β· On-site
$48 - $65.75/hr
You will: β’ Design, automate, and manage DevOps pipelines for deploying and operating semiconductor EDA tools (Cadence PSPICE, Artisan, etc.) on-prem and in the cloud. β’ Work closely with EDA ...
... management skills. Pay & Benefits Consistent with Lattice Semiconductor values and applicable law ... design solutions. Our global workforce, some 1,000 strong, shares a total commitment to customer ...
... management skills. Pay & Benefits Consistent with Lattice Semiconductor values and applicable law ... design solutions. Our global workforce, some 1,000 strong, shares a total commitment to customer ...
The ideal candidate brings a strong background in design management within semiconductor or mission-critical environments, with the ability to lead cross-functional teams, manage complex scopes, and ...
The ideal candidate brings a strong background in design management within semiconductor or mission-critical environments, with the ability to lead cross-functional teams, manage complex scopes, and ...
Wilsonville, OR Β· On-site
$133K - $160K/yr
... Product Management, and R&D. You will engage directly with leading semiconductor companies to ... Investigate complex customer and design-flow problems, perform root-cause analysis, and develop ...
Wilsonville, OR Β· On-site
$133K - $160K/yr
... Product Management, and R&D. You will engage directly with leading semiconductor companies to ... Investigate complex customer and design-flow problems, perform root-cause analysis, and develop ...
Phoenix, AZ Β· On-site
TSMC Arizona's first fab will operate it's leading-edge semiconductor process technology (N4 ... As the Design Department Manager for TSMC, you will lead a multidisciplinary team of design ...
Phoenix, AZ Β· On-site
TSMC Arizona's first fab will operate it's leading-edge semiconductor process technology (N4 ... As the Design Department Manager for TSMC, you will lead a multidisciplinary team of design ...
Phoenix, AZ Β· On-site
TSMC Arizona's first fab will operate its leading-edge semiconductor process technology (N4 process ... As the Design Department Manager for TSMC, you will lead a multidisciplinary team of design ...
Phoenix, AZ Β· On-site
TSMC Arizona's first fab will operate its leading-edge semiconductor process technology (N4 process ... As the Design Department Manager for TSMC, you will lead a multidisciplinary team of design ...
Dallas, TX Β· On-site
$48 - $65.75/hr
Design, automate, and manage DevOps pipelines for deploying and operating semiconductor EDA tools (Cadence PSPICE, Artisan, etc.) on-prem and in the cloud. * Work closely with EDA tool vendors, TI ...
Dallas, TX Β· On-site
$48 - $65.75/hr
Design, automate, and manage DevOps pipelines for deploying and operating semiconductor EDA tools (Cadence PSPICE, Artisan, etc.) on-prem and in the cloud. * Work closely with EDA tool vendors, TI ...
Translate complex semiconductor design and manufacturing technologies - including NVIDIA ... Manage campaign timelines, budget, asset development, collaborator reviews, launch readiness, and ...
Translate complex semiconductor design and manufacturing technologies - including NVIDIA ... Manage campaign timelines, budget, asset development, collaborator reviews, launch readiness, and ...
... semiconductor design * Ability to translate specifications into clear design and verification requirements * Strong written and verbal communication skills * Effective time management and ...
... semiconductor design * Ability to translate specifications into clear design and verification requirements * Strong written and verbal communication skills * Effective time management and ...
Dallas, TX Β· On-site
$52.50 - $71.75/hr
Design, automate, and manage DevOps pipelines for deploying and operating semiconductor EDA tools (Cadence PSPICE, Artisan, etc.) on-prem and in the cloud. * Work closely with EDA tool vendors, TI ...
Dallas, TX Β· On-site
$52.50 - $71.75/hr
Design, automate, and manage DevOps pipelines for deploying and operating semiconductor EDA tools (Cadence PSPICE, Artisan, etc.) on-prem and in the cloud. * Work closely with EDA tool vendors, TI ...
Translate complex semiconductor design and manufacturing technologies - including NVIDIA ... Manage campaign timelines, budget, asset development, collaborator reviews, launch readiness, and ...
Translate complex semiconductor design and manufacturing technologies - including NVIDIA ... Manage campaign timelines, budget, asset development, collaborator reviews, launch readiness, and ...
... semiconductor design and manufacturing. You will work within NVIDIA's Industrial and Physical AI ... content Manage campaign timelines, budget, asset development, collaborator reviews, launch ...
... semiconductor design and manufacturing. You will work within NVIDIA's Industrial and Physical AI ... content Manage campaign timelines, budget, asset development, collaborator reviews, launch ...
Dallas, TX Β· On-site
Who You Are * 15+ years of handsβon semiconductor design enablement experiences in CAD, EDA, PDK, and design automation * 10+ years of leadership experience managing global engineering ...
Dallas, TX Β· On-site
Who You Are * 15+ years of handsβon semiconductor design enablement experiences in CAD, EDA, PDK, and design automation * 10+ years of leadership experience managing global engineering ...
Santa Clara, CA Β· On-site
$159K - $164K/yr
Role- Physical Design Manager Location- San Jose, CA (Onsite) Job Type- Fulltime Role Overview We ... Required Qualifications * 10+ years of industry experience in semiconductor physical design ...
Quick apply
Santa Clara, CA Β· On-site
$159K - $164K/yr
Role- Physical Design Manager Location- San Jose, CA (Onsite) Job Type- Fulltime Role Overview We ... Required Qualifications * 10+ years of industry experience in semiconductor physical design ...
Be Seen First
Plano, TX Β· Remote
Who You Are * 15+ years of hands-on semiconductor design enablement experiences in CAD, EDA, PDK, and design automation * 10+ years of leadership experience managing global engineering organizations
Quick apply
Be Seen First
Plano, TX Β· Remote
Who You Are * 15+ years of hands-on semiconductor design enablement experiences in CAD, EDA, PDK, and design automation * 10+ years of leadership experience managing global engineering organizations
Plano, TX Β· On-site
Who You Are * 15+ years of hands-on semiconductor design enablement experiences in CAD, EDA, PDK, and design automation * 10+ years of leadership experience managing global engineering organizations
Quick apply
Plano, TX Β· On-site
Who You Are * 15+ years of hands-on semiconductor design enablement experiences in CAD, EDA, PDK, and design automation * 10+ years of leadership experience managing global engineering organizations
Santa Clara, CA Β· On-site
$159K - $254K/yr
Passionate about electronics and chip design? Experienced in semiconductor development? Interested ... As an industry manager you will use your technical knowledge of the electronics and semiconductor ...
Santa Clara, CA Β· On-site
$159K - $254K/yr
Passionate about electronics and chip design? Experienced in semiconductor development? Interested ... As an industry manager you will use your technical knowledge of the electronics and semiconductor ...
$42K - $56.5K
4% of jobs
$56.5K - $71K
8% of jobs
$81.6K is the 25th percentile. Wages below this are outliers.
$71K - $85.5K
17% of jobs
The median wage is $99K / yr.
$85.5K - $100K
22% of jobs
$100K - $114.5K
15% of jobs
$114.5K - $129K
6% of jobs
$133.7K is the 75th percentile. Wages above this are outliers.
$129K - $143.5K
7% of jobs
$143.5K - $158K
7% of jobs
$158K - $172.5K
8% of jobs
$172.5K - $187K
2% of jobs
$187K - $201.5K
2% of jobs
$42K
$114.5K
$201.5K
The most popular types of Semiconductor Design jobs are:
For Semiconductor Design Manager jobs, the most frequently searched job titles are:
On-site
$95K - $114K/yr
Other
Posted 7 days ago
Siemens EDA is seeking a highly motivated Product Engineer to join the Calibre Product Engineering team, with a focus on Calibre DesignEnhancer.
Calibre DesignEnhancer brings Calibre technology earlier into the IC design and physical implementation flow, enabling automated, correct-by-construction layout optimization and helping customers improve design quality, power integrity, and time to physical verification closure.
In this role, you will work at the intersection of customers, Application Engineering, Product Management, and R&D. You will engage directly with leading semiconductor companies to understand complex design challenges, translate those challenges into product requirements and new use models, and work closely with engineering teams to develop, validate, and deploy solutions including AI enabled and agentic flows.
This is a highly technical and customer-facing role for someone who wants to remain deeply involved in semiconductor design technology while also helping shape product direction and strategy.
Serve as a technical expert for Calibre DesignEnhancer and related Calibre physical design and verification solutions.
Work directly with semiconductor customers and field Application Engineers to understand physical-design challenges, workflows, and emerging requirements.
Translate customer problems and market needs into clearly defined product requirements, use cases, specifications, and success criteria.
Work closely with Calibre R&D throughout the product development lifecycle, from concept and prototype through validation, deployment, and production release.
Evaluate new product capabilities on representative and customer designs and provide detailed technical feedback to R&D.
Investigate complex customer and design-flow problems, perform root-cause analysis, and develop practical solutions or new methodologies.
Develop expertise in DesignEnhancer use models including layout optimization, via enhancement, power-grid enhancement, and physical-verification readiness.
Work with physical design and signoff flows involving place and route, DRC, power integrity, EM/IR analysis, and related design technologies.
Identify emerging semiconductor design trends, customer challenges, competitive solutions, and opportunities for new DesignEnhancer capabilities and use models.
Support customer evaluations, benchmarks, early-adopter programs, and deployment of new product capabilities.
Partner with Application Engineering, Product Management, Marketing, and other Siemens EDA product teams to drive successful customer adoption.
Communicate product capabilities and technical concepts through customer presentations, demonstrations, training, application notes, white papers, and other technical material.
Represent customer and field requirements within the product organization and help prioritize development based on technical and business impact.
Collaborate effectively across geographically distributed engineering, product, and customer teams.
Travel domestically and internationally as needed for customer engagements and industry activities.
BS or MS degree in Electrical Engineering, Computer Engineering, Computer Science, or a related technical field.
5+ years of relevant semiconductor industry experience in physical design, physical verification, EDA product engineering, applications engineering, design methodology, or a related area.
Strong understanding of the IC physical-design flow, including several of the following:
Floorplanning and place and route
Routing and design closure
Physical verification and DRC
Power distribution networks
Electromigration and IR-drop considerations
Physical implementation and signoff flows
Demonstrated ability to analyze complex technical problems, determine root causes, and develop practical solutions.
Experience working with EDA tools in production semiconductor design flows.
Ability to understand customer requirements and translate them into clear technical requirements for software development teams.
Strong written and verbal communication skills, including the ability to explain complex technical topics to different audiences.
Ability to work independently while collaborating effectively with R&D, field engineering, customers, and other product teams.
Experience working in Linux environments.
Scripting or automation experience using Python, Tcl, shell scripting, or similar languages.
Hands-on experience with Calibre physical verification products, particularly Calibre DRC or related Calibre technologies.
Experience with Calibre DesignEnhancer, Calibre RealTime, or other shift-left physical-design and verification methodologies.
Hands-on experience with industry-standard place-and-route tools such as Cadence Innovus or Synopsys Fusion Compiler/ICC2.
Experience with advanced-node physical implementation and the associated DRC, routing, power-integrity, and design-closure challenges.
Knowledge of EM/IR analysis, power-grid design and optimization, via optimization, filler/DCAP insertion, or related physical-design techniques.
Familiarity with semiconductor design data and interface formats such as LEF/DEF, GDSII, OASIS, and related physical-design formats.
Experience working with foundry technologies, process design kits, or foundry enablement.
Experience defining or driving new EDA product features from initial customer requirement through production release.
Experience supporting product evaluations, benchmarks, or early-access programs with semiconductor customers.
Experience developing technical presentations, demonstrations, training material, application notes, or other product collateral.
Understanding of competitive physical-design and physical-verification solutions and broader semiconductor industry trends.
The ideal candidate combines strong physical-design knowledge with curiosity and customer focus. They are comfortable discussing a difficult implementation or signoff problem directly with a physical-design engineer, breaking that problem down technically with R&D, and then stepping back to determine whether the problem represents a broader market requirement or opportunity for the product.
They should enjoy solving difficult technical problems, working with customers, influencing product direction, and helping turn new technology into solutions that can be successfully deployed across the semiconductor industry.
This position will be subject to U.S. export control requirements under the International Traffic in Arms Regulations (ITAR) and/or Export Administration Regulations (EAR). Employment is contingent on either verifying the U.S. Person status or obtaining any necessary export license.
Working at Siemens Software means flexibility - Choosing between working at home and the office at other times is the norm here. We offer great benefits and rewards, as you'd expect from a world leader in industrial software. A collection of over 377,000 minds building the future one day at a time in over 200 countries. We're dedicated to equality, and we welcome applications that reflect the diversity of the communities we work in. All employment decisions at Siemens are based on qualifications, merit, and business need. Bring your curiosity and creativity and help us shape tomorrow!
Siemens Software. Transform the Everyday with Us
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#LI-HYBRID
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The pay range for this position is $109,800 - $197,700 annually with a target incentive of 5-8% of the base salary. The actual wage offered may be lower or higher depending on budget and candidate experience, knowledge, skills, qualifications, and premium geographic location.
109,800 197,700 5-8
Organization: Digital Industries
Job Type: Full-time
Category: Research & Development