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Rtl Verification Engineer Jobs (NOW HIRING)

Verification Engineer position is your opportunity to join one of the industry's leading companies ... You will be responsible for RTL SoC/Subsystem verification of ARM based SoCs, and work on industry ...

IP Verification Engineer

Austin, TX ยท On-site

$134K/yr

If you've spent several years hunting down the hardest RTL bugs, building verification environments ... S. or M.S. in Electrical Engineering, Computer Engineering - or the equivalent education. At ...

Verification Engineer position is your opportunity to join one of the industry's leading companies ... You will be responsible for RTL SoC/Subsystem verification of ARM based SoCs, and work on industry ...

GPU Design Verification Engineer

Orlando, FL

$127K - $155K/yr

In this role, you will be leading block and sub-system level pre-silicon RTL verification of ... Description As a Senior Graphics Core Hardware Verification Engineer, you will be tasked with the ...

GPU Design Verification Engineer

Orlando, FL ยท On-site

$127K - $155K/yr

In this role, you will be leading block and sub-system level pre-silicon RTL verification of ... Description As a Senior Graphics Core Hardware Verification Engineer, you will be tasked with the ...

Graphics Design Verification Engineer

Austin, TX ยท On-site

$134K - $164K/yr

The Graphics Verification Engineer will be responsible for the pre-silicon RTL verification of blocks in low power embedded graphics cores. This includes deep understanding of the micro-architectural ...

As a PHY Design Verification Engineer, you will be responsible for pre-silicon RTL verification of wireless PHY and its interfaces with the rest of the wireless communication SoC. You will interact ...

As a PHY Design Verification Engineer, you will be responsible for pre-silicon RTL verification of wireless PHY and its interfaces with the rest of the wireless communication SoC. You will interact ...

Design Verification Engineer

Santa Clara, CA ยท On-site

$159K - $195K/yr

Design Verification Engineer Location:Santa Clara CA Duration: Long term Experience:8-15 Years ... RTL designers to resolve issues Execute regression runs, analyze results, and contribute to ...

ASIC Design Verification Engineer

Austin, TX ยท On-site

$134K - $164K/yr

What You Bring Several years of hands-on, in industry RTL verification experience in IP, ASIC, SoC ... Developer Primary Recruiter: Jim Everett Compensation and Benefits at Ericsson At Ericsson, we know ...

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Rtl Verification Engineer information

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$105.5K

$149.2K

$167K

How much do rtl verification engineer jobs pay per year?

As of Jul 12, 2026, the average yearly pay for rtl verification engineer in the United States is $149,150.00, according to ZipRecruiter salary data. Most workers in this role earn between $136,000.00 and $166,000.00 per year, depending on experience, location, and employer.

Are RTL engineers in demand?

RTL Verification Engineers are in high demand due to the growth of semiconductor and electronics industries, especially in companies developing integrated circuits and hardware design. Skills in hardware description languages like VHDL or Verilog, along with experience in simulation tools, enhance employability in this field.

What engineers make $300,000 a year?

Senior engineers in specialized fields such as software engineering, hardware design, or systems architecture can earn $300,000 or more annually, especially with extensive experience, advanced skills, and working in high-demand industries like technology or finance. Roles like RTL Verification Engineers with significant expertise and leadership responsibilities may reach this level, often supplemented by bonuses and stock options.

What is the salary of RTL design and verification engineer?

The salary of an RTL verification engineer typically ranges from $80,000 to $130,000 annually, depending on experience, location, and company size. Entry-level positions may start lower, while experienced engineers with specialized skills in hardware description languages like Verilog or VHDL can earn higher salaries.

What are some common challenges faced by RTL Verification Engineers, and how can they be addressed?

RTL Verification Engineers often face challenges such as identifying elusive design bugs, managing large-scale testbenches, and keeping up with evolving verification methodologies. These issues are typically addressed by using robust verification frameworks, collaborating closely with design and validation teams, and adopting automated testing and coverage-driven verification techniques. Staying current with industry trends and tool advancements can also help engineers work more efficiently. By building strong communication lines and adopting best practices, common obstacles can be overcome effectively, leading to successful project outcomes.

What is an RTL Verification Engineer job?

An RTL Verification Engineer is responsible for ensuring the functional correctness of digital designs at the Register Transfer Level (RTL). They develop and execute testbenches, write verification plans, and use simulation tools to identify design issues. Common methodologies include UVM (Universal Verification Methodology) and formal verification techniques. They collaborate with design and architecture teams to debug and refine chip designs before fabrication. This role is critical in preventing costly hardware bugs in silicon.

What engineer makes $500,000 a year?

Highly experienced engineers in specialized fields such as executive-level software engineers, hardware architects, or senior verification engineers can earn $500,000 or more annually, especially with bonuses and stock options. These roles typically require advanced skills, extensive experience, and often leadership responsibilities within technology companies.

What are the key skills and qualifications needed to thrive in the Rtl Verification Engineer position, and why are they important?

To thrive as an RTL Verification Engineer, you need a solid understanding of digital design principles, proficiency in Hardware Description Languages (HDLs) like Verilog or VHDL, and a degree in electrical engineering or a related field. Experience with verification methodologies (UVM, SystemVerilog), simulation tools (ModelSim, VCS), and scripting languages (Perl, Python) is highly valuable. Strong analytical thinking, teamwork, and effective communication skills help you stand out in collaborative, deadline-driven environments. Mastering both technical expertise and interpersonal skills ensures accurate, timely validation of complex digital designs essential for successful chip development.

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ASIC Verification Engineer

ASIC Verification Engineer

Axiado

San Jose, CA โ€ข On-site

Full-time

Re-posted 29 days ago


Job description

Company Description

Axiado is building the future ofย AI poweredย digital infrastructure. We are aย fast-growing,ย well fundedย silicon, systems, and solutionsย company pioneering a newย categoryย ofย semiconductor called theย Trusted Control/Compute Unit (TCU) that combinesย advanced hardware security,ย AI drivenย resilience and efficiency, andย real-timeย platform management. Our technology protects the worldโ€™s most critical infrastructureโ€”from data centers toย next generationย cloud and AI platformsโ€”by securing systems at theย foundation levels of hardware, independent of host CPUs and operating systems.ย 

Founded in 2019ย and now over 150 employeesย are strong, Axiado has evolved into a recognized leader in the convergence of AI, security, and silicon innovation. We partner with and are actively engaged in commercial programs with multiple Tier 1 industry leaders,ย validatingย both our technology and our long-term market trajectory.ย Axiado has also won numerousย industry awards for our ground-breaking products and technological innovations, includingย being namedย one ofย Fast Companyโ€™s 2025 Top 10 Most Innovative Companiesย in Security,ย winning theย 2025 Global InfoSec Award for Outstanding AI Security Solution, and being named a finalist for the Global Semiconductor Allianceโ€™s 2025 โ€œStart-Up to Watchโ€ award.ย 

At Axiado, developing breakthrough technology takes more than great engineeringโ€”it takes a team of exceptional people who collaborate boldly, challenge assumptions, and take pride in building what comes next. We value curiosity, execution, respect, and a shared desire to make a meaningful impact on the security and reliability of the digital world.ย 

Ifย youโ€™reย driven to innovate, energized by hard problems, and excited to help define the future of secure AI infrastructure, we invite you to apply and join us on this journey.ย 

Job Description

Verification Engineer position is your opportunity to join one of the industryโ€™s leading companies in Smart Edge SoCs for network/systems control, management security systems, and IIoT.

You will be responsible for RTL SoC/Subsystem verification of ARM based SoCs, and work on industry-standard verification methodologies like UVM, Portable Stimulus and Formal verification flows. You will report to the Director of Engineering (Verification).


KEY RESPONSIBILITIES

  • Project Leadership
  • Help develop test plan definitionย 
  • Micro-architecture design verification, RTL verification, and documentation
  • Top-level and block-level functional and performance verification, ย and system level use-case verification; and
  • Support test program development, chip validation, and chip life until production maturity.
  • Team Management and Building
  • Collaboration with firmware, software, DV, FPGA, DFT, SoC integration, and backend teams throughout various stages of ASIC development.
Qualifications
  • 8+ years of experience in UVM verification and UVM environment developmentย (must have)
  • Proficient in test plan definition and testcase development in C/Assembly/System Verilog
  • Expertise in verifying design at RTL level and gate-level simulation
  • Good understanding of coverage analysis, performance verification and use-case verification.
  • Must have worked on AMBA AXI, AHB, APB protocols
  • Should have worked on verifying interface protocols like PCIe, USB, Ethernet, DDR3/4, LPDDR, I2C/I3C, SPI, SD/SDIO/eMMC, UART, etc.
  • Experience in functional test vector development and post-silicon bring-up/debug.
  • Fluency with scripting languages (e.g., Perl, Python, Shell); and
  • Experience in working with repository management tools like Bitbucket/ Jenkins and bug tracking tools like JIRA.
  • BE/BTECH or ME/MTECH degree in EE/EECS/CS or equivalent.

Additional Information

Axiado is committed to attracting, developing, and retaining the highest caliber talent in a diverse and multifaceted environment. We are headquartered in the heart of Silicon Valley, with access to the world's leading research, technology and talent.

We are building an exceptional team to secure every node on the internet. For us, solving real-world problems takes precedence over purely theoretical problems. As a result, we prefer individuals with persistence, intelligence and high curiosity over pedigree alone. Working hard and smart, continuous learning and mutual support are all part of who we are.

Axiado is an Equal Opportunity Employer. Axiado does not discriminate on the basis of race, religion, color, sex, gender identity, sexual orientation, age, non-disqualifying physical or mental disability, national origin, veteran status or any other basis covered by appropriate law. All employment is decided on the basis of qualifications, merit, and business need.