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Rtl Logic Design Intern Jobs in Arizona (NOW HIRING)

Senior CPU Performance Architect

Phoenix, AZ · On-site

$165K/yr

Collaborates with architects, design, verification, and validation engineers during the execution ... Strong background in microarchitecture/RTL/logic development. * Proven ability to resolve complex ...

Working with RTL, System and software engineers to determine appropriate coverage closure for chip ... Foundational knowledge of digital logic and timing considerations * Attention to detail, ability to ...

Hardware Design Engineer

Tempe, AZ · On-site

$164K - $246K/yr

Develop, simulate, and verify FPGA RTL (using SystemVerilog, Verilog, or VHDL) for control, data ... Lead laboratory board bring-up, hardware/firmware integration, and debug using logic analyzers ...

Hardware Design Engineer

Tempe, AZ · On-site

$133 - $247/hr

Develop, simulate, and verify FPGA RTL (using SystemVerilog, Verilog, or VHDL) for control, data ... Lead laboratory board bring-up, hardware/firmware integration, and debug using logic analyzers ...

Hardware Design Engineer

Tempe, AZ · On-site

$164K - $246K/yr

Develop, simulate, and verify FPGA RTL (using SystemVerilog, Verilog, or VHDL) for control, data ... Lead laboratory board bring-up, hardware/firmware integration, and debug using logic analyzers ...

Lead presilicon functional verification of complex CPU and SoC logic to ensure full compliance with ... Debug and rootcause complex RTL, microarchitecture, and integration issues; drive issues to ...

Working with RTL, System and software engineers to determine appropriate coverage closure for chip ... Foundational knowledge of digital logic and timing considerations * Attention to detail, ability to ...

Showing results 21-40

Rtl Logic Design Intern information

What is an RTL Logic Design intern?

RTL Logic Design Interns are students or recent graduates who assist in designing, implementing, and verifying digital circuits at the Register Transfer Level (RTL) using hardware description languages like Verilog or VHDL. Their work involves translating high-level functional specifications into efficient digital logic and working closely with senior engineers to create and test modules for chips or FPGAs. Interns gain hands-on experience with tools and methodologies used in the semiconductor industry, such as simulation, synthesis, and debugging. This role is ideal for those pursuing careers in digital hardware design or computer engineering.

What types of projects and tasks can an RTL Logic Design intern expect to work on during their internship?

As an RTL Logic Design Intern, you can expect to work on a variety of tasks such as writing and verifying Register Transfer Level (RTL) code using hardware description languages like Verilog or VHDL. You may assist in developing modules for digital circuits, running simulations, and debugging logic issues. Interns often collaborate closely with senior engineers, gaining exposure to the design flow, synthesis, and timing analysis. This hands-on experience provides a solid foundation in digital design and offers insight into how large-scale integrated circuits are developed in a professional environment.

What are the key skills and qualifications needed to thrive as an RTL Logic Design intern, and why are they important?

To thrive as an RTL Logic Design Intern, you need a solid understanding of digital logic design, computer architecture, and proficiency in hardware description languages like Verilog or VHDL, typically supported by coursework in electrical or computer engineering. Familiarity with simulation tools such as ModelSim, synthesis tools like Synopsys Design Compiler, and version control systems is highly beneficial. Attention to detail, strong problem-solving abilities, and effective teamwork are critical soft skills for this role. These skills and qualities enable accurate, efficient design and verification of digital circuits, which are essential for developing reliable hardware products.

What is the difference between Rtl Logic Design Intern vs Digital Design Intern?

AspectRtl Logic Design InternDigital Design Intern
Required SkillsVerilog/VHDL, digital logic, hardware description languagesVerilog/VHDL, digital logic, FPGA/ASIC design
Work EnvironmentHardware design teams, semiconductor companiesHardware and FPGA development teams, electronics firms
Industry UsageASIC/FPGA chip design, hardware verificationFPGA prototyping, digital circuit development

Rtl Logic Design Intern focuses specifically on register-transfer level hardware description and logic design, often emphasizing Verilog or VHDL coding for chip development. Digital Design Intern has a broader scope, including FPGA and digital circuit development. Both roles require similar skills but differ slightly in project focus and application areas.

What cities in Arizona are hiring for Rtl Logic Design Intern jobs?

Cities in Arizona with the most Rtl Logic Design Intern job openings:

Infographic showing various Rtl Logic Design Intern job openings in Arizona as of August 2026, with employment types broken down into 23% Internship, 58% Full Time, 13% Part Time, and 6% Contract. Highlights an 100% In-person job distribution.

Senior CPU Performance Architect

Intel

Phoenix, AZ • On-site

$165K/yr

Full-time

Medical, Retirement, PTO

Re-posted 5 days ago


Intel rating

8.7

Company rating: 8.7 out of 10

Based on 147 frontline employees who took The Breakroom Quiz

19th of 159 rated electronics manufacturers


Job description

Job Details:Job Description: 

The Role and Impact
As a CPU Performance Architect, you will play a pivotal role in shaping the future of Intel's cutting-edge CPU designs, driving innovation across high-performance computing and extreme low-power products. This position offers the unique opportunity to be at the forefront of technological advancements, defining and delivering architecture specifications that directly impact Intel's success and industry leadership. Your contributions will influence the performance, scalability, and efficiency of CPUs that serve diverse market segments, from enterprise solutions to edge computing devices.
Through collaboration with cross-functional teams, you will invent novel microarchitectural approaches, overcome bottlenecks, and refine designs to meet stringent constraints and evolving demands. Your work will enable Intel to consistently push boundaries and deliver CPUs that meet and exceed customer expectations.
Key Responsibilities

  • Develops and drives end-to-end CPU microarchitecture specifications for highly optimized, modular, and scalable CPU based on hardware features, requirements, and interoperability of hardware and software throughout the product life cycle.
  • Evaluates feasibility tradeoffs, explores, and defines new approaches and novel microarchitectures for CPU.
  • Models CPU performance and power characteristics and analyzes the bottlenecks of current performance features on workloads that reflect CPU future usage.
  • Collaborates with architects, design, verification, and validation engineers during the execution of the project.
  • Delivers definition of new microarchitecture and finds mitigations for issues that arise during feature implementation to improve the overall design of CPU and overcome bottlenecks and constraints.
  • Participates in the debug and fixing of performance miscorrelation between RTL and\or silicon results against the performance model.
  • Candidate must have experience in designing high performance CPUs and should be an expert in at-least one or multiple domains across the CPU (Branch Prediction, Fetch/Decode, Rename/Allocation, Reservation Stations/Execution, Memory Subsystem or Prefetchers and its interactions with Uncore).
  • Experience in debugging microarchitecture and simulation issues.
  • Strong background in microarchitecture/RTL/logic development.
  • Proven ability to resolve complex problems, applying analytical and technical skills effectively.
Qualifications:

Minimum Qualifications

  • The candidate must have a Master's Degree with at 10+ years of experience or a PhD (with dissertation within a general CPU performance domain) with 6+ years of experience working within a high performance, high frequency ARM or x86 CPU performance team.
  • Candidate must have at 8+ years of continuous work within cycle accurate C++ CPU performance simulators


Preferred Qualifications

  • Background in CPU microarchitecture and experience modeling features in a cycle accurate performance simulator.
  • Experience in microarchitecture exploration and identifying new features which provide IPC across the CPU.
  • Experience with CPU performance related activities from inception to real silicon (pathfinding, definition, correlation with RTL and Post-Si performance debug and tuning)
  • Experience with performance scenarios/use cases and KPI/workloads
  • Advanced skills with Object Oriented Programming (C++/STL) and scripting languages
  • Ability to write assembly and craft tests to evaluate and debug microarchitectural features
  • Ability to read/debug performance issues in RTL


Join Intel and become part of a team dedicated to transforming computing architecture for a smarter, faster, and more connected world.

Job Type:Experienced HireShift:Shift 1 (United States of America)Primary Location: US, Texas, AustinAdditional Locations:US, Arizona, Phoenix, US, California, Folsom, US, California, Santa Clara, US, Oregon, HillsboroBusiness group:Silicon and Platform Engineering Group (SPE): Deliver breakthrough silicon and platform solutions that deliver industry-leading products today while also defining the next generation of computing experiences.Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustThis role is a Position of Trust. Should you accept this position, you must consent to and pass an extended Background Investigation, which includes (subject to country law), extended education, SEC sanctions, and additional criminal and civil checks. For internals, this investigation may or may not be completed prior to starting the position. For additional questions, please contact your Recruiter.Benefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.

Annual Salary Range for jobs which could be performed in the US: $190,610.00-361,480.00 USDThe range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.

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ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.

What Intel employees say

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Benefits

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About Intel

Sourced by ZipRecruiter

Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore's Law to bring smart, connected devices to every person on Earth

Industry

Manufacturing

Company size

10,000+ Employees

Headquarters location

Santa Clara, CA, US

Year founded

1968