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Remote Fpga Vhdl Jobs (NOW HIRING)

Aalyria

Lead RTL/FPGA Design Engineer

$170K - $195K/yr

This is a remote position that will include occasional travel to our Mountain View office location. Key Responsibilities: * Deliver end-to-end FPGA Modem Solution based on VHDL or System Verilog.

Altera

$134K - $195K/yr

Experience with FPGA development tools (e.g., include Quartus, Vivado, etc.) * Experience with VHDL ... Maryland, United States (Remote) Additional Locations: Posting Statement: All qualified applicants ...

Aalyria

Communications DSP Engineer

$185K - $215K/yr

This is a remote position that will include occasional travel to our Mountain View, CA location ... Define DSP architecture specifications for ASIC/FPGA implementation, ensuring efficient mapping to ...

Scout Space

Satellite Electrical Engineer

Reston, VA · On-site +1

Experience with VHDL or Verilog and FPGA development toolchains (e.g., Vivado, Quartus, Libero ... Our positions are based in Reston, Virginia, with much of our team operating in a hybrid or remote ...

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How much do remote fpga vhdl jobs pay per year?

As of Aug 9, 2026, the average yearly pay for remote fpga vhdl in the United States is $147,315.00, according to ZipRecruiter salary data. Most workers in this role earn between $130,000.00 and $167,000.00 per year, depending on experience, location, and employer.

What are the key skills and qualifications needed to thrive as a remote FPGA VHDL engineer?

To thrive as a Remote FPGA VHDL Engineer, you need a solid background in digital design, FPGA architecture, and proficiency in VHDL or Verilog, typically supported by a degree in electrical or computer engineering. Familiarity with simulation tools like ModelSim, synthesis tools such as Xilinx Vivado or Intel Quartus, and experience with version control systems are essential. Strong problem-solving skills, attention to detail, and clear communication are vital soft skills for collaborating remotely and troubleshooting complex systems. These skills ensure efficient hardware development, timely project delivery, and effective remote teamwork in high-stakes engineering environments.

What is a remote FPGA VHDL engineer?

Remote FPGA VHDL engineers are professionals who design, develop, and test digital circuits using Field Programmable Gate Arrays (FPGAs) and the VHDL hardware description language, while working remotely. They are responsible for creating, simulating, and implementing hardware logic designs for various applications, such as telecommunications, aerospace, and consumer electronics. These engineers collaborate with teams and clients online, utilizing specialized tools and secure communication channels to complete their tasks efficiently from any location.

What are the most common challenges faced by remote FPGA VHDL engineers, and how can they be addressed?

Remote FPGA VHDL Engineers often face challenges such as coordinating with distributed teams, ensuring clear communication for design requirements, and managing version control across multiple contributors. To address these, it's important to establish regular check-ins via video calls, use collaborative tools for project management, and adhere to strict documentation and version control protocols. Additionally, leveraging simulation tools and cloud-based development environments can help streamline collaboration and testing workflows, ensuring that team members remain aligned and productive despite working remotely.
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Remote Fpga Vhdl jobs near you
Infographic showing various Remote Fpga Vhdl job openings in the United States as of August 2026, with employment types broken down into 94% Full Time, 1% Part Time, and 5% Contract. Highlights an 93% Physical, 3% Hybrid, and 4% Remote job distribution, with an average salary of $147,315 per year, or $70.8 per hour.

Lead RTL/FPGA Design Engineer

Aalyria

Remote

$170K - $195K/yr

Full-time

Medical, Dental, Vision, Life, Retirement, PTO

Re-posted 18 days ago

Job description

About Aalyria:
Aalyria is a leading technology company that supplies laser communications technology and temporospatial software-defined networking platforms to the aerospace industry. With technology acquired from Google, Aalyria is at the forefront of innovation in satellite and airborne mesh networks, as well as cislunar and deep-space communications. We are revolutionizing the orchestration and management of planetary mesh networks using any radio or optical spectrum, any orbit, and any hardware across land, sea, air, and space.
Role Overview:
As the Lead RTL/FPGA Design Engineer on our Aalyria Space team, you will own the end to end the development of a high-performance coherent modem targeting free space optical (FSO) communications. In this role, you'll own the RTL development of that modem from architecture through silicon bring-up. That means translating complex DSP algorithms, equalization, carrier recovery, timing recovery, into clean, synthesizable RTL, integrating high-throughput FEC engines, and ensuring the full design meets the demanding power, performance, and area targets required for a fielded aerospace system. You'll work directly alongside DSP algorithm developers and system architects, serving as the bridge between mathematical models and working hardware.
This is a remote position that will include occasional travel to our Mountain View office location.
Key Responsibilities:
  • Deliver end-to-end FPGA Modem Solution based on VHDL or System Verilog.
  • Lead the micro-architecture and RTL development for key digital signal processing (DSP) blocks in the coherent modem, including equalization, carrier recovery, and timing recovery.
  • Oversee the integration of Forward Error Correction (FEC) engines and high-speed interfaces into the overall modem architecture.
  • Collaborate with system architects and DSP algorithm developers to translate DSP algorithm specification/ models into robust RTL designs.
  • Design fixed-point arithmetic RTL implementation of complex DSP blocks.
  • Ensure the design is compliant with relevant industry or company standards and specifications.
  • Apply low power design techniques and perform power, performance, and area (PPA) analysis.
  • Verify intended functionality using thorough test benches, and via vector matching with system models.
  • Support functional verification, debug, and static timing closure.
  • Collaborate closely with firmware/software engineers to define hardware/software partitioning, define registers and interfaces, and support system-level integration and debug.
  • Support silicon bring-up and bench testing.

Required Qualifications:
  • Active Security Clearance, or the eligibility to obtain one.
  • Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related technical field.
  • 5+ years of hands-on experience in RTL design for high-speed digital communications or related systems.
  • Proficiency in logic design concepts and high-quality RTL coding using VDHL/SystemVerilog.
  • Proven experience in micro-architecture definition and delivering detailed design specifications.
  • Demonstrated ability to ensure RTL designs are compliant with relevant industry or company standards and specifications.

Preferred Qualifications:
  • Prior experience delivering an end-to-end FPGA communication system solution (from architecture to successful hardware validation).
  • Deep expertise in implementing complex DSP functions in RTL, such as adaptive equalization, carrier recovery, and timing recovery.
  • Proven experience in the integration of high-throughput FEC engines (e.g., LDPC, Reed-Solomon) into a high-speed data path.
  • Ability to convert system models (e.g., Matlab or C++) into robust fixed-point RTL implementations, including successful vector matching and verification.
  • Familiarity with high-speed ASIC/FPGA synthesis, place and route (P&R), and static timing analysis (STA) flows.
  • Experience in designing for low power and high-speed multi-gigabit/sec interfaces.
  • Exposure to the MAC layer (Media Access Control) or digital interface layers adjacent to the PHY.
  • Experience with Python, Perl, TCL and/or other scripting languages.
  • Experience with SoC (System-on-Chip) architectures, including design integration and verification involving embedded processors (e.g., ARM).
  • Familiarity with defining and implementing hardware/software interface protocols for configuration and control.
  • Prior experience with coherent modem architectures or free space optical (FSO) communications systems is highly desired.

What We Offer:
  • Innovative Environment: Work at a cutting-edge company shaping the future of aerospace communications.
  • Impactful Work: Directly contribute to critical national security programs and initiatives.
  • Growth Opportunities: Expand your career with opportunities for professional development and advancement.
  • Inclusive Culture: Be part of a collaborative, supportive, and inclusive workplace where your contributions matter.
  • Flexibility: Flexible working arrangements including hybrid remote/in-office schedules.
  • Compensation and Equity: Competitive salary, comprehensive benefits (401(k), dental, vision, health, life insurance), paid time off, and equity options.

ITAR/EAR Requirements:
This position involves access to export-controlled information. To comply with U.S. government export regulations, applicants must meet one of the following criteria:
(A) Qualify as a U.S. person, which includes:
  • U.S. citizen or national
  • U.S. lawful permanent resident (green card holder)
  • Refugee under 8 U.S.C. 1157
  • Asylee under 8 U.S.C. 1158

(B) Be eligible to access export-controlled information without requiring an export authorization.
(C) Be eligible and reasonably likely to obtain the necessary export authorization from the appropriate U.S. government agency.
The company reserves the right to decline pursuing an export licensing process for legitimate business-related reasons.
Equal Opportunity Employer Statement:
Aalyria is an Equal Opportunity Employer. We celebrate diversity and are committed to creating an inclusive environment for all employees. We do not discriminate based on race, color, religion, sex (including pregnancy, gender identity, and sexual orientation), national origin, age, disability status, genetic information, protected veteran status, or any other characteristic protected by law. Qualified applicants from all backgrounds are encouraged to apply.
The pay range for this role is:
170,000 - 195,000 USD per year (Remote (United States))
185,000 - 215,000 USD per year (Remote (San Francisco Bay Area, California))

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