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Remote Asic Rtl Design Engineer Jobs in Saratoga, CA

Meta

ASIC Engineer, Design Verification

Sunnyvale, CA · On-site +1

$178K/yr

ASIC Engineer, Design Verification Responsibilities: * Define and implement IP/SoC verification plans, build verification test benches to enable IP/sub-system/SoC level verification * Develop ...

YO AI Labs

Hardware Expert - Remote

San Jose, CA · Remote

$50 - $100/hr

Interpret engineering drawings and create accurate 3D CAD models. * Develop complex mechanical ... RTL * 3D Mechanical Modeling * Computational Geometry Qualifications * Strong experience with CAD ...

YO AI Labs

Hardware Expert - Remote

Palo Alto, CA · Remote

$50 - $100/hr

Interpret engineering drawings and create accurate 3D CAD models. * Develop complex mechanical ... RTL * 3D Mechanical Modeling * Computational Geometry Qualifications * Strong experience with CAD ...

VIVA USA INC

AI Workflow Engineer

San Jose, CA · On-site +1

Remote AI Workflow Engineer (Silicon Engineering Productivity) Overview We are seeking a contract ... RTL design, DV, simulation, regression, coverage, or SoC development workflows. • Demonstrated ...

Oklo

Hot Cell Design Engineer

Santa Clara, CA · On-site +1

Integrate robotic and remote handling technologies (e.g., manipulators, cameras, cranes, etc.) into ... We are looking for a Hot Cell Design Engineer that is: * Passionate about clean energy, fuel ...

Oklo

Hot Cell Design Engineer

Santa Clara, CA · On-site +1

Integrate robotic and remote handling technologies (e.g., manipulators, cameras, cranes, etc.) into ... We are looking for a Hot Cell Design Engineer that is: * Passionate about clean energy, fuel ...

Infotech Sourcing

Design Engineer V

Sunnyvale, CA · On-site +1

US - Remote Job Title: Core Engineering - Design Engineer V PCB Layout Engineer, AR Product Team As a PCB Layout Engineer on Meta's AR Product Team, you will be responsible for driving world-class ...

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All JobsAsic Rtl Design Engineer JobsRemote Asic Rtl Design Engineer JobsRemote Asic Rtl Design Engineer Jobs in Saratoga, CA

Remote Asic Rtl Design Engineer information

See Saratoga, CA salary details

$103.7K

$165.6K

$222.7K

How much do remote asic rtl design engineer jobs pay per year?

As of Sep 6, 2026, the average yearly pay for remote asic rtl design engineer in Saratoga, CA is $165,616.00, according to ZipRecruiter salary data. Most workers in this role earn between $145,000.00 and $198,500.00 per year, depending on experience, location, and employer.

What is a remote ASIC RTL design engineer?

A Remote ASIC RTL Design Engineer is a professional who specializes in designing the Register Transfer Level (RTL) code for Application-Specific Integrated Circuits (ASICs) while working remotely. Their main responsibilities include creating and verifying digital circuit designs using hardware description languages such as Verilog or VHDL. These engineers collaborate with hardware teams to ensure functionality, performance, and power requirements are met, all while operating from a location outside of a traditional office setting. They often use remote collaboration tools and simulation software to review and validate designs before fabrication.

What are the key skills and qualifications needed to thrive as a remote ASIC RTL design engineer?

To thrive as a Remote ASIC RTL Design Engineer, you need a solid background in digital design, computer engineering, and hardware description languages like Verilog or VHDL, often supported by a relevant degree. Proficiency with industry-standard EDA tools such as Synopsys, Cadence, or Mentor Graphics, as well as experience with simulation, synthesis, and version control systems, is crucial. Strong problem-solving, self-motivation, and effective remote communication skills distinguish top performers in this role. These skills ensure accurate, efficient design cycles and effective collaboration across distributed teams, leading to successful chip delivery.

What are some common challenges faced by remote ASIC RTL design engineers, and how can they be addressed?

Remote ASIC RTL Design Engineers often face challenges such as coordinating with distributed teams across different time zones and ensuring effective communication during complex design phases. To address these issues, it’s important to establish clear documentation practices, utilize collaboration tools like version control and video conferencing, and schedule regular check-ins with team members. Additionally, staying proactive in seeking feedback and clarifying design specifications helps ensure alignment and reduces misunderstandings. Building strong virtual relationships with verification and backend teams can also streamline the handoff process and overall project flow.

What is the difference between Remote Asic Rtl Design Engineer vs Remote Digital IC Design Engineer?

AspectRemote Asic Rtl Design EngineerRemote Digital IC Design Engineer
Primary FocusRegister Transfer Level (RTL) design for ASICsDigital integrated circuit design at the IC level
Skills & CertificationsHDL (Verilog/VHDL), EDA tools, verificationHDL, circuit simulation, verification, FPGA experience
Work EnvironmentASIC design teams, hardware developmentIC design teams, semiconductor industry
Industry UsageUsed in ASIC development for various applicationsUsed in digital IC manufacturing and prototyping

Both roles involve digital design and HDL skills, but the Remote Asic Rtl Design Engineer focuses on RTL coding for ASICs, while the Remote Digital IC Design Engineer covers broader digital IC design, including FPGA and chip-level work. They share similar credentials and work environments, often overlapping in semiconductor companies.

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What cities near Saratoga, CA are hiring for Remote Asic Rtl Design Engineer jobs?

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Remote Asic Rtl Design Engineer jobs near you
Infographic showing various Remote Asic Rtl Design Engineer job openings in Saratoga, CA as of June 2026, with employment types broken down into 17% Full Time, 62% Part Time, 2% Temporary, 18% Contract, and 1% Nights. Highlights an 51% Physical, 3% Hybrid, and 46% Remote job distribution, with an average salary of $165,616 per year, or $79.6 per hour.

Senior ASIC Verification Engineer (AI Hardware)

4 Staffing Corp

San Jose, CA • On-site, Remote

Full-time

This job post has expired today. Applications are no longer accepted.

Job description

About the job Senior ASIC Verification Engineer (AI Hardware)

Senior ASIC Verification Engineer (AI Hardware) - Remote (U.S.) - No Visa Sponsorship

Overview
Our client an AI / Compute company of the verge of being the next Nvidia is looking for an experienced ASIC Verification Engineer to help ensure the quality, reliability, and performance of their next-generation AI-focused silicon. In this role, you'll partner closely with design, architecture, and software teams to validate complex hardware systems and contribute to cutting-edge compute solutions. This position also offers the opportunity to take ownership of verification efforts and influence best practices across projects.

Key Responsibilities

  • Define and drive verification strategies for advanced ASIC designs used in AI/compute workloads
  • Build and execute detailed verification plans, including coverage goals and validation approaches
  • Develop scalable verification environments using System Verilog and UVM
  • Create simulation infrastructure, including testbenches and both directed and constrained-random test scenarios
  • Work cross-functionally with design and architecture teams to achieve coverage closure and functional accuracy
  • Identify, debug, and resolve design issues throughout pre-silicon and early silicon validation phases
  • Partner with FPGA and emulation teams to support early prototyping and validation efforts
  • Track project milestones, manage verification deliverables, and proactively address risks

Required Background

  • Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related discipline
  • 8+ years of hands-on experience in ASIC or SoC verification
  • Strong proficiency with System Verilog and UVM-based verification flows
  • Deep understanding of verification planning, coverage methodologies, and testbench architecture
  • Experience working with leading EDA toolchains (e.g., Cadence, Synopsys, Siemens EDA)
  • Solid debugging skills, including waveform analysis and scripting (Python, Tcl, or similar)
  • Exposure to high-performance compute architectures such as AI accelerators, memory hierarchies, or high-speed interfaces
  • Demonstrated success verifying complex silicon designs

Nice to Have

  • Advanced degree in a relevant engineering field
  • Experience with hardware/software integration or co-verification
  • Familiarity with formal verification methods
  • Exposure to post-silicon validation, bring-up, or lab debug processes

Apply