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Post Silicon Validation Jobs (NOW HIRING)

Silicon System Validation Engineer, Silicon Validation Engineer, SoCs, firmware , embedded , JTAG , pre-silicon, post-silicon, / Roles & Responsibilities Summary: * The Reality Labs team is building ...

The Validation Engineer is responsible for pre- and post-silicon validation of mixed-signal ... Post-silicon responsibilities encompass IC bring-up, hardware-firmware debug, bench ...

Post-silicon responsibilities encompassICbring-up, hardware-firmware debug, bench characterization ofanalogand mixed-signalperformance, and systematic root-cause analysis of silicon and system-level ...

Role Overview We are looking for a Director of Silicon Validation to own the complete verification ... Post-Silicon Bring-Up & Debug * Establish the post-silicon bring-up plan, lab infrastructure, and ...

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Post Silicon Validation information

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How much do post silicon validation jobs pay per hour?

As of Sep 6, 2026, the average hourly pay for post silicon validation in the United States is $50.45, according to ZipRecruiter salary data. Most workers in this role earn between $39.66 and $61.30 per hour, depending on experience, location, and employer.

What is post silicon validation?

Post Silicon Validation is the process of testing and verifying a semiconductor chip’s functionality, performance, and reliability after it has been manufactured. This stage is critical because it helps ensure that the hardware operates as intended in real-world conditions, identifying any issues that may not have been detected during pre-silicon simulation or emulation. Engineers use specialized test setups to validate features, diagnose bugs, and work closely with design teams to resolve any defects. Successful post silicon validation helps ensure product quality and reduces the risk of costly recalls or failures after the chip is released to customers.

What are the key skills and qualifications needed to thrive as a post silicon validation engineer?

To thrive as a Post Silicon Validation Engineer, you need a solid background in electrical engineering, digital design, and experience with silicon debugging, often supported by a relevant degree. Familiarity with hardware description languages (HDL), lab equipment (oscilloscopes, logic analyzers), and tools like JTAG, as well as scripting languages such as Python or Perl, is typically required. Attention to detail, strong analytical thinking, and effective communication are crucial soft skills for diagnosing complex issues and collaborating with cross-functional teams. These skills and qualifications are essential to ensuring that silicon chips meet design specifications and function reliably before mass production.

What are some common challenges faced in post silicon validation, and how can candidates prepare to address them?

Post Silicon Validation engineers often encounter challenges such as debugging complex hardware-software interactions, reproducing intermittent failures, and working with limited documentation or pre-silicon models. To address these, candidates should develop strong problem-solving skills, gain hands-on experience with lab equipment, and become proficient in scripting and automation tools. Collaborating closely with design, firmware, and test teams is also essential to efficiently pinpoint issues and implement solutions, making strong communication skills highly valuable.

What is the difference between Post Silicon Validation vs Silicon Validation Engineer?

AspectPost Silicon ValidationSilicon Validation Engineer
CredentialsBachelor's or Master's in Electrical Engineering, Computer Engineering, or related fieldsBachelor's or Master's in Electrical Engineering, Computer Engineering, or related fields
Work EnvironmentPost-production testing, debugging, and validation on actual silicon chipsPre-silicon testing, simulation, and verification of chip designs
Industry UsagePrimarily after chip fabrication, focusing on real hardwareDuring design phase, before fabrication, focusing on verification
Common Search/ComparisonPost Silicon Validation vs Silicon Validation Engineer

Post Silicon Validation involves testing and validating chips after fabrication to ensure they meet specifications, while Silicon Validation Engineers focus on verifying chip designs before manufacturing. Both roles require similar technical backgrounds but differ in timing, environment, and specific tasks within the chip development lifecycle.

What does a post silicon validation engineer do?

A post silicon validation engineer tests and verifies the functionality, performance, and reliability of hardware chips after fabrication. They develop test plans, use specialized tools and equipment, and analyze test data to identify and troubleshoot issues before the product is released. This role requires knowledge of hardware design, scripting, and debugging skills.

What skills are needed for post silicon validation?

Post silicon validation requires strong knowledge of hardware design, debugging skills, and proficiency with scripting languages like Python or Perl. Familiarity with FPGA or ASIC testing tools, understanding of system architecture, and experience with test automation are also important for verifying chip functionality after fabrication.
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What cities are hiring for Post Silicon Validation jobs?

Cities with the most Post Silicon Validation job openings:

What states have the most Post Silicon Validation jobs?

States with the most job openings for Post Silicon Validation jobs include:

Infographic showing various Post Silicon Validation job openings in the United States as of August 2026, with employment types broken down into 70% Full Time, 6% Part Time, 18% Contract, and 6% Nights. Highlights an 100% In-person job distribution, with an average salary of $104,945 per year, or $50.5 per hour.

Silicon Validation Engineer, Infra Silicon

Meta

Sunnyvale, CA • On-site

$178K - $250K/yr

Full-time

Re-posted 13 days ago


Key responsibilities

  • Define and own comprehensive validation strategies for custom infrastructure ASICs, including functional correctness, performance characterization, reliability stress testing, and power analysis.

  • Lead pre-silicon validation planning using simulation and emulation environments, authoring test plans that cover corner cases across compute, memory, and I/O subsystems.

  • Drive post-silicon bring-up activities such as board-level debug, firmware integration, and root-cause analysis of silicon failures.


Meta rating

7.8

Company rating: 7.8 out of 10

Based on 45 frontline employees who took The Breakroom Quiz

139th of 247 rated software companies


Job description

Meta's Infrastructure Silicon organization is seeking a Silicon Validation Engineer to lead silicon validation efforts for custom-designed accelerators and infrastructure ASICs powering Meta's data center fleet. In this role, you will drive end-to-end validation strategy across the full silicon lifecycle - from pre-silicon planning and emulation-based verification through post-silicon bring-up, characterization, and fleet-scale deployment. You will serve as a technical authority bridging silicon design, systems architecture, and production infrastructure, ensuring that Meta's custom silicon meets rigorous performance, reliability, and functional requirements at scale.
Responsibilities
Define and own comprehensive validation strategies for custom infrastructure ASICs, spanning functional correctness, performance characterization, reliability stress testing, and power analysis across pre- and post-silicon phases
• Lead pre-silicon validation planning using simulation and emulation environments, authoring test plans that map to architectural specifications and cover corner cases across compute, memory, and I/O subsystems
• Drive post-silicon bring-up activities including board-level debug, firmware integration, and systematic root-cause analysis of silicon failures using lab instrumentation and diagnostic tooling
• Develop and maintain automated validation frameworks, silicon diagnostics, and performance analysis tools that scale from early lab environments to large-scale data center deployments
• Collaborate with ASIC design, architecture, and physical design teams to provide validation feedback that influences design-for-testability decisions and next-generation silicon architecture
• Establish and track silicon quality metrics, characterization data, and yield analysis to inform productization decisions and deployment readiness gates
• Partner with systems and firmware engineering teams to validate host-side integration, PCIe and fabric interconnects, thermal management, and power delivery across full-stack server configurations
• Identify systemic silicon failure modes observed in the production fleet and drive corrective actions through design errata documentation, firmware workarounds, or architectural improvements
• Mentor other engineers on validation methodology, debug techniques, and best practices for infrastructure silicon bring-up and characterization
• Contribute to long-term validation infrastructure roadmaps, defining tooling investments and methodology improvements that improve coverage and reduce time-to-production for future silicon generations
Minimum Qualifications
• Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience
• 8+ years of experience in silicon validation, hardware systems engineering, or post-silicon bring-up for custom ASICs, SoCs, or accelerator designs
• 8+ years of experience with pre-silicon validation environments including RTL simulation, emulation platforms, or FPGA prototyping
• Experience with post-silicon debug methodologies including use of logic analyzers, oscilloscopes, JTAG, and protocol analyzers for PCIe, DDR, or high-speed serial interfaces
• Experience developing validation automation frameworks and diagnostic tooling using Python, C, or C++
• Experience collaborating across ASIC design, architecture, firmware, and systems teams throughout the silicon development lifecycle
Preferred Qualifications
• Experience with data center infrastructure silicon including AI/ML accelerators, network ASICs, or storage controllers in large-scale fleet environments
• Experience defining design-for-testability requirements and contributing to silicon architecture reviews from a validation perspective
• Familiarity with server systems architecture including PCIe topology, memory subsystems, and BMC-based platform management
• Experience with power and thermal characterization, reliability stress testing, and silicon yield analysis for productization
About Meta
Meta builds technologies that help people connect, find communities, and grow businesses. When Facebook launched in 2004, it changed the way people connect. Apps like Messenger, Instagram and WhatsApp further empowered billions around the world. Now, Meta is moving beyond 2D screens toward immersive experiences like augmented and virtual reality to help build the next evolution in social technology. People who choose to build their careers by building with us at Meta help shape a future that will take us beyond what digital connection makes possible today-beyond the constraints of screens, the limits of distance, and even the rules of physics.
Equal Employment Opportunity
Meta is proud to be an Equal Employment Opportunity employer. We do not discriminate based upon race, religion, color, national origin, sex (including pregnancy, childbirth, reproductive health decisions, or related medical conditions), sexual orientation, gender identity, gender expression, age, status as a protected veteran, status as an individual with a disability, genetic information, political views or activity, or other applicable legally protected characteristics. You may view our Equal Employment Opportunity notice here.

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