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Post Silicon Validation Jobs in California (NOW HIRING)

Job Summary We are seeking a highly skilled and motivated Post Silicon Validation Engineer to join our dynamic team. The ideal candidate will be responsible for bringing up, validating, and ...

Job Summary We are seeking a highly skilled and motivated Post Silicon Validation Engineer to join our dynamic team. The ideal candidate will be responsible for bringing up, validating, and ...

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Post Silicon Validation information

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$15

$49

$74

How much do post silicon validation jobs pay per hour?

As of Sep 6, 2026, the average hourly pay for post silicon validation in California is $49.79, according to ZipRecruiter salary data. Most workers in this role earn between $39.13 and $60.48 per hour, depending on experience, location, and employer.

What is post silicon validation?

Post Silicon Validation is the process of testing and verifying a semiconductor chip’s functionality, performance, and reliability after it has been manufactured. This stage is critical because it helps ensure that the hardware operates as intended in real-world conditions, identifying any issues that may not have been detected during pre-silicon simulation or emulation. Engineers use specialized test setups to validate features, diagnose bugs, and work closely with design teams to resolve any defects. Successful post silicon validation helps ensure product quality and reduces the risk of costly recalls or failures after the chip is released to customers.

What are the key skills and qualifications needed to thrive as a post silicon validation engineer?

To thrive as a Post Silicon Validation Engineer, you need a solid background in electrical engineering, digital design, and experience with silicon debugging, often supported by a relevant degree. Familiarity with hardware description languages (HDL), lab equipment (oscilloscopes, logic analyzers), and tools like JTAG, as well as scripting languages such as Python or Perl, is typically required. Attention to detail, strong analytical thinking, and effective communication are crucial soft skills for diagnosing complex issues and collaborating with cross-functional teams. These skills and qualifications are essential to ensuring that silicon chips meet design specifications and function reliably before mass production.

What are some common challenges faced in post silicon validation, and how can candidates prepare to address them?

Post Silicon Validation engineers often encounter challenges such as debugging complex hardware-software interactions, reproducing intermittent failures, and working with limited documentation or pre-silicon models. To address these, candidates should develop strong problem-solving skills, gain hands-on experience with lab equipment, and become proficient in scripting and automation tools. Collaborating closely with design, firmware, and test teams is also essential to efficiently pinpoint issues and implement solutions, making strong communication skills highly valuable.

What is the difference between Post Silicon Validation vs Silicon Validation Engineer?

AspectPost Silicon ValidationSilicon Validation Engineer
CredentialsBachelor's or Master's in Electrical Engineering, Computer Engineering, or related fieldsBachelor's or Master's in Electrical Engineering, Computer Engineering, or related fields
Work EnvironmentPost-production testing, debugging, and validation on actual silicon chipsPre-silicon testing, simulation, and verification of chip designs
Industry UsagePrimarily after chip fabrication, focusing on real hardwareDuring design phase, before fabrication, focusing on verification
Common Search/ComparisonPost Silicon Validation vs Silicon Validation Engineer

Post Silicon Validation involves testing and validating chips after fabrication to ensure they meet specifications, while Silicon Validation Engineers focus on verifying chip designs before manufacturing. Both roles require similar technical backgrounds but differ in timing, environment, and specific tasks within the chip development lifecycle.

What does a post silicon validation engineer do?

A post silicon validation engineer tests and verifies the functionality, performance, and reliability of hardware chips after fabrication. They develop test plans, use specialized tools and equipment, and analyze test data to identify and troubleshoot issues before the product is released. This role requires knowledge of hardware design, scripting, and debugging skills.

What skills are needed for post silicon validation?

Post silicon validation requires strong knowledge of hardware design, debugging skills, and proficiency with scripting languages like Python or Perl. Familiarity with FPGA or ASIC testing tools, understanding of system architecture, and experience with test automation are also important for verifying chip functionality after fabrication.

What are popular job titles related to Post Silicon Validation jobs in California?

For Post Silicon Validation jobs in California, the most frequently searched job titles are:

What job categories do people searching Post Silicon Validation jobs in California look for?

The top searched job categories for Post Silicon Validation jobs in California are:

What cities in California are hiring for Post Silicon Validation jobs?

Cities in California with the most Post Silicon Validation job openings:

Infographic showing various Post Silicon Validation job openings in California as of August 2026, with employment types broken down into 1% As Needed, 85% Full Time, 11% Part Time, and 3% Contract. Highlights an 94% Physical, 3% Hybrid, and 3% Remote job distribution, with an average salary of $103,570 per year, or $49.8 per hour.

Post-Silicon Validation Engineer

Etched

San Jose, CA • On-site

$160K - $260K/yr

Full-time

Medical, Dental, Vision

Re-posted yesterday


Key responsibilities

  • Drive early bring-up of first silicon, including boot, initialization, and debug of ASICs.

  • Perform deep-dive debug of silicon issues across RTL, firmware, and system levels.

  • Validate and characterize custom IP blocks and accelerator components.


Job description

About Etched

Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.

Job Summary

We are seeking a highly skilled and motivated Post Silicon Validation Engineer to join our dynamic team. The ideal candidate will be responsible for bringing up, validating, and characterizing ASICs from first silicon through the production ramp. This role is crucial in ensuring functional correctness, performance, and reliability of our AI/ML accelerator hardware, enabling successful deployment of our cutting-edge products.

Key Responsibilities

  • Drive early bring-up of first silicon, including boot, initialization, and debug of ASICs.

  • Perform deep-dive debug of silicon issues across RTL, firmware, and system levels.

  • Collaborate closely with design, verification, and board teams to root-cause and resolve functional and electrical issues.

  • Validate and characterize custom IP blocks and accelerator components.

  • Execute functional and performance validation of compute units and specialized processing elements.

  • Conduct IP-level and full-chip stress testing and corner case analysis to ensure robust operation.

  • Develop and extend post-silicon validation infrastructure, automation, and test suites.

  • Implement efficient result capture, analysis, and regression frameworks.

  • Utilize lab instrumentation (oscilloscopes, analyzers, BERTs, pattern generators) for detailed signal and system characterization.

  • Define validation strategies and coverage metrics across design blocks and subsystems.

  • Partner with RTL, DFT, ATE, firmware, and system architecture teams to ensure smooth transition from pre-silicon verification to post-silicon validation.

  • Provide critical feedback on test escapes, yield issues, and silicon errata, influencing silicon revisions and firmware/driver workarounds.

You may be a good fit if you have

  • 7+ years of experience in post-silicon validation, bring-up, and debug of ASICs (preferably including AI/ML accelerators)

  • Proven expertise in early silicon bring-up, debug, and validation

  • Deep knowledge of peripheral interfaces and board-level debug

  • Proficiency in C, Python, and scripting for validation automation

  • Hands-on expertise with oscilloscopes, logic/protocol analyzers, and other validation lab tools

  • Familiarity with firmware, bootloaders, and low-level silicon debug environments

  • Strong problem-solving, analytical, and collaboration skills across hardware and software teams

  • Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field (Master's preferred)

Strong candidates may also have experience with

  • Low-speed peripheral interfaces (I2C, SPI, UART, JTAG)

  • High-speed protocols (PCIe, Ethernet)

  • Memory subsystems (HBM, DDR)

  • Performance and thermal characterization

  • AI/ML model profiling and workload correlation

  • System-level validation of accelerators or server platforms

Benefits

  • Medical, dental, and vision packages with generous premium coverage

    • $500 per month credit for waiving medical benefits

  • Housing subsidy of $2k per month for those living within walking distance of the office

  • Relocation support for those moving to San Jose (Santana Row)

  • Various wellness benefits covering fitness, mental health, and more

  • Daily lunch + dinner in our office

  • Unlimited compute budget subject to ROI justification

How we’re different

Etched believes in the Bitter Lesson. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.

 

We are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.

Compensation Range: $160K - $260K