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Physical Design Engineer Jobs in Ontario (NOW HIRING)

Amd

Senior Physical Design Engineer

Thornhill, ON · Hybrid

As a seasoned Physical Design engineer, you will be working with a diverse team of physical design engineers, RTL design engineers, and managers from NBIO IP team. You will drive physical ...

Doist

We are seeking a highly skilled Senior Physical Design Engineer to work on the implementation of complex digital blocks. In this role, you will leverage your expertise in advanced process nodes (3nm ...

New

Doist

Sr. Staff Physical Design Engineer

Toronto, ON · On-site

$191 - $219/hr

We are seeking a highly skilled Senior Physical Design Engineer to work on the implementation of complex digital blocks. In this role, you will leverage your expertise in advanced process nodes (3nm ...

Amd

IREM Physical Design Engineer

Thornhill, ON · Hybrid

You'll partner closely with physical design, packaging, and CAD teams, gaining exposure to advanced ... Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or related field ...

Nutanix

Senior Physical Design Engineer

Toronto, ON · On-site

$149.09 - $220.15/hr

What You'll Need7+ years of Physical Design experienceBachelor's degree in Electrical or Computer Engineering or equivalentLow-Power Designs experience desiredSOC design experience is desiredAdvanced ...

Marvell

Principal ASIC Design Engineer

Ottawa, ON · On-site

If Marvell were a wheel, Central Engineering would be the central hub, delivering foundational IP ... Collaborate closely with physical design teams to provide high-quality constraints aligned with ...

Amd

RTL Design Engineer

Thornhill, ON · Hybrid

An RTL Design Engineering role in our Security IP (SECIP) team, where a large number of individual ... mental or physical disability, national origin, race, religion, political and/or third-party ...

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Physical Design Engineer information

See Ontario salary details

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How much do physical design engineer jobs pay per hour?

As of Aug 8, 2026, the average hourly pay for physical design engineer in Ontario is $77.48, according to ZipRecruiter salary data. Most workers in this role earn between $64.42 and $88.70 per hour, depending on experience, location, and employer.

What is a physical design engineer?

A Physical Design Engineer is responsible for transforming logical circuit designs into a physical layout that can be manufactured as an integrated circuit (IC). They focus on key aspects like floor planning, placement, clock tree synthesis (CTS), routing, and timing closure while ensuring power and performance optimization. They work with Electronic Design Automation (EDA) tools and collaborate with front-end designers to meet design specifications. The role requires proficiency in tools such as Cadence, Synopsys, or Mentor Graphics and knowledge of processes like ASIC or SoC design.

What are the key skills and qualifications needed to thrive as a physical design engineer?

To thrive as a Physical Design Engineer, you need a solid background in electrical engineering, experience with ASIC or SoC design methodologies, and a deep understanding of digital circuit fundamentals. Proficiency with EDA tools like Synopsys, Cadence, or Mentor Graphics, as well as familiarity with scripting languages and industry certifications, is highly valued. Attention to detail, effective teamwork, and strong problem-solving skills are essential soft skills for this role. These qualifications are crucial as they enable efficient chip design, ensure successful project delivery, and foster productive collaboration in complex engineering environments.

What are the typical daily responsibilities of a physical design engineer?

As a Physical Design Engineer, your daily responsibilities typically include taking logical circuit designs and translating them into physical layouts, performing floorplanning, placement, and routing of blocks, and conducting timing closure and verification. You will use specialized EDA tools to ensure that designs meet performance, power, and area requirements, collaborating closely with design, verification, and manufacturing teams. The role also involves resolving design issues, optimizing chip layouts, and preparing design data for fabrication. Working in this position provides exposure to advanced technology nodes and the opportunity to contribute directly to the development of cutting-edge semiconductor products.

What are the most commonly searched types of Physical Design Engineer jobs in Ontario? The most popular types of Physical Design Engineer jobs in Ontario are:
What are popular job titles related to Physical Design Engineer jobs in Ontario? For Physical Design Engineer jobs in Ontario, the most frequently searched job titles are:
What job categories do people searching Physical Design Engineer jobs in Ontario look for? The top searched job categories for Physical Design Engineer jobs in Ontario are:
What are popular job titles related to Physical Design Engineer jobs in ON? For Physical Design Engineer jobs in ON, the most frequently searched job titles are:
Physical Design Engineer jobs near you
Infographic showing various Physical Design Engineer job openings in Ontario as of August 2026, with employment types broken down into 1% As Needed, 81% Full Time, 15% Part Time, 1% Temporary, and 2% Contract. Highlights an 97% Physical, 1% Hybrid, and 2% Remote job distribution, with an average salary of $161,166 per year, or $77.5 per hour.

Manager, Physical Design Engineer

Astera Labs

Toronto, ON • On-site

Full-time

Re-posted 17 hours ago

Job description

Role Overview

Astera Labs is seeking a Physical Design Engineering Manager to lead a team of physical design engineers at our Toronto site, driving the implementation of connectivity ASICs within our Signal Connectivity Group. This group is responsible for products that enable high-speed serial connectivity including PCIe retimers, Ethernet retimers, and signal conditioning solutions deployed across the world's largest AI clusters and hyperscale data centers.

As an Physical Design Manager Engineering Manager, you will combine hands-on technical leadership with people management, owning physical design execution from RTL to GDSII while building and mentoring a high-performing team. You will drive floorplanning, place-and-route, timing closure, and sign-off for complex designs requiring deep understanding of high-speed physical layer interfaces and SerDes integration at TSMC advanced nodes. This role is fully on-site at our Toronto location.

Basic Qualifications

  • Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field; Master's preferred.
  • 10+ years of experience in physical design implementation of complex SoCs at advanced nodes (7nm and below).
  • 2+ years of experience leading teams or projects with demonstrated ability to mentor and develop engineers.
  • Hands-on expertise across the physical design flow: synthesis, place-and-route, CTS, extraction, timing closure, EM-IR, DRC/LVS, and equivalence checking.
  • Proficiency with Cadence Innovus and/or Synopsys Fusion Compiler/ICC2 and supporting toolchains.
  • Strong scripting ability in Tcl, Python, and/or Perl.
  • Professional attitude with the ability to prioritize a dynamic list of tasks, plan and prepare for customer meetings in advance, and work with minimal guidance.
  • Entrepreneurial, open-minded behavior and can-do attitude. Think and act fast with the customer in mind! 

Required Experience

  • Build, lead, and mentor a physical design team, owning Physical Design execution and team development for Signal Connectivity Group products.
  • Drive block and top-level physical design implementation from floorplan through tapeout for retimer and signal conditioning ASICs.
  • Collaborate with RTL, DFT, STA, EMIR, and verification teams to drive design convergence from synthesis through sign-off.
  • Work with IP vendors for both RTL and hard-macro integration, ensuring placement constraints and routing guidelines are met.
  • Drive team execution, hiring, career development, and sprint planning for the Toronto PD team.
  • Establish physical design best practices, flow improvements, and quality checks to scale execution across multiple concurrent programs.
  • Coordinate with global PD teams (San Jose, Irvine, Bangalore) to ensure consistent methodology and design quality.
  • Experience with Cadence and/or Synopsys physical design tools/flows.

Preferred Experience/Nice to Have

  • Deep understanding of high-speed SerDes physical layer, including equalization, CDR, and signal integrity considerations impacting physical design.
  • Knowledge of physical layer timing challenges specific to high-speed serial interfaces.
  • Track record of building and scaling physical design teams through multiple tapeouts.
  • Knowledge of agentic AI solutions for EDA automation.

Base salary range is CAD 180,000 to CAD 220,000 depending on experience, level, and business need. This role may be eligible for discretionary bonus, incentives, and benefits.

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