As an Physical Design Manager Engineering Manager, you will combine hands-on technical leadership with people management, owning physical design execution from RTL to GDSII while building and ...
As an Physical Design Manager Engineering Manager, you will combine hands-on technical leadership with people management, owning physical design execution from RTL to GDSII while building and ...
Staff Physical Design Engineer Our client is a leader in next-generation digital connectivity, enabling high-performance data communication across the most demanding industries-ranging from AI and ...
Staff Physical Design Engineer Our client is a leader in next-generation digital connectivity, enabling high-performance data communication across the most demanding industries-ranging from AI and ...
We are seeking a highly skilled Senior Physical Design Engineer to work on the implementation of complex digital blocks. In this role, you will leverage your expertise in advanced process nodes (3nm ...
We are seeking a highly skilled Senior Physical Design Engineer to work on the implementation of complex digital blocks. In this role, you will leverage your expertise in advanced process nodes (3nm ...
Physical Design Engineer About the Team: Our client, a global leader in semiconductor innovation, is looking for a Physical Design Engineer to join their high-performing team in North York, Ontario.
Physical Design Engineer About the Team: Our client, a global leader in semiconductor innovation, is looking for a Physical Design Engineer to join their high-performing team in North York, Ontario.
As a Digital Physical Design Engineer you will play a key role in backend implementation from netlist to GDSII on challenging blocks and sub-systems. You will use advanced flows and techniques in ...
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As a Digital Physical Design Engineer you will play a key role in backend implementation from netlist to GDSII on challenging blocks and sub-systems. You will use advanced flows and techniques in ...
What You'll Need * 7+ years of Physical Design experience * Bachelor's degree in Electrical or Computer Engineering or equivalent * Low-Power Designs experience desired * SOC design experience is ...
What You'll Need * 7+ years of Physical Design experience * Bachelor's degree in Electrical or Computer Engineering or equivalent * Low-Power Designs experience desired * SOC design experience is ...
Staff Digital Design Engineer
Toronto, ON · On-site
In this job, you will work in close collaboration with computer architects, software engineers, verification engineers, and physical design engineers to design innovative compute accelerators that ...
Staff Digital Design Engineer
Toronto, ON · On-site
In this job, you will work in close collaboration with computer architects, software engineers, verification engineers, and physical design engineers to design innovative compute accelerators that ...
About this role We are hiring a Physical Design Timing Engineer to help drive backend digital execution for some of the leading photonics based interconnect solutions. You will work alongside a team ...
About this role We are hiring a Physical Design Timing Engineer to help drive backend digital execution for some of the leading photonics based interconnect solutions. You will work alongside a team ...
We are looking for experienced SoC RTL design engineers to contribute to our next generation ... You will work with Physical design team to meet area, power and performance goals. You will support ...
We are looking for experienced SoC RTL design engineers to contribute to our next generation ... You will work with Physical design team to meet area, power and performance goals. You will support ...
CAD Tools Specialist
CA$87.30K - CA$139.50K/yr
As a Computer-Aided Design (CAD) Engineer, you will be responsible for developing, maintaining, and ... Develop, customize, and support EDA tool flows for IC design (logic synthesis, physical design ...
CAD Tools Specialist
CA$87.30K - CA$139.50K/yr
As a Computer-Aided Design (CAD) Engineer, you will be responsible for developing, maintaining, and ... Develop, customize, and support EDA tool flows for IC design (logic synthesis, physical design ...
Place and Route Design Automation Engineer
CA$83.50K - CA$95.98K/yr
You will collaborate closely with physical design, CAD, and cross-functional engineering teams to improve quality of results (QoR), runtime efficiency, and overall flow robustness. This role is well ...
Place and Route Design Automation Engineer
CA$83.50K - CA$95.98K/yr
You will collaborate closely with physical design, CAD, and cross-functional engineering teams to improve quality of results (QoR), runtime efficiency, and overall flow robustness. This role is well ...
ASIC Digital Backend Physical Implementation Engineer
Ottawa, ON · On-site
CA$109K - CA$174K/yr
As a Digital ASIC Physical Implementation Engineer, you will play a critical role in developing ... Conduct initial Place & Route trials to refine design and correlation, influencing circuit ...
ASIC Digital Backend Physical Implementation Engineer
Ottawa, ON · On-site
CA$109K - CA$174K/yr
As a Digital ASIC Physical Implementation Engineer, you will play a critical role in developing ... Conduct initial Place & Route trials to refine design and correlation, influencing circuit ...
RTL Design Engineer
Thornhill, ON · On-site
PHY Digital Architecture development from pathfinding, coding, verification to physical ... Digital design engineering experience * Excellent knowledge of Verilog, System Verilog, C and a ...
RTL Design Engineer
Thornhill, ON · On-site
PHY Digital Architecture development from pathfinding, coding, verification to physical ... Digital design engineering experience * Excellent knowledge of Verilog, System Verilog, C and a ...
Design Engineer II
Ottawa, ON · On-site
Design Engineer II Location: Montreal, Ottawa, Toronto Overview This is an opportunity to join a ... physical IP for industry-standard protocols. The successful candidate will be a highly motivated ...
Design Engineer II
Ottawa, ON · On-site
Design Engineer II Location: Montreal, Ottawa, Toronto Overview This is an opportunity to join a ... physical IP for industry-standard protocols. The successful candidate will be a highly motivated ...
RTL Design Engineer
Thornhill, ON · On-site
PHY Digital Architecture development from pathfinding, coding, verification to physical ... Digital design engineering experience * Excellent knowledge of Verilog, System Verilog, C and a ...
RTL Design Engineer
Thornhill, ON · On-site
PHY Digital Architecture development from pathfinding, coding, verification to physical ... Digital design engineering experience * Excellent knowledge of Verilog, System Verilog, C and a ...
A Senior FPGA Design Engineer is designing and implementing electronic hardware systems in a team ... Physical implementation in FPGA targets for emulation; timing closure, debug. * Integrating ...
A Senior FPGA Design Engineer is designing and implementing electronic hardware systems in a team ... Physical implementation in FPGA targets for emulation; timing closure, debug. * Integrating ...
You will be working alongside experienced engineers and interacting with architects, design, verification, and physical design engineers towards common team milestones and supporting current and ...
You will be working alongside experienced engineers and interacting with architects, design, verification, and physical design engineers towards common team milestones and supporting current and ...
Work with verification, implementation and physical design teams to achieve high quality design and ... Ability to develop clear and concise engineering documentation. * Strong verbal and written ...
Work with verification, implementation and physical design teams to achieve high quality design and ... Ability to develop clear and concise engineering documentation. * Strong verbal and written ...
... become tools for understanding the physical universe at its most fundamental level ... The Optomechanical Design Engineer will own the mechanical and optomechanical design of Q-Block ...
... become tools for understanding the physical universe at its most fundamental level ... The Optomechanical Design Engineer will own the mechanical and optomechanical design of Q-Block ...
Optomechanical Design Engineer
Ottawa, ON · On-site
CA$75K - CA$145K/yr
... become tools for understanding the physical universe at its most fundamental level ... The Optomechanical Design Engineer will own the mechanical and optomechanical design of Q-Block ...
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Optomechanical Design Engineer
Ottawa, ON · On-site
CA$75K - CA$145K/yr
... become tools for understanding the physical universe at its most fundamental level ... The Optomechanical Design Engineer will own the mechanical and optomechanical design of Q-Block ...
Physical Design Engineer information
See Ontario salary details
$23.56 - $31.73
3% of jobs
$31.73 - $39.90
0% of jobs
$39.90 - $48.08
2% of jobs
$48.08 - $56.25
7% of jobs
$64.25 is the 25th percentile. Wages below this are outliers.
$56.25 - $64.42
13% of jobs
$64.42 - $72.60
16% of jobs
The median wage is $76.07 / hr.
$72.60 - $80.77
21% of jobs
$86.66 is the 75th percentile. Wages above this are outliers.
$80.77 - $88.94
18% of jobs
$88.94 - $97.12
6% of jobs
$97.12 - $105.29
5% of jobs
$105.29 - $113.46
8% of jobs
$23
$77
$113
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Job description
Role Overview
Astera Labs is seeking a Physical Design Engineering Manager to lead a team of physical design engineers at our Toronto site, driving the implementation of connectivity ASICs within our Signal Connectivity Group. This group is responsible for products that enable high-speed serial connectivity including PCIe retimers, Ethernet retimers, and signal conditioning solutions deployed across the world's largest AI clusters and hyperscale data centers.
As an Physical Design Manager Engineering Manager, you will combine hands-on technical leadership with people management, owning physical design execution from RTL to GDSII while building and mentoring a high-performing team. You will drive floorplanning, place-and-route, timing closure, and sign-off for complex designs requiring deep understanding of high-speed physical layer interfaces and SerDes integration at TSMC advanced nodes. This role is fully on-site at our Toronto location.
Basic Qualifications
- Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field; Master's preferred.
- 10+ years of experience in physical design implementation of complex SoCs at advanced nodes (7nm and below).
- 2+ years of experience leading teams or projects with demonstrated ability to mentor and develop engineers.
- Hands-on expertise across the physical design flow: synthesis, place-and-route, CTS, extraction, timing closure, EM-IR, DRC/LVS, and equivalence checking.
- Proficiency with Cadence Innovus and/or Synopsys Fusion Compiler/ICC2 and supporting toolchains.
- Strong scripting ability in Tcl, Python, and/or Perl.
- Professional attitude with the ability to prioritize a dynamic list of tasks, plan and prepare for customer meetings in advance, and work with minimal guidance.
- Entrepreneurial, open-minded behavior and can-do attitude. Think and act fast with the customer in mind!
Required Experience
- Build, lead, and mentor a physical design team, owning Physical Design execution and team development for Signal Connectivity Group products.
- Drive block and top-level physical design implementation from floorplan through tapeout for retimer and signal conditioning ASICs.
- Collaborate with RTL, DFT, STA, EMIR, and verification teams to drive design convergence from synthesis through sign-off.
- Work with IP vendors for both RTL and hard-macro integration, ensuring placement constraints and routing guidelines are met.
- Drive team execution, hiring, career development, and sprint planning for the Toronto PD team.
- Establish physical design best practices, flow improvements, and quality checks to scale execution across multiple concurrent programs.
- Coordinate with global PD teams (San Jose, Irvine, Bangalore) to ensure consistent methodology and design quality.
- Experience with Cadence and/or Synopsys physical design tools/flows.
Preferred Experience/Nice to Have
- Deep understanding of high-speed SerDes physical layer, including equalization, CDR, and signal integrity considerations impacting physical design.
- Knowledge of physical layer timing challenges specific to high-speed serial interfaces.
- Track record of building and scaling physical design teams through multiple tapeouts.
- Knowledge of agentic AI solutions for EDA automation.
Base salary range is CAD 180,000 to CAD 220,000 depending on experience, level, and business need. This role may be eligible for discretionary bonus, incentives, and benefits.
About Astera Labs
Sourced by ZipRecruiter
Industry
Semiconductor and electronic component manufacturing
Company size
11 - 50 Employees
Headquarters location
Santa Clara, CA, US
Year founded
2017